FEATURES n IN and OUT Limited Ony by Externa Components n Adjustabe Sope Compensation n Interna Soft-Start n Constant Frequency 200kHz Operation n ±.5% Reference Accuracy n Current Mode Operation for Exceent Line and Load Transient Response n No Minimum Load Requirement n Low Quiescent Current: 20μA n Low Profi e (mm) SOT-2 Package APPLICATIONS n Teecom Power Suppies n 2 and 2 Automotive Power Suppies n Auxiiary/Housekeeping Power Suppies n Power Over Ethernet L, LT, LTC, LTM, Burst Mode, Linear Technoogy and the Linear ogo are registered trademarks and ThinSOT and No R SENSE are trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. TYPICAL APPLICATION 5 Output Nonisoated Teecom Housekeeping Power Suppy DESCRIPTION Constant Frequency Current Mode Fyback DC/DC Controer in ThinSOT The LTC 80 is a constant frequency current mode fyback controer optimized for driving N-channe MOSFETs in high input votage appications. Constant frequency operation is maintained down to very ight oads, resuting in ess ow frequency noise generation over a wide range of oad currents. Sope compensation can be programmed with an externa resistor. The provides ±.5% output votage accuracy and consumes ony 20μA of quiescent current. Ground-referenced current sensing aows -based converters to accept input suppies beyond the s absoute maximum CC. A micropower hysteretic start-up feature aows efficient operation at high input votages. For simpicity, the can aso be powered from a high IN through a resistor, due to its interna shunt reguator. An interna undervotage ockout shuts down the when the input votage is too ow to provide sufficient gate drive to the externa MOSFET. The is avaiabe in a ow profie (mm) -ead SOT-2 (ThinSOT ) package. Effi ciency vs Load Current 5k 0μF 0 X5R 0.0022μF IN TO 72 0k CC I TH /RUN NGATE GND SENSE FB.7μF 00 X5R T FDC252 8mΩ UPS80 00μF*. X5R OUT 5 2A MAX EFFICIENCY (%) 90 80 IN = 70 IN = 8 0 IN = 0 50 IN = 72 0 0 20 0 20k 05k T: COOPER CTX02-522 *THREE 00μF UNITS IN PARALLEL 80 TA0 0 0. I OUT (A) 80 TA02 0
ABSOLUTE MAXIMUM RATINGS (Note ) CC to GND Low Impedance Source... 0. to 8 Current Fed...25mA into CC * NGATE otage... 0. to CC FB, I TH /RUN otages... 0. to.5 SENSE otage... 0. to NGATE Peak Output Current (<0μs)... A Operating Junction Temperature Range (Notes 2, ) E, I... 0 C to 25 C H... 0 C to 50 C MP... 55 C to 50 C Storage Temperature Range... 5 C to 50 C Lead Temperature (Sodering, 0 sec)... 00 C * interna camp circuit sef reguates CC votage to 9.5. PIN CONFIGURATION I TH /RUN GND 2 FB TOP IEW NGATE 5 CC SENSE S PACKAGE -LEAD PLASTIC TSOT-2 T JMAX = 50 C, θ JA = 92 C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE ES#PBF ES#TRPBF LTAC -Lead Pastic TSOT-2 0 C to 25 C IS#PBF IS#TRPBF LTBNC -Lead Pastic TSOT-2 0 C to 25 C HS#PBF HS#TRPBF LTBNC -Lead Pastic TSOT-2 0 C to 50 C MPS#PBF MPS#TRPBF LTBNC -Lead Pastic TSOT-2 55 C to 50 C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE ES ES#TR LTAC -Lead Pastic TSOT-2 0 C to 25 C IS IS#TR LTBNC -Lead Pastic TSOT-2 0 C to 25 C HS HS#TR LTBNC -Lead Pastic TSOT-2 0 C to 50 C MPS MPS#TR LTBNC -Lead Pastic TSOT-2 55 C to 50 C Consut LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a abe on the shipping container. For more information on ead free part marking, go to: http://www.inear.com/eadfree/ For more information on tape and ree specifi cations, go to: http://www.inear.com/tapeandree/ ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating junction temperature range, otherwise specifi cations are at T A = 25 C. CC = 8, uness otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS TURNON CC Turn On otage E H, I MP TURNOFF CC Turn Off otage E H, I MP 7.8 7.7 7.. 8.7 8.7 8.7 5.7 5.7 5.7 9.2 9.25 9.5.8.8 7.25 HYST CC Hysteresis TURNON TURNOFF E, I, H MP.5.0.0 2
ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating junction temperature range, otherwise specifi cations are at T A = 25 C. CC = 8, uness otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CLAMPmA CC Shunt Reguator otage at ma I CC = ma, ITH/RUN = 0 E H, I MP CLAMP25mA CC Shunt Reguator otage at 25mA I CC = 25mA, ITH/RUN = 0 E H, I MP MARGIN CLAMPmA TURNON Margin E H, I, MP I CC Input DC Suppy Current in Norma Operation I CC(U) Input DC Suppy Current in Undervotage CC = TURNON 00m E H, I, MP ITHSHDN Shutdown Threshod (at I TH /RUN) CC > TURNON, ITH/RUN Faing E H, I, MP 8. 8. 8 8. 8. 8. 0.05 0.0 9. 9. 9. 9.5 9.5 9.5 0. 0. 0. 0.5 0.5 0.5 0.7 0.7 (Note ) ITH/RUN =. 20 50 μa I ITHSTART Start-Up Current Source ITH/RUN = 0 0.2 0. 0. μa FB Reguated Feedback otage (Note 5) E: 0 C T J 85 C 0 C T J 85 C I: 0 C T J 85 C 0 C T J 25 C H: 0 C T J 85 C 0 C T J 50 C MP: 0 C T J 85 C 55 C T J 50 C 0.788 0.800 0.82 0.780 0.800 0.820 g m Error Ampifi er Transconductance I TH/RUN Pin Load = ±5μA (Note 5) 200 500 μa/ Δ O(LINE) Output otage Line Reguation (Note 5) 0.05 m/ Δ O(LOAD) Output otage Load Reguation I TH /RUN Sinking 5μA (Note 5) I TH /RUN Sourcing 5μA (Note 5) 0.5 0.09 0.788 0.780 0.788 0.780 0.788 0.780 0 0 0.28 0.28 0.800 0.800 0.800 0.800 0.800 0.800 90 0 0.5 0. 0.82 0.8 0.82 0.820 0.82 0.820 μa μa m/μa m/μa I FB FB Input Current (Note 5) 0 50 na f OSC Osciator Frequency ITH/RUN =. 80 200 20 khz DC ON(MIN) Minimum Switch On Duty Cyce ITH/RUN =., FB = 0.8 8 % DC ON(MAX) Maximum Switch On Duty Cyce ITH/RUN =., FB = 0.8 70 80 90 % t RISE Gate Drive Rise Time C LOAD = 000pF 0 ns t FALL Gate Drive Fa Time C LOAD = 000pF (Note 7) 0 ns IMAX Peak Current Sense otage R SL = 0 (Note ) E H, I MP I SLMAX Peak Sope Compensation Output Current (Note 7) 5 μa t SFST Soft-Start Time. ms 90 90 85 00 00 00 5 20 20 m m m
ELECTRICAL CHARACTERISTICS Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note 2: The is tested under pused oad conditions such that T J T A. The E is guaranteed to meet specifications from 0 C to 85 C junction temperature. Specifications over the 0 C to 25 C operating junction temperature range are assured by design, characterization and correation with statistica process contros. The I is guaranteed to meet performance specifications over the 0 C to 25 C operating junction temperature range, the H is guaranteed to meet performance specifications over the 0 C to 50 C operating junction temperature range and the MP is tested and guaranteed over the fu 55 C to 50 C operating junction temperature range. High junction temperatures degrade operating ifetimes; operating ifetime is derated for junction temperatures greater than 25 C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board ayout, the rated package therma impedance and other environmenta factors. Note : T J is cacuated from the ambient temperature T A and power dissipation P D according to the foowing formua: T J = T A + (P D 20 C/W). Note : Dynamic suppy current is higher due to the gate charge being deivered at the switching frequency. Note 5: The is tested in a feedback oop that servos FB to the output of the error ampifi er whie maintaining I TH /RUN at the midpoint of the current imit range. Note : Peak current sense votage is reduced dependent on duty cyce and an optiona externa resistor in series with the SENSE pin (R SL ). For detais, refer to the programmabe sope compensation feature in the Appications Information section. Note 7: Guaranteed by design. TYPICAL PERFORMANCE CHARACTERISTICS FB OLTAGE (m) Reference otage vs Temperature 820 CC = 8 85 80 805 800 795 790 785 FB OLTAGE (m) 80.0 800.8 800. 800. 800.2 800.0 799.8 799. 799. 799.2 Reference otage vs Suppy otage T A = 25 C CC CLAMPmA FB OLTAGE (m) Reference otage vs CC Shunt Reguator Current 80 TA = 25 C 80 802 80 800 799 798 797 780 0 0 0 0 0 90 20 50 799.0.5 7 7.5 8 8.5 9 9.5 CC SUPPLY OLTAGE () 79 0 5 0 5 20 25 I CC (ma) 80 G0 80 F02 80 G0 OSCILLATOR FREQUENCY (khz) 20 20 220 20 200 90 Osciator Frequency vs Temperature CC = 8 80 80 G0 OSCILLATOR FREQUENCY (khz) 20 208 20 20 202 200 98 9 9 92 90 Osciator Frequency vs Suppy otage T A = 25 C.5 7 7.5 8 8.5 CC SUPPLY OLTAGE () 80 G05 9 OSCILLATOR FREQUENCY (khz) 20 208 20 20 202 200 98 9 9 92 90 0 Osciator Frequency vs CC Shunt Reguator Current T A = 25 C 5 0 5 20 I CC (ma) 80 G0 25
TYPICAL PERFORMANCE CHARACTERISTICS CC UNDEROLTAGE LOCKOUT () 9.0 8.5 8.0 7.5 7.0.5.0 5.5 5.0.5 CC Undervotage Lockout Threshods vs Temperature TURNON TURNOFF CC () 0.0 9.9 9.8 9.7 9.5 9. 9. 9.2 9. CC Shunt Reguator otage vs Temperature 9. I CC = 25mA I CC = ma SUPPLY CURRENT (μa) 50 25 00 275 250 225 I CC Suppy Current vs Temperature CC = 8 ITH/RUN =..0 9.0 200 80 G07 80 G08 80 G09 START-UP SUPPLY CURRENT (μa) 90 80 70 0 50 0 0 20 0 Start-Up I CC Suppy Current vs Temperature CC = TURNON 0. SHUTDOWN THRESHOLD (m) 50 00 50 00 250 200 50 I TH /RUN Shutdown Threshod vs Temperature I TH /RUN PIN CURRENT SOURCE (na) 800 700 00 500 00 00 200 00 I TH /RUN Start-Up Current Source vs Temperature CC = TURNON + 0. ITH/RUN = 0 0 00 0 80 G0 80 G 80 G2 20 Peak Current Sense otage vs Temperature CC = 8.0 Soft-Start Time vs Temperature 5.5 SENSE PIN OLTAGE (m) 0 05 00 95 90 SOFT-START TIME (ms).0 2.5 2.0.5.0 85 0.5 80 0 80 G 80 G 5
PIN FUNCTIONS I TH /RUN(Pin ): This pin performs two functions. It serves as the error ampifier compensation point as we as the run/shutdown contro input. Nomina votage range is 0.7 to.9. Forcing this pin beow the shutdown threshod ( ITHSHDN ) causes the to shut down. In shutdown mode, the NGATE pin is hed ow. GND (Pin 2): Ground Pin. FB (Pin ): Receives the feedback votage from an externa resistive divider across the output. SENSE (Pin ): This pin performs two functions. It monitors switch current by reading the votage across an externa current sense resistor to ground. It aso injects a current ramp that deveops sope compensation votage across an optiona externa programming resistor. CC (Pin 5): Suppy Pin. Must be cosey decouped to GND (Pin 2). NGATE (Pin ): Gate Drive for the Externa N-Channe MOSFET. This pin swings from 0 to CC. BLOCK DIAGRAM 5 CC 800m REFERENCE CC SHUNT REGULATOR 0.μA 0.28 + SHUTDOWN COMPARATOR CC < TURNON UNDEROLTAGE LOCKOUT SOFT- START CLAMP SHUTDOWN FB + ERROR AMPLIFIER + CURRENT COMPARATOR R S Q SWITCHING LOGIC AND BLANKING CIRCUIT CC GATE DRIER NGATE 2 GND.2 20m 200kHz OSCILLATOR SLOPE COMP CURRENT RAMP I TH /RUN SENSE 80 BD
OPERATION The is a constant frequency current mode controer for fyback and DC/DC boost converter appications in a tiny ThinSOT package. The is designed so that none of its pins need to come in contact with the input or output votages of the power suppy circuit of which it is a part, aowing the conversion of votages we beyond the s absoute maximum ratings. Main Contro Loop Due to space imitations, the basics of current mode DC/DC conversion wi not be discussed here; instead, the reader is referred to the detaied treatment in Appication Note 9, or in texts such as Abraham Pressman s Switching Power Suppy Design. Pease refer to the Bock Diagram and the Typica Appication on the front page of this data sheet. An externa resistive votage divider presents a fraction of the output votage to the FB pin. The divider must be designed so that when the output is at the desired votage, the FB pin votage wi equa the 800m from the interna reference. If the oad current increases, the output votage wi decrease sighty, causing the FB pin votage to fa beow 800m. The error ampifier responds by feeding current into the I TH /RUN pin. If the oad current decreases, the FB votage wi rise above 800m and the error ampifi er wi sink current away from the I TH /RUN pin. The votage at the I TH /RUN pin commands the puse-width moduator formed by the osciator, current comparator and RS atch. Specificay, the votage at the I TH /RUN pin sets the current comparator s trip threshod. The current comparator monitors the votage across a current sense resistor in series with the source termina of the externa MOSFET. The turns on the externa power MOSFET when the interna free-running 200kHz osciator sets the RS atch. It turns off the MOSFET when the current comparator resets the atch or when 80% duty cyce is reached, whichever happens first. In this way, the peak current eves through the f yback transformer s primary and secondary are controed by the I TH /RUN votage. Since the I TH /RUN votage is increased by the error ampifier whenever the output votage is beow nomina, and decreased whenever output votage exceeds nomina, the votage reguation oop is cosed. For exampe, whenever the oad current increases, output votage wi decrease sighty, and sensing this, the error ampifi er raises the I TH /RUN votage by sourcing current into the I TH /RUN pin, raising the current comparator threshod, thus increasing the peak currents through the transformer primary and secondary. This deivers more current to the oad, bringing the output votage back up. The I TH /RUN pin serves as the compensation point for the contro oop. Typicay, an externa series RC network is connected from I TH /RUN to ground and is chosen for optima response to oad and ine transients. The impedance of this RC network converts the output current of the error ampifier to the I TH /RUN votage which sets the current comparator threshod and commands considerabe infuence over the dynamics of the votage reguation oop. Start-Up/Shutdown The has two shutdown mechanisms to disabe and enabe operation: an undervotage ockout on the CC suppy pin votage, and a forced shutdown whenever externa circuitry drives the I TH /RUN pin ow. The transitions into and out of shutdown according to the state diagram (Figure ). CC < TURNOFF (NOMINALLY 5.7) SHUT DOWN ENABLED ITH/RUN < ITHSHDN (NOMINALLY 0.28) 80 F0 Figure. Start-Up/Shutdown State Diagram ITH/RUN > ITHSHDN AND CC > TURNON (NOMINALLY 8.7) 7
OPERATION The undervotage ockout (ULO) mechanism prevents the from trying to drive a MOSFET with insufficient GS. The votage at the CC pin must exceed TURNON (nominay 8.7) at east momentariy to enabe operation. The CC votage is then aowed to fa to TURNOFF (nominay 5.7) before undervotage ockout disabes the. This wide ULO hysteresis range supports the use of a bias winding on the fyback transformer to power the see the section Powering the. The I TH /RUN pin can be driven beow ITHSHDN (nominay 0.28) to force the into shutdown. An interna 0.μA current source aways tries to pu this pin towards CC. When the I TH /RUN pin votage is aowed to exceed ITHSHDN, and CC exceeds TURNON, the begins to operate and an interna camp immediatey pus the I TH /RUN pin up to about 0.7. In operation, the I TH /RUN pin votage wi vary from roughy 0.7 to.9 to represent current comparator threshods from zero to maximum. Interna Soft-Start An interna soft-start feature is enabed whenever the comes out of shutdown. Specificay, the I TH / RUN votage is camped and is prevented from reaching maximum unti roughy.ms has passed. This aows the input and output currents of -based power suppies to rise in a smooth and controed manner on start-up. Powering the In the simpest case, the can be powered from a high votage suppy through a resistor. A buit-in shunt reguator from the CC pin to GND wi draw as much current as needed through this resistor to reguate the CC votage to around 9.5 as ong as the CC pin is not forced to sink more than 25mA. This shunt reguator is aways active, even when the is in shutdown, since it serves the vita function of protecting the CC pin from seeing too much votage. For higher efficiency or for wide IN range appications, fyback controers are typicay powered through a separate bias winding on the fyback transformer. The has the wide ULO hysteresis and sma CC suppy current draw that is needed to support such bootstrapped hysteretic start-up schemes. The CC pin must be bypassed to ground immediatey adjacent to the IC pins with a minimum of a 0μF ceramic or tantaum capacitor. Proper suppy bypassing is necessary to suppy the high transient currents required by the MOSFET gate driver. Adjustabe Sope Compensation The injects a 5μA peak current ramp out through its SENSE pin which can be used for sope compensation in designs that require it. This current ramp is approximatey inear and begins at zero current at % duty cyce, reaching peak current at 80% duty cyce. Additiona detais are provided in the Appications Information section. 8
APPLICATIONS INFORMATION Many appication circuits can be derived from the topoogy shown in Figure 2. The itsef imposes no imits on aowed power output, input votage IN or desired reguated output votage OUT ; these are a determined by the ratings on the externa power components. The key factors are: Q s maximum drain-source votage (B DSS ), on-resistance (R DS(ON) ) and maximum drain current, T s saturation f ux eve and winding insuation breakdown votages, C IN and C OUT s maximum working votage, ESR, and maximum rippe current ratings, and D and R SENSE s power ratings. C CC C C R D2 2 R START CC I TH /RUN NGATE GND SENSE FB R IN Figure 2. Typica Appication Circuit SELECTING FEEDBACK RESISTOR DIIDER ALUES The reguated output votage is determined by the resistor divider across OUT (R and R2 in Figure 2). The ratio of R2 to R needed to produce a desired OUT can be cacuated: R2 = OUT 0.8 0.8 5 R2 R C IN L BIAS D L PRI R SL L SEC R SENSE C OUT 80 F02 OUT Choose resistance vaues for R and R2 to be as arge as possibe in order to minimize any effi ciency oss due to the static current drawn from OUT, but just sma enough so that when OUT is in reguation, the error caused by the nonzero input current to the FB pin is ess than %. A good rue of thumb is to choose R to be 80k or ess. T Q TRANSFORMER DESIGN CONSIDERATIONS Transformer specifi cation and design is perhaps the most critica part of appying the successfuy. In addition to the usua ist of caveats deaing with high frequency power transformer design, the foowing shoud prove usefu. Turns Ratios Due to the use of the externa feedback resistor divider ratio to set output votage, the user has reative freedom in seecting transformer turns ratio to suit a given appication. Simpe ratios of sma integers, e.g., :, 2:, :2, etc. can be empoyed which yied more freedom in setting tota turns and mutua inductance. Simpe integer turns ratios aso faciitate the use of off-the-shef configurabe transformers such as the Coitronics ERSA-PAC series in appications with high input to output votage ratios. For exampe, if a -winding ERSA-PAC is used with three windings in series on the primary and three windings in parae on the secondary, a : turns ratio wi be achieved. Turns ratio can be chosen on the basis of desired duty cyce. However, remember that the input suppy votage pus the secondary-to-primary referred version of the fyback puse (incuding eakage spike) must not exceed the aowed externa MOSFET breakdown rating. Leakage Inductance Transformer eakage inductance (on either the primary or secondary) causes a votage spike to occur after the output switch (Q) turn-off. This is increasingy prominent at higher oad currents, where more stored energy must be dissipated. In some cases a snubber circuit wi be required to avoid overvotage breakdown at the MOSFET s drain node. Appication Note 9 is a good reference on snubber design. A bifiar or simiar winding technique is a good way to minimize troubesome eakage inductances. However, remember that this wi imit the primary-to-secondary breakdown votage, so bifiar winding is not aways practica. 9
APPLICATIONS INFORMATION CURRENT SENSE RESISTOR CONSIDERATIONS The externa current sense resistor (R SENSE in Figure 2) aows the user to optimize the current imit behavior for the particuar appication. As the current sense resistor is varied from severa ohms down to tens of miiohms, peak switch current goes from a fraction of an ampere to severa amperes. Care must be taken to ensure proper circuit operation, especiay with sma current sense resistor vaues. For exampe, a peak switch current of 5A requires a sense resistor of 0.020Ω. Note that the instantaneous peak power in the sense resistor is 0.5W and it must be rated accordingy. The has ony a singe sense ine to this resistor. Therefore, any parasitic resistance in the ground side connection of the sense resistor wi increase its apparent vaue. In the case of a 0.020Ω sense resistor, one miiohm of parasitic resistance wi cause a 5% reduction in peak switch current. So the resistance of printed circuit copper traces and vias cannot necessariy be ignored. PROGRAMMABLE SLOPE COMPENSATION The injects a ramping current through its SENSE pin into an externa sope compensation resistor (R SL in Figure 2). This current ramp starts at zero right after the NGATE pin has been high for the s minimum duty cyce of %. The current rises ineary towards a peak of 5μA at the maximum duty cyce of 80%, shutting off once the NGATE pin goes ow. A series resistor (R SL ) connecting the SENSE pin to the current sense resistor (R SENSE ) thus deveops a ramping votage drop. From the perspective of the SENSE pin, this ramping votage adds to the votage across the sense resistor, effectivey reducing the current comparator threshod in proportion to duty cyce. This stabiizes the contro oop against subharmonic osciation. The amount of reduction in the current comparator threshod (Δ SENSE ) can be cacuated using the foowing equation: Duty Cyce % Δ SENSE = 5μAR 7% SL Note: enforces % < Duty Cyce < 80%. A good starting vaue for R SL is 5.9k, which gives a 0m drop in current comparator threshod at 80% duty cyce. Designs not needing sope compensation may repace R SL with a short circuit. INTERNAL WIDE HYSTERESIS UNDEROLTAGE LOCKOUT The is designed to impement DC/DC converters operating from input votages of typicay 8 or more. The standard operating topoogy empoys a third transformer winding (L BIAS in Figure 2) on the primary side that provides power for the via its CC pin. However, this arrangement is not inherenty sef-starting. Start-up is affected by the use of an externa tricke-charge resistor (R START in Figure 2) and the presence of an interna wide hysteresis undervotage ockout circuit that monitors CC pin votage. Operation is as foows: Tricke charge resistor R START is connected to IN and suppies a sma current, typicay on the order of 00μA to 20μA, to charge C CC. After some time, the votage on C CC reaches the CC turn-on threshod. The then turns on abrupty and draws its norma suppy current. The NGATE pin begins switching and the externa MOSFET (Q) begins to deiver power. The votage on C CC begins to decine as the draws its norma suppy current, which exceeds that deivered by R START. After some time, typicay tens of miiseconds, the output votage approaches its desired vaue. By this time, the third transformer winding is providing virtuay a the suppy current required by the. One potentia design pitfa is undersizing the vaue of capacitor C CC. In this case, the norma suppy current drawn by the wi discharge C CC too rapidy; before the third winding drive becomes effective, the CC turn-off threshod wi be reached. The turns off, 0
APPLICATIONS INFORMATION and the CC node begins to charge via R START back up to the CC turn-on threshod. Depending on the particuar situation, this may resut in either severa on-off cyces before proper operation is reached or permanent reaxation osciation at the CC node. Component seection is as foows: Resistor R START shoud be made sma enough to yied a worst-case minimum charging current greater than the maximum rated start-up current, to ensure there is enough current to charge C CC to the CC turn-on threshod. It shoud be made arge enough to yied a worst-case maximum charging current ess than the minimum rated suppy current, so that in operation, most of the s suppy current is deivered through the third winding. This resuts in the highest possibe efficiency. Capacitor C CC shoud then be made arge enough to avoid the reaxation osciation behavior described above. This is compicated to determine theoreticay as it depends on the particuars of the secondary circuit and oad behavior. Empirica testing is recommended. The third transformer winding shoud be designed so that its output votage, after accounting for the D2 s forward votage drop, exceeds the maximum CC turn-off threshod. Aso, the third winding s nomina output votage shoud be at east 0.5 beow the minimum rated CC camp votage to avoid running up against the s CC shunt reguator, needessy wasting power. CC SHUNT REGULATOR In appications incuding a third transformer winding, the interna CC shunt reguator serves to protect the from overvotage transients as the third winding is powering up. In appications where a third transformer winding is undesirabe or unavaiabe, the shunt reguator aows the to be powered through a singe dropping resistor from IN to CC, in conjunction with a bypass capacitor, C CC, that cosey decoupes CC to GND (see Figure ). This simpicity comes at the expense of reduced efficiency due to the static power dissipation in the R CC dropping resistor. IN R CC C CC CC GND 80 F0 Figure. Powering the ia the Interna Shunt Reguator The shunt reguator can draw up to 25mA through the CC pin to GND to drop enough votage across R CC to reguate CC to around 9.5. For appications where IN is ow enough such that the static power dissipation in R CC is acceptabe, using the CC shunt reguator is the simpest way to power the. EXTERNAL PREREGULATOR The circuit in Figure shows a third way to power the. An externa series prereguator consisting of series pass transistor Q, Zener diode D, and bias resistor R B brings CC to at east 7. nomina, we above the maximum rated CC turn-off threshod. Resistor R START momentariy charges the CC node up to the CC turn-on threshod, enabing the. R B D 8.2 IN Q R START C CC Figure. Powering the with an Externa Prereguator CC GND 80 F0
TYPICAL APPLICATIONS 2W Isoated Housekeeping Teecom Converter PRIMARY SIDE 0, 00mA OUTPUT BAS5 T 2.2μF IN TO 75 nf 80Ω 22k 9.2k 2 I TH /RUN NGATE GND FB BAS5 CC SENSE 5 k 220k 5.k μf FDC252 BAS5 2.2μF SECONDARY SIDE GROUND SECONDARY SIDE 0, 00mA OUTPUT T: PULSE ENGINEERING PA08 OR TYCO TTI898 μf 0.Ω PRIMARY GROUND 80 TA0 2
TYPICAL APPLICATIONS : Input Range. Output Isoated Fyback DC/DC Converter + IN 8 TO 72 IN 2.2μF 220k MMBTA2 00k T PA277NL PDS00 00μF. OUT +. A GND PDZ.8B 8Ω BAS5 CC 50pF 80Ω 22Ω BAS5 0Ω I TH /RUN GATE FDC252 0.μF 2 GND CC FB SENSE 5.7k 0.μF 0.00Ω OUT + BAT70 CC 270Ω BAS5.8k PS280-2 BAS5 0.μF 2 0.μF IN OPTO LT0 GND OC COMP FB 5 2.2nF 22.k 5k 7pF 00k OUT + 80 TA05 8 Effi ciency vs Load Current 82 EFFICIENCY (%) 80 78 7 7 72 70 0 IN = 8 IN = 2 2 I OUT (A) 80 TA05a
PACKAGE DESCRIPTION S Package -Lead Pastic TSOT-2 (Reference LTC DWG # 05-08-) 0.2 MAX 0.95 REF 2.90 BSC (NOTE ).22 REF.85 MAX 2.2 REF. MIN 2.80 BSC.50.75 (NOTE ) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.95 BSC 0.0 0.5 PLCS (NOTE ) 0.80 0.90 0.20 BSC DATUM A.00 MAX 0.0 0.0 0.0 0.50 REF 0.09 0.20.90 BSC (NOTE ) S TSOT-2 002 NOTE:. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE. DIMENSIONS ARE INCLUSIE OF PLATING. DIMENSIONS ARE EXCLUSIE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.25mm. JEDEC PACKAGE REFERENCE IS MO-9
REISION HISTORY (Revision history begins at Rev C) RE DATE DESCRIPTION PAGE NUMBER C /0 MP-grade part added. Ref ected throughout the data sheet. to Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 5
TYPICAL APPLICATIONS 9 Synchronous Fyback. OUT n 8.0k 90% Effi cient Synchronous Fyback Converter k I TH /RUN GATE 2 5 GND CC 25.5k* R FB OUT IN TO 72 270k FB = 0.8 SENSE μf 0 50Ω 5k R CS T Q2 C IN Q D OUT *..5A C O 0.μF 80 TA0a T: PULSE ENGINEERING PA00 Q: FAIRCHILD FDC252 Q2: ISHAY Si980 D: PHILIPS BAS5 C IN : TDK μf, 00, X5R C O : TDK 00μF,., X5R R CS : ISHAY OR IRC, 80mΩ *FOR 5 OUTPUT CHANGE R FB TO 2.2k EFFICIENCY (%) EFFICIENCY (%) 90 89 88 0.5.0.5 2.0 OUTPUT CURRENT (A) 80 TA0b 92 9 90 89 88 87 8 Synchronous Fyback 5 OUT 85 0.5.0.5 2.0 2.5 OUTPUT CURRENT (A) 80 TA0c RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT57 Isoated Fyback Switching Reguator with 0 IN 0, No Opto-Isoator or Third Winding Required, Up to 7W Integrated Switch Output Power, MSOP-E LTC805/ LTC805-5 LTC87/ LTC87-5 Adjustabe Constant Frequency Fyback, Boost, SEPIC DC/DC Controer No R SENSE Constant Frequency Fyback, Boost, SEPIC Controer IN and OUT Limited Ony by Externa Components, mm mm DFN-0, MSOP-0E Packages IN and OUT Limited Ony by Externa Components, 8-pin ThinSOT or 2mm mm DFN-8 Packages LT757 Boost, Fyback, SEPIC and Inverting Controer 2.9 IN 0, 00kHz to MHz Programmabe Operating Frequency, mm mm DFN-0 and MSOP-0E Package LT758 Boost, Fyback, SEPIC and Inverting Controer 5.5 IN 00, 00kHz to MHz Programmabe Operating Frequency, mm mm DFN-0 and MSOP-0E LTC87/LTC87-/ LTC87-7 Wide Input Range, No R SENSE Low Quiescent Current Fyback, Boost and SEPIC Controer Programmabe Operating Frequency, 2.5 IN, Burst Mode Operation at Light Load, MSOP-0 LT 00 RE C PRINTED IN USA Linear Technoogy Corporation 0 McCarthy Bvd., Mipitas, CA 9505-77 (08) 2-900 FAX: (08) -0507 www.inear.com LINEAR TECHNOLOGY CORPORATION 200