Rev 1; 3/0 Spread-Spectrum Crystal Multiplier General Description The is a low-jitter, crystal-based clock generator with an integrated phase-locked loop (PLL) to generate spread-spectrum clock outputs from 1MHz to 13MHz. The device is pin-programmable to select the clock multiplier rate as well as the dither magnitude. The has a spread-spectrum disable mode and a power-down mode to conserve power. Automotive Cable Modems Cell Phones Computer Peripherals Copiers Infotainment PCs Printers Applications Features Generates Spread-Spectrum Clocks from 1MHz to 13MHz Selectable Clock Multiplier Rates of 1x, x, and x Center Spread-Spectrum Dithering Selectable Spread-Spectrum Modulation Magnitudes of ±0.5%, ±1.0%, and ±1.5% Spread-Spectrum Disable Mode Low Cycle-to-Cycle Jitter Power-Down Mode with High-Impedance Output Low Cost Low Power Consumption 3.0V to 3.V Single-Supply Operation -0 C to +15 C Temperature Operation Small -Lead µsop Package Pin Configuration Ordering Information TOP VIEW PART TEMP RANGE PIN-PACKAGE + -0 C to +15 C µsop +Denotes lead-free package. X1 1 X GND CMSEL 3 7 SSO SMSEL 5 PDN µsop Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1--9-, or visit Maxim s website at www.maxim-ic.com.
ABSOLUTE MAXIMUM RATINGS Voltage on Relative to GND...-0.5V to +3.3V Voltage on Any Lead Relative to GND...-0.5V to ( + 0.5V), not to exceed +3.3V Operating Temperature Range...-0 C to +15 C Storage Temperature Range...-55 C to +15 C Soldering Temperature...See J-STD-00 Specification Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (T A = -0 C to +15 C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage (Note 1) 3.0 3. V 0. x V Input Logic 1 + IH 0.3 Input Logic 0 V IL GND - 0.3 Input Logic Float I IF 0v < V IN < (Note ) ±1 µa Input Leakage I IL 0V < V IN < (Note 3) ±0 µa SSO < 7MHz 15 SSO Load C SSO 7MHz SSO < 101MHz 10 pf 101MHz SSO < 13MHz 7 0. x V V Crystal or Clock Input Frequency f IN 1.0 33. MHz Crystal ESR X ESR 90 Ω Clock Input Duty Cycle F INDC 0 0 % Crystal Parallel Load Capacitance C L (Note ) 1 pf DC ELECTRICAL CHARACTERISTICS ( = +3.0V to +3.V, T A = -0 C to +15 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current I CC1 C SSO = 15pF, SSO = 1MHz 13 ma Power-Down Current I CCQ PDN = GND, all input pins floating 00 µa Output Leakage (SSO) I OZ PDN = GND -1 +1 µa Low-Level Output Voltage (SSO) V OL I OL = ma 0. V High-Level Output Voltage (SSO) V OH I OH = -ma. V Input Capacitance (X1/X) C IN (Note 5) 5 pf
AC ELECTRICAL CHARACTERISTICS ( = +3.0 to +3.V, T A = -0 C to +15 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SSO Duty Cycle SSODC Measured at / 0 0 % Rise Time t R (Note ) 1. ns Fall Time t F (Note ) 1. ns Peak Cycle-to-Cycle Jitter t J f SSO = 1MHz, T A = -0 to +5 C, 10,000 cycles (Note 5) Power-Up Time t POR PDN pin (Note 7) 75 ps 1MHz 0 33.MHz 11 Power-Down Time t PDN PDN pin (Notes and 9) 100 ns Dither Rate f DITHER f IN / 10 ms Note 1: All voltages referenced to ground. Note : Maximum source/sink current applied to input to be considered a float. Note 3: Applicable to pins CMSEL, SMSEL, and PDN. Note : See information about C L1 and C L in the Applications Information section at the end of the data sheet. Note 5: Not production tested. Note : For 7pF load. Note 7: Time between PDN deasserted to output active. Note : Time between PDN asserted to output high impedance. Note 9: Guaranteed by design. 3
( = 3.3V, T A = +5 C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE 1 1 AT 1MHz CMSEL = x AT 1MHz 10 10 SUPPLY CURRENT (ma) CMSEL = x AT 1MHz CMSEL = 1x AT 1MHz toc01 SUPPLY CURRENT (ma) Typical Operating Characteristics SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. FREQUENCY 1 AT 1MHz CMSEL = x AT 1MHz AT 1MHz 1 CMSEL = x AT 1MHz CMSEL = 1x AT 1MHz CMSEL = x AT 1MHz toc0 SUPPLY CURRENT (ma) 1 10 CMSEL = 1x AT 1MHz CMSEL = x AT 1MHz toc03 0.95 3.05 3.15 3.5 3.35 3.5 3.55 3.5 SUPPLY VOLTAGE (V) 0-0 10 0 TEMPERATURE ( C) 110 0 1 1 FREQUENCY (MHz) 31 PDN SUPPLY CURRENT (ma) PDN SUPPLY CURRENT vs. TEMPERATURE 0.5 AT 1MHz 0.0 CMSEL = x AT 1MHz 0.15 0.10 CMSEL = 1x AT 1MHz 0.05 CMSEL = x AT 1MHz toc0 DUTY CYCLE (%) 0 5 5 5 5 50 DUTY CYCLE vs. TEMPERATURE AT 1MHz toc05 0-0 10 0 TEMPERATURE ( C) 110 0-0 10 0 TEMPERATURE ( C) 110 DUTY CYCLE (%) 0 5 5 5 5 50 DUTY CYCLE vs. SUPPLY VOLTAGE AT 1MHz toc0 SSO AND PDN OUTPUT DURING POWER UP AND POWER DOWN POWER DOWN t PDN t POR POWER UP toc07 0.95 3.05 3.15 3.5 3.35 3.5 SUPPLY VOLTAGE (V) 3.55 3.5 TIME (µs)
PIN NAME FUNCTION Pin Description 1 X1 Crystal Drive/Clock Input. A crystal with the proper loading capacitors is connected across X1 and X. Instead of a crystal, a clock can be applied at the X1 input. GND Signal Ground 3 CMSEL Clock Multiplier Select. Tri-level digital input. 0 = 1x Float = x 1 = x SMSEL 5 PDN Spread-Spectrum Magnitude Select. Tri-level digital input. 0 = ±0.5% Float = ±1.0% 1 = ±1.5% Power-Down/Spread-Spectrum Disable. Tri-level digital input. 0 = Power-Down/SSO Tri-Stated Float = Power-Up/Spread Spectrum Disabled 1 = Power-Up/Spread Spectrum Enabled SSO Spread-Spectrum Clock Multiplier Output. Outputs a 1x, x, or x spread-spectrum version of the crystal or clock applied at the X1/X pins. 7 Supply Voltage X Crystal Drive Output. A crystal with the proper loading capacitors is connected across X1 and X. If a clock is connected to X1, then X should be left open circuit. Block Diagram 1MHz TO 33.MHz X1 X f IN CRYSTAL OSCILLATOR 1x/x/x CLOCK MULTIPLYING PLL WITH SPREAD SPECTRUM f SSO SSO f SSO = 1MHz TO 13MHz C L1 C L PDN CMSEL SMSEL CONFIGURATION DECODE AND CONTROL GND NOTE: SEE INFORMATION ABOUT C L1 AND C L IN THE APPLICATIONS INFORMATION SECTION AT THE END OF THE DATA SHEET. 5
Detailed Description The is a crystal multiplier with center spreadspectrum capability. A 1MHz to 33.MHz crystal is connected to the X1 and X pins. Alternately, a 1MHz to 33.MHz clock can be applied to X1 in place of the crystal. In such applications, X would be left open circuit. Using the CMSEL input, the user selects whether the attached crystal or input clock is multiplied by 1,, or. The is capable of generating spreadspectrum clocks from 1MHz to 13MHz. The PLL can dither the output clock about its center frequency at a user-selectable magnitude. Using the SMSEL input, the user selects the dither magnitude. The PDN input can be used to place the device into a low-power standby mode where the SSO output is tristated. If the PDN pin is floated, the SSO output is active but the spread-spectrum dithering is disabled. The spread-spectrum dither rate is fixed at f IN / 10 to keep the dither rate above the audio frequency range. On power-up, the output clock (SSO) remains tri-stated until the PLL reaches a stable frequency (f SSO ) and dither (f DITHER ). DITHER CYCLE RATE = f DITHER = f IN / 10 fsso +1.5% +1.0% +0.5% f 0-0.5% -1.0% -1.5% t Figure 1. Spread-Spectrum Frequency Modulation
C L1 X1 GND CMSEL SMSEL 1 3 CRYSTAL 7 5 X SSO PDN C L Typical Operating Circuit DECOUPLING CAPACITOR f SSO NOTE: IN THE ABOVE CONFIGURATION WITH PDN CONNECTED TO, SMSEL CONNECTED TO GND AND CMSEL FLOATING, THE DEVICE IS IN NORMAL OPERATION WITH x CLOCK MULTIPLICATION, AND SPREAD-SPECTRUM MAGNITUDE OF ±0.5%. Applications Information Crystal Selection The requires a parallel resonating crystal operating in the fundamental mode, with an ESR of less than 90Ω. The crystal should be placed very close to the device to minimize excessive loading due to parasitic capacitances. Oscillator Input When driving the using an external oscillator clock, consider the input (X1) to be high impedance. Crystal Capacitor Selection The load capacitors C L1 and C L are selected based on the crystal specifications (from the data sheet of the crystal used). The crystal parallel load capacitance is calculated as follows: CL = CL1 x CL CIN CL1 + CL Equation 1 where C L1 = C L = C LX. Equation is used to calculate the values of C L1 and C L based on values on C L and C IN noted in the data sheet electrical specifications. Power-Supply Decoupling To achieve best results, it is highly recommended that a decoupling capacitor is used on the IC power-supply pins. Typical values of decoupling capacitors are 0.001µF and 0.1µF. Use a high-quality, ceramic, surface-mount capacitor, and mount it as close as possible to the and GND pins of the IC to minimize lead inductance. Layout Considerations As noted earlier, the crystal should be placed very close to the device to minimize excessive loading due to parasitic capacitances. Care should also be taken to minimize loading on pins that could be floated as a programming option (SMSEL and CMSEL). Coupling on inputs due to clocks should be minimized. For the use C L1 = C L = C LX. In this case, the equation then reduces to: CL CLX = + CIN Equation 7
TRANSISTOR COUNT: 3951 SUBSTRATE CONNECTED TO GROUND Chip Technology Package Information For the latest package outline information, go to www.maxim-ic.com/dallaspackinfo. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 10 San Gabriel Drive, Sunnyvale, CA 90 0-737-700 00 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. is a registered trademark of Dallas Semiconductor Corporation. Heaney
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