Real Time Clocks & s Programming with Real-time clocks Real-time clock is just another source of interrupts. Should have high priority in real-time systems Timing jitter must be accommodated or tolerated Software related use of s Single event scheduled for future time e.g. timeout for communications Regular scheduling of events e.g. time-slice multi-tasking 75
Devices Single shot operation Provides single interrupt after specied timeout Value 0 t IRQ IACK counter is loaded with the desired value and then set running. an interrupt occurs when the counter reaches zero. 76
Devices Continuous operation Provides regular interrupts at specied intervals Value 0 t IRQ IACK each time zero is reached, the counter is re-loaded with the interval value and countdown continues. 77
Devices System Clock May be consulted at any time, giving an absolute value for system time. Max Value 0 t IRQ IACK pre-load value is set to maximum. interrupt routine is responsible for keeping count of number of full sequences. 78
68230 Peripheral Interface / 24 bit counter provides extra timing information in single shot mode Enable $FFFFFF Value PRE-LOAD $000000 t IRQ IACK in fact this is really another continuous mode with a very long second cycle. 79
Sharing a Countdown While running as a system clock the timer may be accessed by many routines. sharing for single-shot or periodic interrupts is somewhat harder. Tick based timer queues Value 0 t IRQ the timer triggers an interrupt at regular intervals pending timer events are stored in a queue on each tick the interrupt routine checks to see if another timer event is due tick based queues offer limited resolution 80
Queues For accurate timing we must use a difference based timer queue: ptr to timeout queue funct ptr 1 funct ptr 2 funct ptr 3 timeout 1 timeout 2 timeout 3 absolute time of first event each queue entry contains a pointer to an event service routine timeout values are the time differences between adjacent events we need only know the absolute time for the rst event 81
Queues Value 0 t timeout 1 tim.2 timeout 3 IRQ IACK each time the counter reaches zero timeout n +1is automatically loaded into the counter interrupt routine loads timeout n +2into the pre-load registers interrupt routine adjusts absolute time register interrupt routine starts function n 82
Queues Queue manipulation Adding an event nd place in queue calculate difference timeout re-calculate difference timeout for following event Adding an event behind the rst queue element here we must modify the pre-load registers during counting Adding an event at the front of the queue we must re-start the timer with a new counter value 83
Queues Queue manipulation Periodic events we need an extra eld to indicate periodic events ptr to timeout queue funct ptr 1 funct ptr 2 funct ptr 3 timeout 1 timeout 2 timeout 3 S P period 2 S absolute time of first event periodic events must be added back into the queue when serviced 84
Hardware &s Timing accuracy is limited by unpredictable and variable response times timing jitter. For many hardware related problems, a greater accuracy is required. We can achieve this by connecting the hardware directly to the timer. input from hardware start/stop timer external clock input counts pulses enable timer output to hardware event strobes square wave generation 85
Hardware-Attached Timing Digital lter illustrating hardware attached timing S/H ADC DAC Analogue L.P.F. R.T. Processor INT Analogue L.P.F. provides separate regular strobe signals for different devices S/H ADC INT DAC 86
Hardware-Attached Timing Sharing a timer for hardware-attached applications: IRQ to controlled hardware devices 3 EN 8 line decoder Zero Detect PULSE OUT Pre-load Registers Counter Registers Device Select Register The 68230 PI/T provides a single congurable timer input line and a single timer output line 1. a device select register indicates which device receives next strobe the decoder activates the required strobe line when enabled 1 this doubles as the interrupt request 87
Hardware-Attached s the device select eld must be added to our timer queue information ptr to timeout queue absolute time of first event funct ptr 1 funct ptr 2 funct ptr 3 device sel 1 device sel 2 device sel 3 timeout 1 timeout 2 timeout 3 S P period 2 S the device select register is updated by the master service routine after the interrupt is cleared 88