User s Manual MPX52 Rev. preliminary
Declaration of Conformity We, Manufacturer MicroSys Electronics GmbH Mühlweg D-8254 Sauerlach Germany declare that the product MPX52 is in conformity with: EN 58- Generic emission standard EN 582- Generic immunity standard in accordance with 89/336 EEC-EMC Directive. We also declare the conformity of the above mentioned product with the actual required safety standards in accordance with Low Voltage Directive 73/23 EEC. Date: Signature: Position: General Manager The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, MicroSys reserves the right to make changes to any product herein to improve reliability, function or design. MicroSys does not assume any responsibility arising out the application or use of any product or circuit described herein, neither does it convey any license under its patent rights or the rights of h
Edition MicroSys Date: Ident-Nr.: Released: Manual 3.7.26 EW38MA-AA Schematics 29.3.26 EW38SL-AA Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 3 of 36 26 MicroSys Electronics GmbH
MicroSys GmbH, Mühlweg, 8254 Sauerlach, Germany. Hotline +49 ()84 8-3, Phone +49 ()84 8-, Fax +49 ()84 8-. Internet: http://www.microsys.de MicroSys Electronics GmbH, July 26 Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 4 of 36 26 MicroSys Electronics GmbH
Chip Select Overview... 6 6 MByte...6 Addressmap... 6 I2C Address Overview:... 6 Power Supply Ratings:... 7 The Backup Supply Ratings:...7 The MPC52B Processor... 8 BDM JTAG Port Connection:... 8 Interrupt Configuration:... 9 Reset Configuration Signals:... 9 Local-Bus:... Local-Bus Pin Configuration:... Local Bus ST-Connector Pin out:... PCI-Interface:... 2 PCI-Bus Clock Configuration:... 2 PCI Bus ST-Connector Pin out:... 2 PCI Bus ST-Connector Pin out:... 3 MII Interface ST2-Connector Pin out:... 4 USB & PSC Interface ST2-Connector Pin out:... 5 DDR SDRAM Memory:... 6 Memory-Bus Pin Configuration:... 6 Flash Memory... 7 Chip--Select-Start-Address-Register... 8 Chip--Select-End-Address-Register... 9 Chip-Select-Configuration-Register-... 2 SRAM:... 2 SRAM Pin Configuration:... 2 Chip--Select-Start-Address-Register... 22 Chip--Select-End-Address-Register... 23 Chip-Select-Configuration-Register-... 24 DiskOnChip:... 25 DiskOnChip Pin Configuration:... 25 Chip-2-Select-Start-Address-Register... 26 Chip-2-Select-End-Address-Register... 27 Chip-Select-Configuration-Register-2... 28 I2C EEPROM:... 29 EEPROM I2C Access Address:... 29 Real Time Clock PCF8563T:... 29 RTC I2C Access Address:... 29 RTC Address Map:... 3 Data Retention... 3 Capacitor Backup Time... 3 Appendices... 32 Layout Component Side... 33 Layout Solder Side... 34 Physical Dimensions (Top View)... 35 Schematics MPX52 (please contact MicroSys)... 36 Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 5 of 36 26 MicroSys Electronics GmbH
Chip Select Overview signal function bus width mode size description CS FLASH 8 Bit GPCM 6 MByte CS SRAM 8 Bit GPCM 2 MByte CS2 DiskOnChip 8 Bit GPCM MByte CS3 ST b24 --- --- --- not used onboard CS4 ST b26 --- --- --- not used onboard CS5 ST b28 --- --- --- not used onboard Addressmap Type Base End Select Bus Size MPC52 Internal Ram (MBAR) $F $F 7FFF SDRAM $ $3FF FFFF MCS 63 32Bit Flash $FC $FCFF FFFF CS LocalPlus 8Bit SRAM $F $FF FFFF CS LocalPlus 8Bit DiskOnChip $E $EF FFFF CS2 LocalPlus 8Bit not initialized CS3 not initialized not initialized CS4 CS5 I2C Address Overview: Device: Hex: binary I 2 C address read/write PCF8563T A2/A3 / AT24C28 A6/A7 / Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 6 of 36 26 MicroSys Electronics GmbH
Power Supply Ratings: The MPX52 module must be supplied with single 3.3V and all pins of the module are 3.3V tolerant only. There is a 2 pin wide VDD supply block on connector ST2-C and several GND pins distributed over connector ST and ST2. For a proper operation, all ground pins and all VDD pins should be connected to the carrier board. 3.3V ST2-C ST2-C 3.3V VDD pin c4 pin c42 VDD VDD pin c43 pin c44 VDD VDD pin c45 pin c46 VDD VDD pin c47 pin c48 VDD VDD pin c49 pin c5 VDD VDD pin c5 pin c52 VDD name rating current tolerance ripple VDD +3.3VDC peak A +/-5% max.5mv The Backup Supply Ratings: The MPX52 contains a realtime clock and two static ram devices. The data contents of all devices can be saved during short power down periods by the onboard gold capacitor. For extended backup times an external power can be supplied via the STDBY line. 3.3V ST2-C STDBY c39 name rating current tolerance ripple STDBY +3.3VDC max. 5uA +/-% max.5mv Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 7 of 36 26 MicroSys Electronics GmbH
The MPC52B Processor The MPC52B cpu is connected to a 32 bit wide DDR SDRAM. The local bus side handles the onboard Flash, SRAM, and the DiskOnChip device by the select lines CS, CS and CS2, i.e. CS3, CS4 and CS5 can be used for other purposes. BDM JTAG Port Connection: The JTAG port of the MPC52B can be accessed via ST2-A by the following signals : signal ST2-A ST2-A signal description TMS pin c33 pin c34 TDI pin c35 pin c36 CKSTO MPC52B signal TEST_SEL TDO pin c37 TCK pin c39 pin c4 HRST# TRST# pin c4 pin c42 SRST# During normal operation, the TRST# signal is controlled be an onboard logic, i.e. no external connections are necessary. Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 8 of 36 26 MicroSys Electronics GmbH
Interrupt Configuration: MPC52B Signal Destination onboard source IRQ# ST2-a43 --- IRQ# ST2-a45 --- IRQ2# ST2-a47 Real-Time-Clock IRQ via link R2 IRQ3# ST2-a44 DiskOnChip IRQ via link R8 Reset Configuration Signals: For proper operation, the MPC52B needs several signal for a functional configuration during power up. These signals are tied to high or low via 4K7 pullup or pulldown resistors. In case an external circuitry drives these signals during power up or there are additional pullup or pulldown resistors on the carrier board, the necessary configuration can not been performed. Signal Destination Reset Function Link Normal Function ATA-DACK# ST-a42 ppc-pll-config-4 CFL/CFH ATA dma acknowledge ATA-IOR# ST-b33 ppc-pll-config-3 CFL/CFH ATA IO read ATA-IOW# ST-b35 ppc-pll-config-2 CFL2/CFH2 ATA IO write LWE# ST-b9 ppc-pll-config- CFL3/CFH3 local bus write LALE ST-b5 ppc-pll-config- CFL4/CFH4 local bus address latch LTS# ST-b23 xlb-clk-sel CFL5/CFH5 local bus cycle start USB- ST2-d4 sys-pll-config- CFL6/CFH6 USB-TXN USB-2 ST2-d6 sys-pll-config- CFL7/CFH USB-TXP ETH- ST2-a4 boot-rom-mg CFL8/CFH8 ETH-TXEN ETH- ST2-a5 large-flash-select CFL9/CFH9 ETH-TXD ETH-2 ST2-a6 ppc-msrip CFL/CFH ETH-TXD ETH-3 ST2-a7 boot-rom-wait CFL/CFH ETH-TXD2 ETH-4 ST2-a8 boot-rom-swap CFL2/CFH2 ETH-TXD3 ETH-5 ST2-a2 boot-rom-size CFL3/CFH3 ETH-TXER ETH-6 ST2-a29 boot-rom-type CFL4/CFH4 ETH-MDC Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 9 of 36 26 MicroSys Electronics GmbH
Local-Bus: The local bus of the MPX52 is accessible via the connectors ST-A and ST-B. All local bus lines are connected, even if some of them are used by onboard devices. Local-Bus Pin Configuration: MPC52B Signal Destination onboard function LAD(3:) ST-A Address/Data Bus LCS ST-b8 Flash Chip Select LCS ST-b2 SRAM Chip Select LCS2 ST-b22 DiskOnChip Select LCS3 ST-b24 not used LCS4 ST-b26 not used LCS5 ST-b28 not used LALE ST-b5 not used GPIO-WAKEUP7 ST-b7 not used LWE# ST-b9 Flash / SRAM / DiskOnChip LOE# ST-b2 Flash / SRAM / DiskOnChip LTS# ST-b23 not used LACK# ST-b25 not used TEST_SEL ST-b27 not used PCICLK ST-b52 DiskOnChip Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page of 36 26 MicroSys Electronics GmbH
Local Bus ST-Connector Pin out: Location: c52 ST c a52 ST a d52 ST d b52 ST b c52 ST2 c a52 ST2 a d52 ST2 d b52 ST2 b AD8 a2 a GND not connected b2 b GND AD9 a4 a3 GND not connected b4 b3 GND AD a6 a5 AD not connected b6 b5 not connected AD a8 a7 AD not connected b8 b7 not connected AD2 a a9 AD2 not connected b b9 not connected AD3 a2 a AD3 not connected b2 b not connected AD4 a4 a3 AD4 not connected b4 b3 not connected AD5 a6 a5 AD5 not connected b6 b5 LALE GND a8 a7 AD6 CS# b8 b7 GPIO-WAKEUP7 GND a2 a9 AD7 CS# b2 b9 LWE# AD24 a22 a2 AD6 CS2# b22 b2 LOE# AD25 a24 a23 AD7 CS3# b24 b23 LTS# AD26 a26 a25 AD8 CS4# b26 b25 LACK# AD27 a28 a27 AD9 CS5# b28 b27 TEST-SEL AD28 a3 a29 AD2 not connected b3 b29 not connected AD29 a32 a3 AD2 GND b32 b3 not connected AD3 a34 a33 AD22 GND b34 b33 ATA-IOR# AD3 a36 a35 AD23 ATA-IOCHRDY b36 b35 ATA-IOW# ATA-ISOLATE a38 a37 GND not connected b38 b37 not connected ATA-DRQ a4 a39 GND A-GNT# b4 b39 A-REQ# ATA-DACK# a42 a4 ATA-INTRQ not connected b42 b4 not connected not connected a44 a43 not connected not connected b44 b43 not connected not connected a46 a45 not connected not connected b46 b45 not connected not connected a48 a47 not connected not connected b48 b47 not connected GND a5 a49 not connected A-RST b5 b49 GND GND a52 a5 not connected A-PCICLK b52 b5 GND Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page of 36 26 MicroSys Electronics GmbH
PCI-Interface: The MPX52 offers a simple 32bit PCI interface located on connector ST-D. The according clock and the two arbiter signals are located on the connector ST-B. All PCI relevant signals of the MPC52B are available as external connections. PCI-Bus Clock Configuration: MPC52B Signal Destination Function PCICLK- ST2-b52 Reference clock for local bus & PCI PCI Bus ST-Connector Pin out: Location: c52 ST c a52 ST a d52 ST d b52 ST b c52 ST2 c a52 ST2 a d52 ST2 d b52 ST2 b Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 2 of 36 26 MicroSys Electronics GmbH
PCI Bus ST-Connector Pin out: not connected a38 a37 GND not connected b38 b37 not connected not connected a4 a39 GND A-GNT b4 b39 A-REQ not connected a42 a4 not connected not connected b42 b4 not connected not connected a44 a43 not connected not connected b44 b43 not connected not connected a46 a45 not connected not connected b46 b45 not connected not connected a48 a47 not connected not connected b48 b47 not connected GND a5 a49 not connected not connected b5 b49 GND GND a52 a5 not connected A-PCICLK b52 b5 GND not connected c2 c GND A-AD8 d2 d GND not connected c4 c3 GND A-AD9 d4 d3 GND not connected c6 c5 not connected A-AD d6 d5 A-AD not connected c8 c7 not connected A-AD d8 d7 A-AD not connected c c9 not connected A-AD2 d d9 A-AD2 not connected c2 c not connected A-AD3 d2 d A-AD3 not connected c4 c3 not connected A-AD4 d4 d3 A-AD4 not connected c6 c5 not connected A-AD5 d6 d5 A-AD5 GND c8 c7 not connected GND d8 d7 A-AD6 GND c2 c9 not connected GND d2 d9 A-AD7 not connected c22 c2 not connected A-CBE d22 d2 A-CBE not connected c24 c23 not connected A-DVSL d24 d23 A-FRME not connected c26 c25 not connected A-PERR d26 d25 A-IRDY not connected c28 c27 not connected A-SERR d28 d27 A-TRDY not connected c3 c29 not connected A-PAR d3 d29 A-STOP not connected c32 c3 not connected A-CBE3 d32 d3 A-CBE2 not connected c34 c33 GND A-AD24 d34 d33 GND not connected c36 c35 GND A-AD25 d36 d35 GND not connected c38 c37 not connected A-AD26 d38 d37 A-AD6 not connected c4 c39 not connected A-AD27 d4 d39 A-AD7 not connected c42 c4 not connected A-AD28 d42 d4 A-AD8 not connected c44 c43 not connected A-AD29 d44 d43 A-AD9 not connected c46 c45 not connected A-AD3 d46 d45 A-AD2 not connected c48 c47 not connected A-AD3 d48 d47 A-AD2 GND c5 c49 not connected GND d5 d49 A-AD22 GND c52 c5 not connected GND d52 d5 A-AD23 all shaded PCI signals are tied to high by kohm pullup resistors. Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 3 of 36 26 MicroSys Electronics GmbH
MII Interface ST2-Connector Pin out: Location: c52 ST c a52 ST a d52 ST d b52 ST b c52 ST2 c a52 ST2 a d52 ST2 d b52 ST2 b not connected a2 a GND EXT-CCLK b2 b GND ETH- a4 a3 GND not connected b4 b3 GND ETH-2 a6 a5 ETH- not connected b6 b5 not connected ETH-4 a8 a7 ETH-3 not connected b8 b7 not connected ETH-2 a a9 not connected not connected b b9 not connected ETH-4 a2 a ETH-3 not connected b2 b not connected ETH-9 a4 a3 ETH-5 not connected b4 b3 not connected ETH-7 a6 a5 ETH-8 not connected b6 b5 not connected not connected a8 a7 not connected not connected b8 b7 not connected not connected a2 a9 not connected not connected b2 b9 not connected not connected a22 a2 ETH-5 not connected b22 b2 not connected not connected a24 a23 not connected not connected b24 b23 not connected ETH-6 a26 a25 not connected not connected b26 b25 not connected ETH- a28 a27 ETH- not connected b28 b27 not connected GND a3 a29 ETH-6 GND b3 b29 not connected GND a32 a3 ETH-7 GND b32 b3 PRST# not connected a34 a33 JTMS not connected b34 b33 TIMER- TEST-SEL a36 a35 JTDI not connected b36 b35 TIMER- KRST# a38 a37 JTDO not connected b38 b37 TIMER-2 HRST# a4 a39 JTCK not connected b4 b39 TIMER-3 SRST# a42 a4 JTRST# not connected b42 b4 TIMER-4 IRQ3# a44 a43 IRQ# not connected b44 b43 TIMER-5 not connected a46 a45 IRQ# GPIO-WAKEUP6 b46 b45 TIMER-6 not connected a48 a47 IRQ2# GPIO-WAKEUP7 b48 b47 TIMER-7 not connected a5 a49 GND CS-WDOG# b5 b49 GND not connected a52 a5 GND not connected b5 b52 GND Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 4 of 36 26 MicroSys Electronics GmbH
USB & PSC Interface ST2-Connector Pin out: Location: c52 ST c a52 ST a d52 ST d b52 ST b c52 ST2 c a52 ST2 a d52 ST2 d b52 ST2 b VEE Core c2 c GND USB- d2 d GND VFF RAM c4 c3 GND USB- d4 d3 GND not connected c6 c5 not connected USB-2 d6 d5 PSC3- not connected c8 c7 not connected USB-3 d8 d7 PSC3- not connected c c9 not connected USB-4 d d9 PSC3-2 not connected c2 c not connected USB-5 d2 d PSC3-3 not connected c4 c3 not connected USB-6 d4 d3 PSC3-4 not connected c6 c5 not connected USB-7 d6 d5 PSC3-5 not connected c8 c7 not connected USB-8 d8 d7 PSC3-6 not connected c2 c9 not connected USB-9 d2 d9 PSC3-7 not connected c22 c2 not connected GND d22 d2 PSC3-8 not connected c24 c23 not connected GND d24 d23 PSC3-9 not connected c26 c25 not connected not connected d26 d25 not connected not connected c28 c27 not connected not connected d28 d27 not connected not connected c3 c29 not connected not connected d3 d29 not connected not connected c32 c3 not connected not connected d32 d3 not connected not connected c34 c33 not connected PSC- d34 d33 I2C- GND c36 c35 GND PSC- d36 d35 I2C- GND c38 c37 GND PSC-2 d38 d37 I2C-3 CSE c4 c39 STDBY PSC-3 d4 d39 I2C-2 VDD c42 c4 VDD PSC-4 d42 d4 PSC6- VDD c44 c43 VDD PSC2- d44 d43 PSC6- VDD c46 c45 VDD PSC2- d46 d45 PSC6-2 VDD c48 c47 VDD PSC2-2 d48 d47 PSC6-3 VDD c5 c49 VDD PSC2-3 d5 d49 GND VDD c52 c5 VDD PSC2-4 d52 d5 GND Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 5 of 36 26 MicroSys Electronics GmbH
DDR SDRAM Memory: The DDR SDRAM memory of the MPX52 consists of two 6bit wide devices with a total capacity of 64MByte, and is accessed via the MCS# select line of the MPC52B processor. The used DRAM types have an organization of 3 row and column addresses and the four chip internal banks are accessed via the MBA and MBA signals. Memory-Bus Pin Configuration: MPC52B Signal MDQ(32:) DQM(3:) MDQS(3:) MBA(:) MA(2:) MCAS# MRAS# MWE# MCS# MCS#/GPIO-WAKEUP6 MCKE MCLK / MCLK# DDR-SDRAM Function Data Bus Data Mask Data Strobe Bank Select Address-Bus Column Address Row Address Write Enable Chip Select not used Clock Enable DRAM Clock Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 6 of 36 26 MicroSys Electronics GmbH
Flash Memory The flash memory of the MPX52 consists of a single device and works in the 8 bit nonmultiplexed mode with 24 address lines. The used device S29GL28MFF from SPANSION is controlled via the select line CS#, the LOE# line and the LWE# line by the local bus of the MPC52B. It can be disabled by setting the LCSE# line on connector ST2- c4 to high. The flash device is reset by power-up or key-reset. It is not affected by a cpu initiated reset. The RDY/BSY line of the device can not be detected by the cpu. Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 7 of 36 26 MicroSys Electronics GmbH
Chip--Select-Start-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 SA start address bit MSB Bit 7 SA start address Bit 8 SA F Bit 9 SA Bit 2 SA Bit 2 SA start address Bit 22 SA C Bit 23 SA Bit 24 SA Bit 25 SA start address Bit 26 SA Bit 27 SA Bit 28 SA Bit 29 SA start address Bit 3 SA Bit 3 SA start address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 8 of 36 26 MicroSys Electronics GmbH
Chip--Select-End-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 EA end address bit MSB Bit 7 EA end address Bit 8 EA F Bit 9 EA Bit 2 EA Bit 2 EA end address Bit 22 EA C Bit 23 EA Bit 24 EA Bit 25 EA end address Bit 26 EA F Bit 27 EA Bit 28 EA Bit 29 EA end address Bit 3 EA F Bit 3 EA end address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 9 of 36 26 MicroSys Electronics GmbH
Chip-Select-Configuration-Register- MSB name description value selection HEX Bit WP Bit WP WaitP Bit 2 WP Bit 3 WP Bit 4 WP Bit 5 WP WaitP Bit 6 WP Bit 7 WP Bit 8 WX Bit 9 WX WaitX Bit WX Bit WX Bit 2 WX Bit 3 WX WaitX Bit 4 WX (2+2)*CLK=2ns 2 Bit 5 WX Bit 6 MX multiplexed mode Bit 7 Rsrvd reserved, must be Bit 8 AA acknowledge active 7 Bit 9 CE CS pin enable Bit 2 AS Address size Bit 2 AS 24 Bit Bit 22 DS Data size Bit 23 DS 8 Bit 8 Bit 24 Bank msb bank bit for AD26 Bit 25 Bank lsb bank bit for AD25 Bit 26 WTyp waitstate type WaitX for R & W Bit 27 WTyp waitstate type Bit 28 WS write swap bit no swap Bit 29 RS read swap bit no swap Bit 3 WO write only write allowed Bit 3 RO read only read allowed LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 2 of 36 26 MicroSys Electronics GmbH
SRAM: The static RAM of the MPX52 consists of two devices and works in the 8 bit nonmultiplexed mode with 24 address lines. The used devices are controlled via the select line CS#, the LOE# and the LWE# line by the local bus of the MPC52B. The data contents of the SRAM devices is protected by a local gold capacitor, which is also used to keep the onboard RTC running during short power down periods. SRAM Pin Configuration: MPC52B Signal Function SRAM Signal AD3-AD24 Data-Bus D-D7 AD3-AD24 Data-Bus D8-D5 via CS# + AD2 + logic Chip Select CE LWE# Write Enable WE LOE# Read Enable OE via AD + logic Byte Enable LB/UB AD-AD9 Address-Bus A-A8 Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 2 of 36 26 MicroSys Electronics GmbH
Chip--Select-Start-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 SA start address bit MSB Bit 7 SA start address Bit 8 SA F Bit 9 SA Bit 2 SA Bit 2 SA start address Bit 22 SA Bit 23 SA Bit 24 SA Bit 25 SA start address Bit 26 SA Bit 27 SA Bit 28 SA Bit 29 SA start address Bit 3 SA Bit 3 SA start address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 22 of 36 26 MicroSys Electronics GmbH
Chip--Select-End-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 EA end address bit MSB Bit 7 EA end address Bit 8 EA F Bit 9 EA Bit 2 EA Bit 2 EA end address Bit 22 EA Bit 23 EA Bit 24 EA Bit 25 EA end address Bit 26 EA Bit 27 EA Bit 28 EA Bit 29 EA end address Bit 3 EA F Bit 3 EA end address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 23 of 36 26 MicroSys Electronics GmbH
Chip-Select-Configuration-Register- MSB name description value selection HEX Bit WP Bit WP WaitP Bit 2 WP Bit 3 WP Bit 4 WP Bit 5 WP WaitP Bit 6 WP Bit 7 WP Bit 8 WX Bit 9 WX WaitX Bit WX Bit WX Bit 2 WX Bit 3 WX WaitX Bit 4 WX Bit 5 WX (2+)*CLK=9ns Bit 6 MX multiplexed mode Bit 7 Rsrvd reserved, must be Bit 8 AA acknowledge active 7 Bit 9 CE CS pin enable Bit 2 AS Address size Bit 2 AS 24 Bit Bit 22 DS Data size Bit 23 DS 8 Bit 8 Bit 24 Bank msb bank bit for AD26 Bit 25 Bank lsb bank bit for AD25 Bit 26 WTyp waitstate type WaitX for R & W Bit 27 WTyp waitstate type Bit 28 WS write swap bit no swap Bit 29 RS read swap bit no swap Bit 3 WO write only write allowed Bit 3 RO read only read allowed LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 24 of 36 26 MicroSys Electronics GmbH
DiskOnChip: There is a DiskOnChip device onboard of the MPX52. It consists of a single device and works in the 8 bit non-multiplexed mode with 24 address lines. The used device MD8832- dg-v3xp from M-SYSTEMS is controlled via select line CS2#,, the LOE# and the LWE# line by the local bus of the MPC52B. Optional the IRQ line of the device can be connected to IRQ3# via soldering link R8. DiskOnChip Pin Configuration: MPC52B Signal Function DiskOnChip Signal Data-Bus not connected AD3 AD24 Data-Bus D7 - D LCS2# Chip Select CE LWE# Write Enable WE LOE# Read Enable OE PCICLK Clock CLK AD2-AD Address-Bus A-A2 IRQ3# Interrupt IRQ connected to IRQ3# via R8 HRST# Reset RST --- not used DRQ tied to high --- not used DBSY tied to high --- not used LCK tied to high --- 8 bit mode CFG tied to low --- single chip ID tied to low --- non-mux-mode ID tied to low Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 25 of 36 26 MicroSys Electronics GmbH
Chip-2-Select-Start-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 SA start address bit MSB Bit 7 SA start address Bit 8 SA E Bit 9 SA Bit 2 SA Bit 2 SA start address Bit 22 SA Bit 23 SA Bit 24 SA Bit 25 SA start address Bit 26 SA Bit 27 SA Bit 28 SA Bit 29 SA start address Bit 3 SA Bit 3 SA start address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 26 of 36 26 MicroSys Electronics GmbH
Chip-2-Select-End-Address-Register MSB name description value selection HEX Bit Rsrvd Bit Rsrvd reserved Bit 2 Rsrvd Bit 3 Rsrvd Bit 4 Rsrvd Bit 5 Rsrvd reserved Bit 6 Rsrvd Bit 7 Rsrvd Bit 8 Rsrvd Bit 9 Rsrvd reserved Bit Rsrvd Bit Rsrvd Bit 2 Rsrvd Bit 3 Rsrvd reserved Bit 4 Rsrvd Bit 5 Rsrvd Bit 6 EA end address bit MSB Bit 7 EA end address Bit 8 EA E Bit 9 EA Bit 2 EA Bit 2 EA end address Bit 22 EA Bit 23 EA Bit 24 EA Bit 25 EA end address Bit 26 EA Bit 27 EA Bit 28 EA Bit 29 EA end address Bit 3 EA F Bit 3 EA end address bit LSB LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 27 of 36 26 MicroSys Electronics GmbH
Chip-Select-Configuration-Register-2 MSB name description value selection HEX Bit WP Bit WP WaitP Bit 2 WP Bit 3 WP Bit 4 WP Bit 5 WP WaitP Bit 6 WP Bit 7 WP Bit 8 WX Bit 9 WX WaitX Bit WX Bit WX Bit 2 WX Bit 3 WX WaitX Bit 4 WX (2+2)*CLK=2ns 2 Bit 5 WX Bit 6 MX multiplexed mode Bit 7 Rsrvd reserved, must be Bit 8 AA acknowledge active 7 Bit 9 CE CS pin enable Bit 2 AS Address size Bit 2 AS 24 Bit Bit 22 DS Data size Bit 23 DS 8 Bit 8 Bit 24 Bank msb bank bit for AD26 Bit 25 Bank lsb bank bit for AD25 Bit 26 WTyp waitstate type WaitX for R & W Bit 27 WTyp waitstate type Bit 28 WS write swap bit no swap Bit 29 RS read swap bit no swap Bit 3 WO write only write allowed Bit 3 RO read only read allowed LSB name description value selection HEX Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 28 of 36 26 MicroSys Electronics GmbH
I2C EEPROM: EEPROM I2C Access Address: Device: Hex: binary I 2 C address read/write AT24C28 A6/A7 / The AT24C28 uses a two 8 bit address words following the shown device address for data access. The write protect function of the Atmel EEPROM device is disabled. Real Time Clock PCF8563T: RTC I2C Access Address: Device: Hex: binary I 2 C address read/write PCF8563T A2/A3 / The PCF8563T uses an 8 bit address word following the shown device address for register and data access. The interrupt line of the RTC is not connected. Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 29 of 36 26 MicroSys Electronics GmbH
RTC Address Map: bit oriented registers address register name D7 D6 D5 D4 D3 D2 D D $ Control/Status TEST STOP TEST C $ Control/Status 2 TI/TP AF TF AIE TIE $D CLKOUT frequency FE -- -- -- -- -- FD FD $E Timer control TE -- -- -- -- -- TD TD $F Timer countdown value <timer countdown value> BCD formated registers address register name D7 D6 D5 D4 D3 D2 D D BCD format tens nibble BCD format units nibble $2 Seconds VL <seconds to 59 coded in BCD> $3 Minutes -- <minutes to 59 coded in BCD> $4 Hours -- -- <hours to 23 coded in BCD> $5 Days -- -- <days to 3 coded in BCD> $6 Weekdays -- -- -- -- -- <weekday to 6> $7 Month/Century C -- -- <month to 2 coded in BCD> $8 Years <years to 99 coded in BCD> $9 Minute alarm AE <minute alarm to 59 coded in BCD> $A Hour alarm AE -- <hour alarm to 23 coded in BCD> $B Day alarm AE -- <day alarm to 3 coded in BCD> $C Weekday alarm AE -- -- -- -- <weekday alarm to 6> Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 3 of 36 26 MicroSys Electronics GmbH
Data Retention The primary data retention is performed by a local gold capacitor. Additional backup power can be supplied via signal STDBY on connector ST2-c39. The external supply voltage must not exceed 3.3V. The RTC PCF8563T works with a minimum supply voltage of. volts, while the SRAM devices needs at least.5 volts for data retention. The CLKOUT and timer of the PCF8563T should be disabled to reduce power consumption. Capacitor Backup Time 3,5 3, 2,5 2, Volt,5,,5, 2 3 4 5 6 Stunden Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 3 of 36 26 MicroSys Electronics GmbH
Appendices Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 32 of 36 26 MicroSys Electronics GmbH
Layout Component Side Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 33 of 36 26 MicroSys Electronics GmbH
Layout Solder Side Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 34 of 36 26 MicroSys Electronics GmbH
Physical Dimensions (Top View) Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 35 of 36 26 MicroSys Electronics GmbH
Schematics MPX52 (please contact MicroSys) MicroSys Datei: MPX52-A.doc Archivierung: 5 EW38MA-AA Page 36 of 36 26 MicroSys Electronics GmbH