Low Noise Wide Dynamic Range InGaAs Sensors

Transcription

1 ESA/CNES Workshop on nfrared etector for Space Applications 7-10 Oct Tenerif, Spain Low Noise Wide ynamic Range ngaas Sensors Yang Ni

2 Presentation Agenda Short revisit of conventional ROC designs NT s logarithmic ROC for ngaas sensor NT s active dark current reduction NT s charge-injection-transfert approach Conclusion

3 Conventional ROC elements Reset oltage ntegrator reset Accumulator Reset Signal M Buf amp ntegration cap Selection Photodiode biasing ntegration cap Selection Output bus P bias voltage mage signal Output BUS irect njection CTA Reset voltage Fundamentally voltage based designs Source follower KTC & 1/f noise is an issue Photodiode reset Signal M Selection CS can be done at only frame-period Extra-integration cap Output bus High 1/f noise level in CMOS process SFP

4 NT Logarithmic ngaas Sensor P reset = P short-circuit Photodiode reset Signal M Source follower Selection Photodiode generates active volatge signal ery precise/repeatable logarithmic response Output bus High uniformity due to forward biasing NT LOG-ROC Simple design for > 120dB instant R Propertary ngaas photodiode array Active dark current reduction Active Cross-Talk suppression 3 international patents filed

5 Active ark Current Reduction 1 S e t S P C T ln [( S ) e T s S ] e ( C 0 T S ) t s mpossible to compensate!!! ark current x10 x100 x1000 Rapide performance degradation with dark current No compensation possible with post processing Strong cooling is mandatory Solution needed!

6 Active ark Current Reduction 2 AB P P C AB S s e e t AB T S e t AB T ln [( AB ) e T AB s ] e ( C 0 T AB ) t s

7 Signal Level Logarithmic Response over Large C ariation No logarithmic response degradation with dark current ark current x1 C shift can be compensated easily No cooling needed for video rate industrial applications x10 x100 x1000 High Quality mage with >120dB ynamic Range using minimal camera hardware! llumination Level Constant logarithmic reponse over large temperature range, not like conventional logarithmic pixel designs.

8 Some demo videos

9 Performance improvement P reset = P short-circuit Photodiode reset Source follower Selection KTC noise issue CS not possible in logarithmic mode. Signal M Low conversion gain > system noise issue Output bus QE loss due to active C suppression NT LOG-ROC ngaas material/structure optimization Pixel-period CS for low noise ncreasing conversion gain New Concept is needed! All by keeping 120dB R!!

10 New Charge omain Concept/esign NT s patent pending : Charge-njection-Accumulation-Transfer (CAT) Photodiode biasing Linear mage Signal Photo Electrons Low noise 4T Pixel TX RST Logarithmic mage Signal Transfert Gate njection diode N PP PWell njected electrons Floating diffusion P-sub CAT benefits from the advances in low noise CMOS visible sensors : njecting the ngaas signal into silicon substrate as minority carriers Collecting and detecting the injected minority carriers by charge transfert design

11 CAT Operation Timing & Advanatges RST TX Temps d intégration Linear Signal image Reset level Signal level Reset level Signal level mage1 = Reset Level Signal Level mage2 = Reset Level Signal Level Advantages 1. KTC noise is suppressed by using fully depleted collecting/integrating pinned diode 2. Charge transfer operation permits high efficient pixel-period CS 3. High (multiple/programmable) conversion gain is possible. 4. Pseudo non-destructive readout is possible with digital summing 5. ery low noise possible (<5 e compared to 50 e provided by CTA at very high gain) 6. Logarithmic output for very wide dynamic range

12 mplanting 4T pixel in Std CMOS 1 NT s patent pending TX gate over PP method s it possible to designing 4T structure in std CMOS? NT Process for PP+TX Compatible with any std CMOS process Only 1-2 extra masks needed Good performance Solution for dedicated FAB versus small volume problem => Good for Low volume/custom (Space) Applications TX gate mplementation in 0.18um pure logic process simple 4T pixel of 10um pitch for validation no measurable lag 5-7 elec RMS noise with 40u/e conversion gain 120pA/cm2 dark current further optimization on the way

13 mplanting 4T pixel in Std CMOS 2 Good performance F8, 25ms, 30Lux NT 4T pixel High Quality CC e NT 4T pixel

14 Conclusion n my talk, have : revisited conventional ROC element designs introduced NT s logarithmic ROC design presented NT s active dark current reduction method for ngaas logarithmic sensors introduced a new ROC element (CAT) based on 4T charge transfert pixel introduced charge transfer pixel design in std CMOS process with validation A new generation low noise/wr ROC is under development at NT, based on the patented CAT technology for ngaas sensors.

15 Charge-njection-Accumulation-Transfer Pixel Transfer Gate Pinned iode Accumulator Photo charge injection Floating iffusion