Performance Characterization of SPEC CPU2006 Integer Benchmarks on x Architecture
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1 Performance Characterization of SPEC CPU2006 Integer Benchmarks on x Architecture Dong Ye David Kaeli Northeastern University Joydeep Ray Christophe Harle AMD Inc. IISWC
2 Outline Motivation and background Performance characteristics of CPU2006 integer benchmarks on x86-64 (64-bit mode vs. 32-bit mode) Program characteristics of selected benchmarks CPU2006 vs. CPU2000 IISWC
3 Motivation and background x86-64 architecture brings 64-bit computing to the PC market Need to evaluate whether PC desktop applications can benefit from 64-bit ISA SPEC released its latest CPU suite (CPU2006) last month Want to evaluate how applications have changed when moving from CPU2000 to CPU2006 IISWC
4 x86-64: 64: extends x86 to 64 bits x86-64==x64==(amd64 + EM64T) Fully compatible with existing x86 modes Architectural support for 64 bit virtual address space and 52 bit physical address space 64-bit mode supports flat addressing 64-bit integer operations bit GPRs, 16 SSE registers IISWC
5 Evaluation environment Athlon 64 X Rev E (dual-core, 2.2GHz) 2 DIMMs 1GB DDR400 DRAM SUSE Linux 9.3 Pro x86-64 edition, run level 3, selected daemons are disabled (kernel ) Benchmark bound to run on a single core 64-bit binary run in the 64-bit mode, 32-bit binary run in compatibility mode (referred to as 32-bit mode), both on the same 64-bit OS GCC (-O2 for perlbench, -O3 for all others) H/W counters used to collect performance data IISWC
6 How much faster is 64-bit mode? Benchmark Language 64-bit vs. 32-bit speedup perlbench C bzip2 C 15.77% C C 3.42% % % gobmk C 4.97% hmmer C 34.34% sjeng C 14.21% libquantum C 35.38% h264ref C 35.35% omnetpp C % astar C % xalancbmk C % Average 7.16% IISWC
7 Code size increases in 64-bit mode 90% 70% 50% 30% 10% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk -10% IISWC Percentage
8 Runtime memory footprint increases in 64-bit mode 95% 75% 55% 35% 15% -5% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Percentage
9 Dynamic instruction count decreases in 64-bit mode 50% 40% 30% 20% 10% 0% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Percentage
10 IPC comparison bit 32-bit perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC IPC
11 Instruction cache (L1) request rate increases in 64-bit mode 40% 30% 20% 10% 0% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Percentage
12 Instruction cache miss rate comparison bit 32-bit perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Icache misses per 1K instr
13 Data cache (L1) request rate decreases in 64-bit mode 60% 40% 20% 0% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Percentage
14 Data cache miss rate comparison bit 32-bit perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Dcache misses per 1K instr
15 Observations Instruction cache miss rate is very low in both 64-bit and 32-bit modes Data cache request rate decreases significantly in 64-bit mode Extra registers help Data cache miss rate increases in 64-bit mode The increased size of long and pointer data types has an adverse impact on data cache performance A lower instruction count magnifies this IISWC
16 Memory controller utilization ratio comparison 50% 40% 64-bit 32-bit 30% 20% 10% 0% perlbench bzip2 gobmk hmmer sjeng libquantum h264ref omnetpp astar xalancbmk IISWC Percentage
17 Program characteristics of five selected benchmarks Benchmark Performance Observations Root cause analysis 64-bit: 26.4% slower Memory footprint doubles Larger memory footprint due to extensive uses of longs and pointers xalancbmk 64-bit: 13.7% slower Memory footprint increases by 33.9% Larger memory footprint due to extensive uses of pointers hmmer libquantum h264ref 64-bit: 34.3% faster 64-bit: 35.4% faster 64-bit: 35.4% faster Dynamic instruction count decreases by 8.7% Dynamic instruction count decreases by 54% Dynamic instruction count decreases by 10% More registers available in 64-bit mode Native 64-bit integer arithmetic in 64-bit mode Faster calling convention (mainly because of more registers) in 64-bit mode IISWC
18 CPU2000int: Speedup in 64-bit mode 40% 20% 0% -20% -40% -60% gzip vpr crafty parser eon perlbmk gap vortex bzip2 twolf IISWC Percentage
19 Conclusions Programs that use features in 64-bit mode (64-bit integer arithmetic and more registers) stand to benefit more from x86-64 Programs that are memory intensive or make heavy use of long and pointer need to carefully evaluated when porting to x86-64 IISWC
20 Disclaimer All performance numbers referred to in this presentation are estimates because they are from a peak-only SPEC CPU2006 run, and hence is not fully compliant with SPEC run rules. It is expected, though not proven, that results from a fully compliant run would be very close. IISWC
21 Thank you and questions? IISWC
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