SN5406, SN5416, SN7406, SN7416 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
|
|
- Betty Collins
- 7 years ago
- Views:
Transcription
1 Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Drivers for Indicator Lamps and Relays Inputs Fully Compatible With Most TTL Circuits description These TTL hex inverter buffers/drivers feature high-voltage open-collector outputs for interfacing with high-level circuits (such as MOS) or for driving high-current loads (such as lamps or relays), and also are characterized for use as inverter buffers for driving TTL inputs. The SN0 and SN70 have minimum breakdown voltages of 0 V. The SN and SN7 have minimum breakdown voltages of V. The maximum sink current is 0 ma for the SN0 and SN, and 0 ma for the SN70 and SN7. SN0, SN, SN70, SN7 SDLS0 DECEMBER 9 REVISED DECEMBER 200 SN0, SN...J OR W PACKAGE SN70... D, N, OR NS PACKAGE SN7...D OR N PACKAGE (TOP VIEW) A Y A Y V CC A A SN0... FK PACKAGE (TOP VIEW) Y Y V CC A A No internal connection ORDERING INFORMATION TA PACKAGE ORDERABLE PART NUMBER SN70D SOIC D Tape and reel SN70DR SN7D 0 C to 70 C Tape and reel SN7DR C to 2 C PDIP N SN70N SN7N TOP-SIDE MARKING 70 7 SN70N SN7N SOP NS Tape and reel SN70NSR SN70 CDIP J CDIP W SNJ0J SNJ0J SNJJ SNJJ SNJ0W SNJ0W SNJW SNJW LCCC FK SNJ0FK SNJ0FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 200, Texas Instruments Incorporated On products compliant to MIL-PRF-, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 0 DALLAS, TEXAS 72
2 SDLS0 DECEMBER 9 REVISED DECEMBER 200 logic diagram (positive logic) 2 Y A Y A 9 0 A 2 Y = A schematic (each buffer/driver) 0, VCC kω. kω Input A 2 kω. kω Output Y 00 Ω kω Resistor values shown are nominal. absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage, V CC (see Note ) V Input voltage, V I (see Note ) V Output voltage, V O (see Notes and 2): SN0, SN V SN, SN V Package thermal impedance, θ JA (see Note ): D package C/W N package C/W NS package C/W Storage temperature range, T stg C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. Voltage values are with respect to network ground terminal. 2. This is the maximum voltage which should be applied to any output when it is in the off state.. The package thermal impedance is calculated in accordance with JESD POST OFFICE BOX 0 DALLAS, TEXAS 72
3 SDLS0 DECEMBER 9 REVISED DECEMBER 200 recommended operating conditions SN0 SN SN70 SN7 UNIT MIN NOM MAX MIN NOM MAX VCC Supply voltage V VIH High-level input voltage 2 2 V VIL Low-level input voltage V High-level output voltage IOL Low-level output current 0 0 ma TA Operating free-air temperature C V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN0 SN SN70 SN7 MIN TYP MAX MIN TYP MAX VIK VCC = MIN, II = 2 ma.. V IOH VCC = MIN, VIL = 0. V, = ma VOL VCC = MIN, VIH =2V IOL = ma IOL = II VCC = MAX, VI =. V ma IIH VCC = MAX, VIH = 2. V 0 0 µa IIL VCC = MAX, VIL = 0. V.. ma ICCH VCC = MAX 0 0 ma ICCL VCC = MAX 2 2 ma For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC = V, TA = 2 C. = 0 V for 0 and V for. IOL = 0 ma for SN and 0 ma for SN7. UNIT V switching characteristics, V CC = V, T A = 2 C (see Figure ) PARAMETER FROM (INPUT) TO (OUTPUT) A Y RL = 0 Ω, CL = pf TEST CONDITIONS MIN TYP MAX UNIT 0 2 ns POST OFFICE BOX 0 DALLAS, TEXAS 72
4 SDLS0 DECEMBER 9 REVISED DECEMBER 200 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test RL CL (see Note A) Test Point LOAD CIRCUIT Input V 0 V High-Level Pulse In-Phase Output VOL tw Low-Level Pulse Out-of-Phase Output VOL VOLTAGE WAVEFORMS PULSE WIDTHS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. C. All input pulses are supplied by generators having the following characteristics: PRR MHz, ZO = 0 Ω, tr 7 ns, tf 7 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure. Load Circuit and Voltage Waveforms POST OFFICE BOX 0 DALLAS, TEXAS 72
5 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 0 Dallas, Texas 72 Copyright 200, Texas Instruments Incorporated
ORDERING INFORMATION. TOP-SIDE MARKING PDIP N Tube SN74LS07N SN74LS07N PACKAGE. SOIC D Tape and reel SN74LS07DR
The SN54LS07 and SN74LS17 are obsolete and are no longer supplied. Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Driver
More informationSN54HC157, SN74HC157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SNHC, SNHC QUADRUPLE 2-LINE TO -LINE DATA SELECTORS/MULTIPLEXERS SCLSB DECEMBER 982 REVISED MAY 99 Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers
More informationSN54HC191, SN74HC191 4-BIT SYNCHRONOUS UP/DOWN BINARY COUNTERS
Single Down/Up Count-Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load Control Package Options Include Plastic
More informationSN54F157A, SN74F157A QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SNFA, SNFA QUADRUPLE -LINE TO -LINE DATA SELECTORS/MULTIPLEXERS SDFS0A MARCH 8 REVISED OCTOBER Buffered Inputs and Outputs Package Optio Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and
More informationSDLS068A DECEMBER 1972 REVISED OCTOBER 2001. Copyright 2001, Texas Instruments Incorporated
SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 PRODUCTION DATA information is current as of publication date. Products conform to
More informationSN54ALS191A, SN74ALS191A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS
Single own/ Up Count-Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load Control Package Optio Include Plastic Small-Outline
More informationSN28838 PAL-COLOR SUBCARRIER GENERATOR
Solid-State Reliability Surface-Mount Package NS PACKAE (TOP VIEW) description The SN28838 is a monolithic integrated circuit designed to interface with the SN28837 PALtiming generator in order to generate
More informationSN54165, SN54LS165A, SN74165, SN74LS165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS
The SN54165 and SN74165 devices SN54165, SN54LS165A, SN74165, SN74LS165A PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
More informationµa7800 SERIES POSITIVE-VOLTAGE REGULATORS
SLS056J MAY 976 REISED MAY 2003 3-Terminal Regulators Output Current up to.5 A Internal Thermal-Overload Protection High Power-Dissipation Capability Internal Short-Circuit Current Limiting Output Transistor
More informationTSL250, TSL251, TLS252 LIGHT-TO-VOLTAGE OPTICAL SENSORS
TSL50, TSL5, TLS5 SOES004C AUGUST 99 REVISED NOVEMBER 995 Monolithic Silicon IC Containing Photodiode, Operational Amplifier, and Feedback Components Converts Light Intensity to Output Voltage High Irradiance
More informationV OUT. I o+ & I o- (typical) 2.3A & 3.3A. Package Type
July 25 th, 2012 Automotive Grade AUIRS4427S DUAL LOW SIDE DRIVER Features Gate drive supply range from 6 V to 20 V CMOS Schmitt-triggered inputs 3.3V and 5V logic compatible Two independent gate drivers
More informationINTEGRATED CIRCUITS. 74F153 Dual 4-line to 1-line multiplexer. Product specification 1996 Jan 05 IC15 Data Handbook
INTEGRATED CIRCUITS 1996 Jan 05 IC15 Data Handbook FEATURES Non-inverting outputs Separate enable for each section Common select inputs See 74F253 for 3-State version PIN CONFIGURATION Ea 1 S1 2 I3a 3
More informationTSL213 64 1 INTEGRATED OPTO SENSOR
TSL 64 INTEGRATED OPTO SENSOR SOES009A D4059, NOVEMBER 99 REVISED AUGUST 99 Contains 64-Bit Static Shift Register Contains Analog Buffer With Sample and Hold for Analog Output Over Full Clock Period Single-Supply
More informationHEF4011B. 1. General description. 2. Features and benefits. 3. Ordering information. 4. Functional diagram. Quad 2-input NAND gate
Rev. 6 10 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a quad 2-input NAND gate. The outputs are fully buffered for the highest noise
More informationFilter Design in Thirty Seconds
Application Report SLOA093 December 2001 Filter Design in Thirty Seconds Bruce Carter High Performance Analog ABSTRACT Need a filter fast? No theory, very little math just working filter designs, and in
More informationdescription/ordering information
SCES207I APRIL 1999 REVISED SEPTEMBER 2003 Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V V CC Operation Inputs Accept Voltages to 5.5 V Max t pd of 6 ns at 3.3 V Low Power
More informationDM74LS05 Hex Inverters with Open-Collector Outputs
Hex Inverters with Open-Collector Outputs General Description This device contains six independent gates each of which performs the logic INVERT function. The open-collector outputs require external pull-up
More information3-input EXCLUSIVE-OR gate. The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function.
Rev. 02 3 September 2007 Product data sheet 1. General description The provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these
More information1-of-4 decoder/demultiplexer
Rev. 6 1 April 2016 Product data sheet 1. General description 2. Features and benefits 3. Applications The contains two 1-of-4 decoders/demultiplexers. Each has two address inputs (na0 and na1, an active
More informationStandard Linear & Logic Semiconductor Marking Guidelines
Application Report SZZA020C - March 2002 Standard Linear & Logic Semiconductor Marking Guidelines James Huckabee and Cles Troxtell Standard Linear & Logic ABSTRACT The Texas Instruments Standard Linear
More informationHEF4021B. 1. General description. 2. Features and benefits. 3. Ordering information. 8-bit static shift register
Rev. 10 21 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an (parallel-to-serial converter) with a synchronous serial data input (DS), a clock
More informationPACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) 5962-9557401QCA
More informationPI5C3244 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Features: Near-Zero propagation delay 5-ohm switches connect inputs to outputs when enabled Direct bus connection when switches are ON Ultra Low Quiescent Power (0.2µA Typical) Ideally suited for notebook
More informationLOW-VOLTAGE DUAL 1-OF-4 MULTIPLEXER/ DEMULTIPLEXER
LOW-VOLTAGE DUAL 1-OF-4 MULTIPLEXER/ DEMULTIPLEXER IDT74CBTLV3253 FEATURES: Functionally equivalent to QS3253 5Ω bi-directional switch connection between two ports Isolation under power-off conditions
More informationDM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers
September 1986 Revised April 2000 DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers General Description These data selectors/multiplexers contain inverters and drivers to supply full
More informationDesigning Gain and Offset in Thirty Seconds
Application Report SLOA097 February 2002 Designing Gain and Offset in Thirty Seconds Bruce Carter High Performance Linear ABSTRACT This document discusses how to design an operational amplifier (op amp)
More informationApplication Report. 1 Description of the Problem. Jeff Falin... PMP Portable Power Applications ABSTRACT
Application Report SLVA255 September 2006 Minimizing Ringing at the Switch Node of a Boost Converter Jeff Falin... PMP Portable Power Applications ABSTRACT This application report explains how to use proper
More informationSN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS
SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single 5-V Supply Differential Line Operation Dual-Channel Operation TTL Compatible ± 15-V Common-Mode
More informationAugust 2001 PMP Low Power SLVU051
User s Guide August 2001 PMP Low Power SLVU051 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service
More informationTS555. Low-power single CMOS timer. Description. Features. The TS555 is a single CMOS timer with very low consumption:
Low-power single CMOS timer Description Datasheet - production data The TS555 is a single CMOS timer with very low consumption: Features SO8 (plastic micropackage) Pin connections (top view) (I cc(typ)
More information74HC02; 74HCT02. 1. General description. 2. Features and benefits. Ordering information. Quad 2-input NOR gate
Rev. 5 26 November 2015 Product data sheet 1. General description 2. Features and benefits The is a quad 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors
More information4-bit binary full adder with fast carry CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT
Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The is specified in compliance
More informationLM556 LM556 Dual Timer
LM556 LM556 Dual Timer Literature Number: SNAS549 LM556 Dual Timer General Description The LM556 Dual timing circuit is a highly stable controller capable of producing accurate time delays or oscillation.
More information74F257A Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State)
INTEGRATED CIRCUITS Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State) 1995 Mar 31 IC15 Data Handbook Philips Semiconductors Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State)
More informationHow To Close The Loop On A Fully Differential Op Amp
Application Report SLOA099 - May 2002 Fully Differential Op Amps Made Easy Bruce Carter High Performance Linear ABSTRACT Fully differential op amps may be unfamiliar to some designers. This application
More informationQuad 2-input NAND Schmitt trigger
Rev. 9 15 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Applications The is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches
More informationData sheet acquired from Harris Semiconductor SCHS067B Revised July 2003
Data sheet acquired from Harris Semiconductor SCHS067B Revised July 2003 The CD4502B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages
More informationThe 74LVC1G11 provides a single 3-input AND gate.
Rev. 8 17 September 2015 Product data sheet 1. General description The provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
More information74HC377; 74HCT377. 1. General description. 2. Features and benefits. 3. Ordering information
Rev. 4 24 February 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an octal positive-edge triggered D-type flip-flop. The device features clock (CP)
More information3-to-8 line decoder, demultiplexer with address latches
Rev. 7 29 January 2016 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance with JEDEC
More information74HC2G02; 74HCT2G02. 1. General description. 2. Features and benefits. 3. Ordering information. Dual 2-input NOR gate
Rev. 5 27 September 2013 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a dual 2-input NOR gate. Inputs include clamp diodes. This enables the use of
More informationINTEGRATED CIRCUITS. 74LVC08A Quad 2-input AND gate. Product specification IC24 Data Handbook. 1997 Jun 30
INTEGRATED CIRCUITS IC24 Data Handbook 1997 Jun 30 FEATURES Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A Inputs accept voltages up to 5.5 V CMOS low power consumption
More informationDM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers
Dual 1-of-4 Line Data Selectors/Multiplexers General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection
More informationLow-power configurable multiple function gate
Rev. 7 10 September 2014 Product data sheet 1. General description The provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the
More informationData sheet acquired from Harris Semiconductor SCHS087D Revised October 2003
Data sheet acquired from Harris Semiconductor SCHS087D Revised October 2003 The CD4555B and CD4556B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line
More information74HC238; 74HCT238. 3-to-8 line decoder/demultiplexer
Rev. 4 27 January 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive
More informationMM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines
More informationbq2114 NiCd or NiMH Gas Gauge Module with Charge-Control Output Features General Description Pin Descriptions
Features Complete bq2014 Gas Gauge solution for NiCd or NiMH battery packs Charge-control output allows communication to external charge controller (bq2004) Battery information available over a single-wire
More information74HCU04. 1. General description. 2. Features and benefits. 3. Ordering information. Hex unbuffered inverter
Rev. 7 8 December 2015 Product data sheet 1. General description The is a hex unbuffered inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to
More information74HC154; 74HCT154. 4-to-16 line decoder/demultiplexer
Rev. 7 29 February 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually
More informationTIL311 HEXADECIMAL DISPLAY WITH LOGIC
SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA 0.300-Inch (7,62-mm) Character Height Internal TTL MSI Chip With Latch, Decoder, High Brightness
More information8-channel analog multiplexer/demultiplexer
Rev. 12 25 March 2016 Product data sheet 1. General description The is an with three address inputs (S1 to S3), an active LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common
More informationDM74LS151 1-of-8 Line Data Selector/Multiplexer
1-of-8 Line Data Selector/Multiplexer General Description This data selector/multiplexer contains full on-chip decoding to select the desired data source. The DM74LS151 selects one-of-eight data sources.
More informationHigh-speed switching diodes. Type number Package Configuration Package NXP JEITA JEDEC
Rev. 8 18 November 2010 Product data sheet 1. Product profile 1.1 General description, encapsulated in small Surface-Mounted Device (SMD) plastic packages. Table 1. Product overview Type number Package
More informationPACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) 76005012A
More informationHEF4013B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. Dual D-type flip-flop
Rev. 9 10 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Applications The is a dual D-type flip-flop that features independent set-direct input (SD), clear-direct input
More information14-stage ripple-carry binary counter/divider and oscillator
Rev. 8 25 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to
More informationAUIPS71411G CURRENT SENSE HIGH SIDE SWITCH
February, 21st 2010 Automotive grade AUIPS71411G CURRENT SENSE HIGH SIDE SWITCH Features Suitable 24V battery operation Over current shutdown Over temperature shutdown Current sensing Active clamp Low
More informationTriple single-pole double-throw analog switch
Rev. 12 25 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Applications 4. Ordering information The is a triple single-pole double-throw (SPDT) analog switch, suitable
More informationData sheet acquired from Harris Semiconductor SCHS020C Revised October 2003
Data sheet acquired from Harris Semiconductor SCHS020C Revised October 2003 The CD4009UB and CD4010B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line
More information74HC175; 74HCT175. Quad D-type flip-flop with reset; positive-edge trigger
Rev. 5 29 January 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a quad positive-edge triggered D-type flip-flop with individual data inputs (Dn)
More informationBAT54 series SOT23 Schottky barrier diodes Rev. 5 5 October 2012 Product data sheet 1. Product profile 1.1 General description
SOT2 Rev. 5 5 October 2012 Product data sheet 1. Product profile 1.1 General description Planar with an integrated guard ring for stress protection, encapsulated in a small SOT2 (TO-26AB) Surface-Mounted
More information54LS174,54LS175,DM54LS174,DM54LS175, DM74LS174,DM74LS175
54LS174,54LS175,DM54LS174,DM54LS175, DM74LS174,DM74LS175 54LS174 DM54LS174 DM74LS174 54LS175 DM54LS175 DM74LS175 Hex/Quad D Flip-Flops with Clear Literature Number: SNOS290A 54LS174 DM54LS174 DM74LS174
More informationMedium power Schottky barrier single diode
Rev. 03 17 October 2008 Product data sheet 1. Product profile 1.1 General description Planar medium power Schottky barrier single diode with an integrated guard ring for stress protection, encapsulated
More informationThe 74LVC1G04 provides one inverting buffer.
Rev. 12 6 ugust 2012 Product data sheet 1. General description The provides one inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in
More informationLM5030 LM5030 Application: DC - DC Converter Utilizing the Push-Pull Topology
LM5030 LM5030 Application: DC - DC Converter Utilizing the Push-Pull Topology Literature Number: SNVA553 LM5030 Application DC DC Converter Utilizing the Push-Pull Topology 1 Push-Pull Topology D1 L +
More informationULN2801A, ULN2802A, ULN2803A, ULN2804A
ULN2801A, ULN2802A, ULN2803A, ULN2804A Eight Darlington array Datasheet production data Features Eight Darlington transistors with common emitters Output current to 500 ma Output voltage to 50 V Integral
More information74HC107; 74HCT107. Dual JK flip-flop with reset; negative-edge trigger
Rev. 5 30 November 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a dual negative edge triggered JK flip-flop featuring individual J and K inputs,
More informationHex buffer with open-drain outputs
Rev. 5 27 October 20 Product data sheet. General description The provides six non-inverting buffers. The outputs are open-drain and can be connected to other open-drain outputs to implement active-low
More informationSchottky barrier quadruple diode
Rev. 3 8 October 2012 Product data sheet 1. Product profile 1.1 General description with an integrated guard ring for stress protection. Two electrically isolated dual Schottky barrier diodes series, encapsulated
More informationControlling TAS5026 Volume After Error Recovery
Application Report SLEA009 March 2003 Controlling TAS5026 Volume After Error Recovery Jorge S. Melson Hwang Soo, Son HPA Digital Audio Applications ABSTRACT The TAS5026 monitors the relationship between
More informationPressure Transducer to ADC Application
Application Report SLOA05 October 2000 Pressure Transducer to ADC Application John Bishop ABSTRACT Advanced Analog Products/OpAmp Applications A range of bridgetype transducers can measure numerous process
More informationSN54/74LS682 SN54/74LS684 8-BIT MAGNITUDE COMPARATORS SN54/74LS688 8-BIT MAGNITUDE COMPARATORS FAST AND LS TTL DATA 5-603
8-BIT MAGNITUDE COMPARATORS The SN54/ 74LS682, 684, 688 are 8-bit magnitude comparators. These device types are designed to perform compariso between two eight-bit binary or BCD words. All device types
More informationOLF500: High CMR, High-Speed Logic Gate Hermetic Surface Mount Optocoupler
TM DATA SHEET OLF500: High CMR, High-Speed Logic Gate Hermetic Surface Mount Optocoupler Features Hermetic SMT flat-pack package Electrical parameters guaranteed over 55 C to +125 C ambient temperature
More informationLow forward voltage High breakdown voltage Guard-ring protected Hermetically sealed glass SMD package
Rev. 6 10 September 2010 Product data sheet 1. Product profile 1.1 General description Planar with an integrated guard ring for stress protection, encapsulated in a small hermetically sealed glass SOD80C
More informationDM74LS169A Synchronous 4-Bit Up/Down Binary Counter
Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation
More informationULN2001, ULN2002 ULN2003, ULN2004
ULN2001, ULN2002 ULN2003, ULN2004 Seven Darlington array Datasheet production data Features Seven Darlingtons per package Output current 500 ma per driver (600 ma peak) Output voltage 50 V Integrated suppression
More information74HC4040; 74HCT4040. 12-stage binary ripple counter
Rev. 5 3 February 2016 Product data sheet 1. General description 2. Features and benefits 3. Applications 4. Ordering information The is a with a clock input (CP), an overriding asynchronous master reset
More informationMM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicongate CMOS technology, which provides
More informationMM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines
More informationMM74HC174 Hex D-Type Flip-Flops with Clear
Hex D-Type Flip-Flops with Clear General Description The MM74HC174 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise immunity,
More informationUTC UNISONIC TECHNOLOGIES CO. LTD 1 LINEAR INTEGRATED CIRCUIT 7CH DARLINGTON SINK DRIVER
kω UTC ULN 7CH DARLINGTON SINK DRIVER DESCRIPTION The UTC ULN is high-voltage, high-current darlington drivers comprised of seven NPN darlingto pairs. All units feature integral clamp diodes for switching
More informationTexas Instruments. FB PS LLC Test Report HVPS SYSTEM AND APPLICATION TEAM REVA
Texas Instruments FB PS LLC Test Report HVPS SYSTEM AND APPLICATION TEAM REVA 12/05/2014 1 General 1.1 PURPOSE Provide the detailed data for evaluating and verifying the FB-PS-LLC. The FB-PS-LLC is a Full
More information74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 7 4 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device
More information8-bit binary counter with output register; 3-state
Rev. 3 24 February 2016 Product data sheet 1. General description The is an 8-bit binary counter with a storage register and 3-state outputs. The storage register has parallel (Q0 to Q7) outputs. The binary
More informationCD4013BC Dual D-Type Flip-Flop
CD4013BC Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors.
More information74HC138; 74HCT138. 3-to-8 line decoder/demultiplexer; inverting
Rev. 6 28 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive
More informationCAN bus ESD protection diode
Rev. 04 15 February 2008 Product data sheet 1. Product profile 1.1 General description in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package designed to protect two automotive Controller
More informationHow To Make A Two Series Cell Battery Pack Supervisor Module
Features Complete and compact lithium-ion pack supervisor Provides overvoltage, undervoltage, and overcurrent protection for two series Li-Ion cells Combines bq2058t with charge/discharge control FETs
More information74HC32; 74HCT32. 1. General description. 2. Features and benefits. Quad 2-input OR gate
Rev. 5 4 September 202 Product data sheet. General description The is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages
More informationLM134-LM234-LM334. Three terminal adjustable current sources. Features. Description
Three terminal adjustable current sources Features Operates from 1V to 40V 0.02%/V current regulation Programmable from 1µA to 10mA ±3% initial accuracy Description The LM134/LM234/LM334 are 3-terminal
More informationRETRIEVING DATA FROM THE DDC112
RETRIEVING DATA FROM THE by Jim Todsen This application bulletin explains how to retrieve data from the. It elaborates on the discussion given in the data sheet and provides additional information to allow
More informationCD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated
More informationMM74HC273 Octal D-Type Flip-Flops with Clear
MM74HC273 Octal D-Type Flip-Flops with Clear General Description The MM74HC273 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise
More informationCD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop
Hex D-Type Flip-Flop Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered D- type flip-flops; the true outputs from each flip-flop are externally available. The
More informationCUSTOM GOOGLE SEARCH PRO. User Guide. User Guide Page 1
CUSTOM GOOGLE SEARCH PRO User Guide User Guide Page 1 Important Notice reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
More information74HC393; 74HCT393. Dual 4-bit binary ripple counter
Rev. 6 3 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The 74HC393; 7474HCT393 is a dual 4-stage binary ripple counter. Each counter features
More informationMC14008B. 4-Bit Full Adder
4-Bit Full Adder The MC4008B 4bit full adder is constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure. This device consists of four full adders with fast
More information74HC165; 74HCT165. 8-bit parallel-in/serial out shift register
Rev. 4 28 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Applications 4. Ordering information The is an 8-bit serial or parallel-in/serial-out shift register. The device
More informationINTEGRATED CIRCUITS. 74F74 Dual D-type flip-flop. Product specification Supercedes data of 1990 Oct 23 IC15 Data Handbook.
INTEGRATED CIRCUITS Supercedes data of 1990 Oct 23 IC15 Data Handbook 1996 Mar 12 FEATURE Industrial temperature range available ( 40 C to +85 C) DESCRIPTION The is a dual positive edge-triggered D-type
More information