Lecture 15 Serial Communication, SCI Registers and Operations

Transcription

1 Lecture 15 Serial Communication, SCI Registers and Operations Contents Fundamental Concept of Serial Communications The RS-232 Standard TIA-232E Electrical Specifications TIA-232E Functional Specification TIA-232E Mechanical Specifications TIA-232E Procedural Specification... 5 a. Point-to-Point Asynchronous Connection with Direct Link... 5 b. Asynchronous Connection over Public Phone Line Data Format Data Format Example Example (Example 9.1) Data Format Example Baud Rate Example Baud Rate The HCS12 Serial Communication Interface SCI Baud Rate Generation SCI Control Registers SCI Status Registers Serial Communication Data Registers (SCIxDRH/SCIxDRL) Character Transmission Sending Break Characters Idle Characters Character Reception Receiver Wake-up Idle Line Wake-Up Address Mark Wake-up SCI Examples Example Baud Rate Example Setting SCI1CR Example Setting SCI1CR Example Checking Status of SCI1SR Example Sending and Receiving Characters to/from SCI1DR Example Setup SCI Example Reading a Character from SCI1 using Polling Method Example Writing a Character to SCI1 Using Polling Method Example Input a String Lecture 15 Serial Communication, SCI Registers and Operations Page 1 of 18

2 15.1. Fundamental Concept of Serial Communications There is a need for data exchange between the Multipoint Control Unit (MCU) and peripheral devices. Parallel data transfer is most convenient way, but it has many disadvantages: Parallel data transfer requires many I/O pins, which are limited in microcontroller. Furthermore, only a few devices can interface with the microcontroller through the fixed numbers of I/O pins. Many I/O devices do not have high data rate in order to employ the parallel data transfer. Data synchronization for parallel transfer is difficult to achieve over a long distance. It has a higher cost to implement. Therefore, the serial communication interface (SCI) was designed as an alternative to transfer data serially in an asynchronous fashion that utilizes the industrial standard TIA-232 protocol. The TIA-232 was originally called RS-232 because it was a recommended standard. Only two wires are used by the SCI function The RS-232 Standard The RS232 Standard (prefix RS stands for Recommended Standard) was established in 1960 by the Electronic Industry Association (EIA) for interfacing between a computer and a modem. It has been revised since then. The latest revision TIA-232F (Telecommunication Industry Association) was published in July In data communication terms, both computers and terminals are called data terminal equipment (DTE), whereas modems, bridges, and routers are referred to as data communication equipment (DCE). In general, there are four aspects to TIA- 232 standard: Electrical specifications specify the voltage level, rise time and fall time of each signal, achievable data rate, and the distance of communication. Functional specifications specify the function of each signal. Mechanical specifications specify the number of pins and the shape and dimensions of the connectors. Procedural specifications specify the sequence of events for transmitting data, based on the functional specifications of the interface. There are three kinds of data communication links: simplex link, half-duplex link, full-duplex link. The communication links are configured into two categories: point-to-point and multidrop Lecture 15 Serial Communication, SCI Registers and Operations Page 2 of 18

3 1. TIA-232E Electrical Specifications Here are electrical specifications of TIA-232E are important to us: Data Rate (Baud Rate) The TIA-232E standard is applicable to data rates of up to 20,000 bits per second. Fixed baud rates are not set by the TIA-232E standard. However, the commonly used values are 300, 1200, 2400, 9600, and 19,200 baud. Signal state voltage assignments voltages of 3V to 25V with respect to signal ground are considered logic 1 (the mark condition), whereas voltages of +3V to +25V are considered logic 0 (the space condition). The range of voltages between 3V and +3V is considered a transition region for which a signal state is not assigned. Signal transfer distance the signal should be able to transfer correctly within 15m. However, greater distance can be achieved with good design. 2. TIA-232E Functional Specification The TIA-232E standard specifies 22 signals, which are summarized in Table 1. These signals can be divided into six categories: Signal ground and shield. Primary communication channel it is used for data interchange and includes flow control signal. Secondary communication channel it is used for control of the remote modem (if implemented), requests for re-transmission when errors occurs, and configuration of the primary channel. Modem status and control signals These signals indicate modem status and provide intermediate checkpoints as the telephone voice channel is established. Transmitter and receiver timing signals if a synchronous protocol is used, the signals provide timing information for the transmitter and receiver, which may operate at different baud rate. Channel test signal before data is exchanged, the channel be tested for its integrity and the baud rate automatically adjusted to the maximum rate that the channel could support. Table 1 Functions of EIA-232E Signal Lecture 15 Serial Communication, SCI Registers and Operations Page 3 of 18

4 All detail descriptions of pins are in the textbook (page ) 3. TIA-232E Mechanical Specifications The TIA-232E uses a 25-pin D-type connector. Since only a small subset of the 25 signals is actually used, a 9-pin connector (DB9) is used in most PCs. Lecture 15 Serial Communication, SCI Registers and Operations Page 4 of 18

5 4. TIA-232E Procedural Specification It specifies the sequence of events that occurs during data transmission using the TIA-232E. a. Point-to-Point Asynchronous Connection with Direct Link TIA-232 signals involved for the communication are: signal ground (GND), transmitted data (Tx), received data (Rx), request to send (RTS), Clear to send (CTS), Data set ready (DSR), Carrier detect (CD). Lecture 15 Serial Communication, SCI Registers and Operations Page 5 of 18

6 Sequence of events occurred during data transmission over dedicated link Local 1. DCE asserts DSR 2. DTE asserts RTS 3. DCE asserts CTS Time Remote 4. DTE starts to send data (to local DCE) 5. DCE sends out a carrier and then the modulated data 6. DCE asserts CD 7. DTE waits for arrival of data 8. DCE sends out demodulated received data 9. DTE receives demodulated data b. Asynchronous Connection over Public Phone Line EIA-232-E signals involved: Signal ground (GND), Transmitted data (Tx), Received data (Rx), Request to send (RTS), Clear to send (CTS), Data set ready (DSR), Carrier detect (CD), Data terminal ready (DTR), Ring indicator (RI). In addition, the signal DTR is used by the DTE to indicate its intention to make a call or accept a call and the signal RI is used by the DCE to indicate that there is an incoming call Data Format In asynchronous data transfer, data is transferred character by character. Each character is preceded by a start bit (a low), followed by 8 or 9 data bits, and terminated by a stop bit. Lecture 15 Serial Communication, SCI Registers and Operations Page 6 of 18

7 For each character, the least significant bit is transmitted first, and the most significant bit is transmitted last. The stop bit is high. The start bit and the stop bit signify the beginning and the end of a character. The time between each bit is called bit time. The number of bits is transferred in one second is called bit rate (baud rate) bits/sec. In order to determine a valid bit, the SCI uses a clock with a frequency about 16 times that of the data rate to sample the RxD signal. To determine the start bit, the SCI waits for the falling edge after the RxD pin has been idle (high) for at least three sampling times. It will then look at the third, fifth, and seventh samples after the first low samples to determine if a valid start bit has arrived. To determine the value of a data bit, the SCI looks at the majority of the eighth, ninth, and tenth samples are 1s, then the data bit is determined to be 1. Otherwise, the data bit is determined to Data Format Example 1. Example Data Format Sketch the output of the letter g when it is transmitted using the format of one start bit, 8 data bit, and 1 stop bit Solution: The ASCII code of letter g is $67 or % This code will be followed by a stop bit. The output from the DTE should be: Lecture 15 Serial Communication, SCI Registers and Operations Page 7 of 18

8 2. Example Baud Rate How long does it take to transmit one character at the speed of 9600 baud? Each character is transmitted using a format with nine data bits, and one stop bit. Solution: Each character consists 11 bits (1 start bit, 9 data bit, and 1 stop bit). Each bit requires 104 μs (= 1 sec 9600). One character requires µs = ms to transmit. 3. Example Baud Rate For an ASCII character with 1 start bit, 9 data bits, 1 stop bit, and a rate of 4800 baud, calculate: a. The bit time 1 1 Bit Time s / bit baud 4800 bits / s b. The character rate 1character 1start 9data 1stop 11bits 1character 4800 bits 1 character character rate baud 11bits sec 11bits characters / sec c. The character time 11bits 11bits s Character time Bit Time 1character 1character bit ms / character d. The time to transfer a message of 500 characters 2.292ms time Character time 500 characters 500 characters character s The HCS12 Serial Communication Interface An HCS12 device may have one or two serial communication interfaces. These two SCI modules are referred to as SCI0 and SCI1. The SCI0 module shares the use of the Port S pins PS1 (TxD0) and PS0 (RxD0); the SCI1 modules use the Port S pins PS3 (TxD1) and PS2 (RxD1). In the Dragon12-Plus-USB board (MC9S12DG256), SCI0 receives signal from USB port. Lecture 15 Serial Communication, SCI Registers and Operations Page 8 of 18

9 The operation of an SCI module involves the following registers: Two baud rate registers: SCIxBDH and SCIxBDL (x = 0 or 1) Two control registers: SCIxCR1 and SCIxCR2 (x = 0 or 1) Two status registers: SCIxSR1 and SCIxSR2 (x = 0 or 1) Two data registers: SCIxDRH and SCIxDRL (x = 0 or 1) SCI Baud Rate Generation The SCI modules of the HCS12 use a clock signal that is 16 times the data rate to detect the arrival of the start bit and determine the logic value of data bits. The HCS12 modules use a 13- bit counter to generate this clock signal. This circuit is called baud rate generator. To set the baud rate to a certain value, we needs to write an appropriate value to the SCIxBDH:SCIxBDL register pair. The upper 3 bits of the SCIxBDH registers are connected to zeros. The baud rate generator divides down the E-clock to derive the clock signal for the reception and transmission. The value (SBR) to be written into the SCIxBDH:SCIxBDL register pair is calculated by: Lecture 15 Serial Communication, SCI Registers and Operations Page 9 of 18

10 SBR 16 baud rate Here is an example of SBR for different baud rates for the 16-MHz and 24-MHz E clocks. f E SCI Control Registers The operation of the SCI module is controlled by two control registers: SCI0CR1 (SCI1CR1) and SCI0CR2 (SCI1CR2). Figure 1 SCI Control Register 1 (SCI0CR1/SCI1CR1) Lecture 15 Serial Communication, SCI Registers and Operations Page 10 of 18

11 TIE TCIE RIE ILIE TE RE RWU SBK TIE: transmit interrupt enable bit 0 = TDRE interrupt disabled. 1 = TDRE interrupt enabled. TCIE: transmit complete interrupt enable bit 0 = TC interrupt disabled. 1 = TC interrupt enabled. RIE: receiver full interrupt enable bit 0 = RDRF and OR interrupts disabled. 1 = RDRF and OR interrupt enabled. ILIE: idle line interrupt enable bit 0 = IDLE interrupt disabled. 1 = IDLE interrupt enabled. TE: transmitter enable bit 0 = transmitter disabled. 1 = transmitter enabled. RE: receiver enable 0 = receiver disabled. 1 = receiver enabled. RWU: receiver wakeup bit 0 = normal SCI receiver. 1 = enables the wakeup function and inhibits further receiver interrupts. Normally, hardware wakes up the receiver by automatically clearing this bit. SBK: send break bit 0 = no break characters. 1 = generate a break code, at least 10 or 11 contiguous 0s. As long as SBK remains set, the transmitter sends 0s. Reset value = 0x00 Figure 2 SCI Control Register 2 (SCI0CR2/SCI1CR2) SCI Status Registers There are two status registers that show the current status of transmitting or receiving characters on SCI. Figure 3 SCI Status Register 1 (SCI0SR1/SCI1SR1) Lecture 15 Serial Communication, SCI Registers and Operations Page 11 of 18

12 Figure 4 SCI Status Register 2 (SCI0SR2/SCI1SR2) Serial Communication Data Registers (SCIxDRH/SCIxDRL) There are two registers for SCI data registers. If the data bit is set to 9-bit format, bits 7 and 8 of SCIxDRH are used for 9 th bit. For transmitting data, bit 6 of SCIxDRH is used for the 9 th bit for data. For receiving data, bit 7 of SCIxDRH is used for the 9 th bit. SCIxDRL is used for both transmitting and receiving data. Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SCIxDRH R8 T SCIxDRL R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T Character Transmission To transmit a character from the SCI module, the user writes the data bits into the SCIxDRH and SCIxDRL registers. The data bits in SCIxDRH and SCIxDRL registers will be transferred to the transmit shift register and shifted out serially from the TxD pin. Each time the SCI transfers data from the buffer SCIxDRH/L to the transmit shift register, it also sets the TDRE flag in the SCIxSR1 register. The setting of the TDRE flag indicates that the MCU can write new data into the SCI data register. When the transmit shift register is not transmitting data, the TxD signal goes to idle state. When both the transmit data registers and shift register are empty, the TC flag in the SCIxSR1 register is set to 1. An interrupt may be requested to the MCU if the TDRE or TC flag is set to 1. Lecture 15 Serial Communication, SCI Registers and Operations Page 12 of 18

13 1. Sending Break Characters A break character is represented by eight or nine logic 0 data bits depending on the character data length. Whenever one party in the data communications discovers an error, it can send break characters to discontinue the communication and start over again. To send break characters, the user sets the SBK bit in the SCIxCR1 register to 1. As long as the SBK bit is 1, the transmitter logic continuously sending out the break character. 2. Idle Characters An idle character contains all 1s and has no start, stop, or parity bit. Depending on the character data length, an idle character can be eight or nine 1s. If the TE bit in the SCIxCR2 register is cleared during a transmission, the TxD signal becomes idle after the completion of the transmission in progress Character Reception The SCI receiver can handle either 8- or 9-bit characters. When receiving 9-bit data, the R8 bit of the SCIxDRH register holds the ninth bit. During an SCI reception, the receive shift register shifts in a frame from the RxD pin. After a complete frame is shifted into the receive shift register, the data portion of the frame is transferred to the SCI data register. The receive data register full flag in the SCIxSR1 register is set to 1. An interrupt may be requested to the MCU if it is enabled. Lecture 15 Serial Communication, SCI Registers and Operations Page 13 of 18

14 Receiver Wake-up The SCI module supports the HCS12 to operate in a multiple-receiver system. When a message is not intended for this MCU, the SCI module will put itself into a standby state or ignore the rest of the message. This is done by setting the RWU bit of the SCIxCR2 register. In the standby state, the SCI module will still load the receive data into SCIxDRH/L registers, but it will not set the RDRF flag. 1. Idle Line Wake-Up When the idle line wake-up method is chosen, an idle condition on the RxD pin clears the RWU bit in the SCIxCR2 and wakes up the SCI. The initial frame or frames of every message contain addressing information. All receivers check the addressing information to see whether the addressing information is for them. If it is, they continue to process the frames that follow. If it is not, they set their RWU bits and return to the standby state. The RWU bits remain set and the receivers remain on the standby state until another idle character appears on the RxD signal. 2. Address Mark Wake-up In this wake-up method, a logic 1 in the most significant bit (msb) position of a frame clears the RWU bit and wakes up the SCI. The logic 1 in the msb position marks a frame as an address frame that contains addressing information. All receivers check the addressing information to see whether the addressing information is for them. If it is, they continue to process the frames that follow. If it is not, they set their RWU bits and return to the standby state. The logic 1 of an address frame clears the receiver s RWU bit before the stop bit is received and sets the RDRF flag. Address mark wake-up allows messages to contain idle characters but requires that the msb be reserved for us in address frames. Lecture 15 Serial Communication, SCI Registers and Operations Page 14 of 18

15 SCI Examples 1. Example Baud Rate Write an instruction sequence that configures SCI1 for baud with the 24-MHz E clock Solution: fe 24MHz SBR 78 4E 16 baud rate 16*19200 MOVB #$00, SCI1BDH ; set SCI1BDH MOVB #$4E, SCI1BDL ; set SCI1BDL Alternative Solution: SCI1_Ctl_Bytes DC.B $00 ; SCI1BDH = 0 DC.B $4E ; SCI1BDL = 78 = $4E... LDX #SCI1_Ctl_Bytes ; IX <- address of SCI1_Ctl_Bytes MOVB 1, X+, SCI1BDH ; SCI1BDH MOVB 1, X+, SCI1BDL ; SCI1BDL 2. Example Setting SCI1CR1 Write an instruction sequence that configures SCI1 for baud, 8-data bit, 1 stop bit, no parity with the 24-MHz E clock Solution: SCI1_Ctl_Bytes DC.B $00 ; SCI1BDH = 0 DC.B $4E ; SCI1BDL = 78 = $4E DC.B $00 ; SCI1CR1: 8-data, 1 stop bit, no parity... LDX #SCI1_Ctl_Bytes ; IX <- address of SCI1_Ctl_Bytes MOVB 1, X+, SCI1BDH ; SCI1BDH MOVB 1, X+, SCI1BDL ; SCI1BDL MOVB 1, X+, SCI1CR1 ; setting SC1CR1 for data format 3. Example Setting SCI1CR2 Write an instruction sequence that configures SCI1 for baud, 8-data bit, 1 stop bit, no parity, enable transmitting data empty flag and receiving data full flag with the 24-MHz E clock Solution: SCI1_Ctl_Bytes DC.B $00 ; SCI1BDH = 0 DC.B $4E ; SCI1BDL = 78 = $4E DC.B $00 ; SCI1CR1: 8-data, 1 stop bit, no parity DC.B $0C ; SCI1CR2: TE, RE enabled... LDX MOVB #SCI1_Ctl_Bytes ; IX <- address of SCI1_Ctl_Bytes 1, X+, SCI1BDH ; SCI1BDH Lecture 15 Serial Communication, SCI Registers and Operations Page 15 of 18

16 MOVB MOVB MOVB 1, X+, SCI1BDL ; SCI1BDL 1, X+, SCI1CR1 ; setting SC1CR1 for data format 1, X+, SCI1CR2 ; setting SCI1CR2 4. Example Checking Status of SCI1SR Write an instruction sequence that checks SCI1 status register for receiving and sending a character. Solution: In_SCI1 LDAA BITA BEQ LDAA ANDA BRA No_Char: LDAA In_SCI1_Done: RTS SCI1SR1 #msci1sr1_rdrf No_Char SCI1DRL #$7F In_SCI1_Done #NULL Out_SCI1 BRCLR SCI1SR1, msci1sr1_tdre, * STAA SCI1DRL RTS 5. Example Sending and Receiving Characters to/from SCI1DR Write an instruction sequence that receives a character from SCI1DR or sends a character to SCI1DR. If there is no character available, a NULL character is placed in ACCA. Solution: In_SCI1 LDAA BITA BEQ LDAA ANDA BRA No_Char: LDAA In_SCI1_Done: RTS SCI1SR1 #msci1sr1_rdrf No_Char SCI1DRL #$7F In_SCI1_Done #NULL Out_SCI1 BRCLR SCI1SR1, msci1sr1_tdre, * STAA SCI1DRL RTS 6. Example Setup SCI Write a subroutine that initialized the HCS12 SCI1 subsystem to operate with the following parameters: 9600 baud of 24-MHz E clock. 1 start bit, 8 data bits, and 1 stop bit no interrupt for receive and transmit enable receive and transmit idle line wakeup do not send break Solution: 9600 baud of 24-MHz E clock : Lecture 15 Serial Communication, SCI Registers and Operations Page 16 of 18

17 fe 24MHz SBR 156 $9C 16 baud rate 16*9600 o Write $00 to SCI1BDH, and $9C into SCI1BDL 1 start bit, 8 data bits, and 1 stop bit: o Write $00 to SCI1CR1 enable receive and transmit, idle line wakeup, do not send break o Write $0C to SCI1CR2 Here is the assembly code: SCI1_Ctl_Bytes DC.B $00 ; SCI1BDH = 0 DC.B $9C ; SCI1BDL = 156 = $9C DC.B $00 ; SCI1CR1: 8-data, 1 stop bit, no parity DC.B $0C ; SCI1CR2: TE, RE enabled... ;************************************************************************* ; Init_SCI1 - initializes SCI1 with the control bytes in SCI1_Ctl_Bytes ;************************************************************************* Init_SCI1 LDX #SCI1_Ctl_Bytes ; IX <- address of sci_init_byte MOVB 1, X+, SCI1BDH ; SCI1BDH MOVB 1, X+, SCI1BDL ; SCI1BDL MOVB 1, X+, SCI1CR1 ; SCI1CR1 MOVB 1, X+, SCI1CR2 ; SCI1CR2 RTS 7. Example Reading a Character from SCI1 using Polling Method Write a subroutine to read a character from SCI1 using the polling method. The character will be returned in accumulator A. Solution The subroutine will wait until the RDRF bit is set to 1 and then read the character. ;************************************************************************* ;* In_SCI1 - reads an ASCII character from SCI1 and saves it into ACCA. ;************************************************************************* In_SCI1 LDAA SCI1SR1 BITA #msci1sr1_rdrf ; check RDRF flag BEQ In_SCI1 LDAA SCI1DRL ; read a character from SCI1 ANDA #$7F ; clear parity bit RTS 8. Example Writing a Character to SCI1 Using Polling Method Write a subroutine to output a character to SCI1 using the polling method. The character to be output is in accumulator A. Solution: The subroutine will wait until the TDRE bit is set to 1 and then send out the character. ;************************************************************************* ;* Out_SCI1 - sends an ASCII character in ACCA to SCI1 Lecture 15 Serial Communication, SCI Registers and Operations Page 17 of 18

18 ;************************************************************************* Out_SCI1 BRCLR SCI1SR1, msci1sr1_tdre, * ; check TDRE flag STAA SCI1DRL ; send a character to SCI1 RTS 9. Example Input a String Write a subroutine to input a string from SCI1. The string is terminated by the carriage return character and must be stored in a buffer pointed to by index register X. instr JSR In_SCI1 CMPA #NULL ;check for any character BEQ end JSR Out_SCI1 ; echo it back to SCI1 CMPA #CR ; is it a carriage return(ascii code is 0x0D) BEQ stop STAA 0, X ; save the character and increment the pointer INX BRA end stop CLR 0, X ; terminate the string by a NULL character MOVB #1, strflag end RTS Lecture 15 Serial Communication, SCI Registers and Operations Page 18 of 18