Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C- Ware, the Energy Efficient Solutions logo, Kinetis,

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1 May 2013 Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C- Ware, the Energy Efficient Solutions logo, Kinetis, mobilegt, PEG, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMAROS, Tower, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc.

2 Introduction Freescale MPC56xxS Cluster Devices Example Applications Development Tools Stepper Stall Detection Stepper Motor Control Display Control Unit 2

3 MPC5606S cluster peripherals DCU (WQVGA TFT screen controller) 6x SSD + SMC (stepper motor controller) 40 x 4 LCD display driver 1 MB flash, 64k emulated EEPROM, 48kB SRAM, 160kB graphics RAM, CAN, LIN MPC5645S cluster peripherals 2x DCU (WVGA resolution) 6x SSD + SMC 2 MB flash, 4x16kB emulated EEPROM, 64kB SRAM, 1 MB graphics SRAM 3

4 MPC5606S MPC5645S 4

5 (TWR-PXD10 or TWR-PXD20) + TWR-LCD-RGB and TWR- ELEV Or AND MPC5606S-DEMO MPC5645S-DEMO 5

6 In automotive cluster applications the rotor of the stepper motor is fittes with a pointer. At startup the position should be zeroed out to maintain an accurate reference. As the gauge returns to zero, the SSD module detects the pointer collision with the stopper. 6

7 The polarity of the SSD pins can be switched Flexible preescaler Offset cancelation minimizes the internal accumulation error Drives the movement of the stepper motor in full steps. At the same time the motor is moved, the stall detection works to detect the zero Complete return to zero function supported for all 6 motors 7

8 Integrated high current drivers for stepper motors. Up to 6 motors are supported. Direct connection from MCU to motors with no external components. Advanced PWM functions to create waveforms. Alignment, delay, dithering of PWM is supported. Choice of type of step (full step, half step, micro step) is up to the user and is supported by hardware module 8

9 The Stepper Motor Control (SMC) module is designed to facilitate the simple creation of the waveforms required to drive stepper motors using microstepping. The module contains 12 Pulse Wave Modulation (PWM) channels, clocked by an 11-bit counter. Each channel is associated with two pins giving a total of 24 pins. The module also has the ability to detect a short circuit on any of these pins and can be configured to trigger an interrupt when one occurs. An optional interrupt can also be triggered upon a timer counter overflow. 9

10 Internal Flash DMA Internal RAM DMA DCU DMA External Flash 10

11 Layer Control Descriptors Registers CLUT/ Tile Memory 6kB Gamma Correction table Cursor Memory mapped register area FIFO1 Crossbar DMA FIFO2 FIFO3 Format converter Blend/ Color key Gamma correction Display drive FIFO4 DCU Clock Video source PDI Ext. Video Sync Ext. Video CLK CLK Manager Safety CRC calculation Source pixel format 24 bit pixel data 11

12 DCU combines layers of sprites to create the final content There are up to 19 different sources of content possible 16 programmable layers that contain source graphics A cursor layer 1 layer as a default color for the background OR 1 layer for an external video input Layers are set in a fixed priority that determines order of pixels selected to blend For each pixel position The DCU fetches a pixel from the topmost layer placed there AND A pixel from the next layer in the priority And pixels from up to two further layers (dependent on user configuration) Indexed colors are converted to 24bpp colors for internal processing The fetched pixels are then blended to give the display content for that position The blending attributes are determined per layer and the lowest priority pixel s blending attributes are ignored Each resulting pixel can be gamma corrected The output format is 8-bits per color (24bpp) 12

13 A layer is the DCU mechanism by which graphics are displayed on the panel Pick the paradigm that works for you: A layer is a graphics-oriented interface to the DCU s DMA function and contains commands for the blending engine A layer is an object that encapsulates all of the information needed to display and blend a single image on the TFT panel A layer is a set of registers that you program to display an image There are 16 layers available Each has a fixed priority (0 highest priority) Each can be enabled individually Each is buffered and can be changed at any time The DCU automatically synchronizes changes to the panel refresh cycle Not all graphic content is provided by the layers 13

14 The DCU has a set of 7 registers to configure each layer The layer registers configure Height & width of layer (pixels) Position on panel (x,y) (pixels) Pointer to the graphic (address) and its encoding and its palette (if needed) Pixel selection By color range Transparency Tile option y x 14

15 There are two main types of graphic encoding and one special type RGB where each pixel in the image contains red, green and blue components ARGB where each pixel in the image contains red, green and blue components and an alpha channel Transparency where each pixel in the image contains only an alpha channel 15

16 For RGB images, there are two ways of encoding the image Direct color where each pixel in memory contains its color components Indexed color where each pixel in memory contains an index to a table that contains the color of the pixel Indexed colors use less memory than direct colors: 8bit per pixel (bpp) stores 1 x 24bpp pixel as a single byte There are 4bpp, 2bpp and 1bpp options that use progressively less memory Each indexed image references a palette of colors stored in a color look-up table (CLUT) 1bpp CLUTs have two entries, 2bpp have up to 4 entries etc. However pixels are encoded, all blending occurs after conversion to 24bpp 16

17 The CLUTs for indexed colors must be stored in a dedicated RAM block inside the DCU The CLUT RAM can contain up to 2048 entries Enough to contain 8 full 8bpp palettes When a layer is specified as using an indexed color, you must specify the location to which you loaded the palette in CLUT RAM The CLUT RAM may only be read or written when the display is not being refreshed During frame blanking period When the display is not enabled This RAM also can be used as a source of graphics when a layer uses tile mode The arrangement of CLUTs and tiles is entirely under user control 17

18 Where layers overlap each other or the background the pixels may be blended Up to four layers may be blended at each pixel location The position of each pixel in the blend stack determines how it is blended Layers below the lowest priority pixel are not visible The blending settings for the lowest priority pixel are ignored Layers active at pixel position (x,y) Selected pixels in blend stack Blended pixel Pixel ignored Blend settings ignored 18

19 There are two aspects to the blending of the pixels Selection of pixels to blend This is done by chroma keying In other words, the DCU changes the way the blend works according to the color of the individual pixel The amount of transparency applied to each selected pixel Depending on the settings and the content of the source graphic, there are 12 different blend settings Images with RGB data have 5 options Images with ARGB (alpha content) have 6 options When active, the alpha setting applied to the image is defined by an 8-bit value in the layer (TRANS bitfield) 19

20 The DCU can blend graphics containing only red, green and blue components (RGB) Three formats are supported RGB888: 24-bit data containing red, green and blue all at 8-bits per color channel Indexed color 1bpp, 2bpp, 4bpp, 8bpp where all pixels are blended as RGB888 RGB565: 16-bit data containing red and blue channels at 5-bits per color channel and green at 6-bits per channel RGB565 is converted automatically to RGB888 before blending takes place All blending takes place at 24bpp 20

21 In this case, the top-layer graphic completely overlays the background layer Pixel selection/chroma-keying = off Alpha-blending = no blend Layer 2 Layer 1 Panel + = 1 BPP = 0..5, AB=0, BB=0 21

22 In this case, the pixels that fall in the range defined by the pixel selection/chroma-keying range in the top-layer graphic become invisible and only the remaining pixels are seen overlaying the background layer Pixel selection/chroma-keying = on Alpha-blending = no blend Layer 2 Layer 1 Panel + = 1 Remove green color range BPP = 0..5, AB=0, BB=1 22

23 In this case, the top-layer graphic is transparent and the background layer can be seen through it Pixel selection/chroma-keying = off Alpha-blending = on Layer 2 Layer 1 Panel + = 1 50% Transparency BPP = 0..5, AB=1, BB=0 23

24 The range is defined by giving maximum and minimum values for each color component Red, green and blue have minimum and maximum values If the color of a pixel falls into the range in each of the components, then it is selected Red Green Blue X X 24

25 In this case, the pixels selected by the chroma-keying range on the top-layer graphic are alpha blended with the background layer. The remaining pixels are not blended and overlay the background Pixel selection/chroma-keying = on Alpha-blending = mode 1 Layer 2 Layer 1 Panel + = 1 Blend green color range with transparency 50% BPP = 0..5, AB=1, BB=1 25

26 In this case, the pixels selected by the chroma-keying range on the top-layer graphic are removed from the foreground layer. The remaining pixels are alpha-blended with the background Pixel selection/chroma-keying = on Alpha-blending = mode 2 Layer 2 Layer 1 Panel + = 1 Remove green color range, others transparency 50% BPP = 0..5, AB=2, BB=1 26

27 The DCU can blend graphics with an embedded alpha channel (ARGB) Three formats are supported ARGB8888: 32-bit data containing alpha and RGB channels all at 8-bits per color channel ARGB4444 : 16-bit data containing alpha and RGB channels all at 4- bits per color channel ARGB1555: 16-bit data containing alpha channel of 1-bit (on/off) and RGB channels at 5-bits per color channel The DCU can blend these layers using the blend options already described The behavior in certain modes is modified However an image is encoded, all blending takes place at 32bpp 27

28 # AB (alpha blending) BB (chroma blend) Result A 0 0 No blend E B 0 1 Removes selected pixels C 1 0 Alpha blend all D 1 1 Alpha active for selected pixels E 2 0 Same as C + TRANS alpha F 2 1 Same as D + TRANS alpha D Original ARGB image over white background F A B C 28

29 The DCU includes a special mode where the graphic only contains an alpha component This is useful for graphics such as fonts or dials that Require anti-aliasing May be placed on top of different colored backgrounds The color components in this mode are determined at run time Allows the definition of a anti-aliased font that can be any color As well as the inherent alpha blending contained in the graphic, the five existing DCU blend modes are also applicable No blend, Alpha blending only, Chroma keying only, Alpha and chroma blend mode 1, Alpha and chroma blend mode 2 This allows the DCU to create extremely complex graphical blends using a minimum of CPU processing and data storage 29

30 Anti-aliasing is a technique that allows text and graphics to look more natural by creating smooth edges Non anti-aliased edges look jagged This is done by alpha blending the edges of the text or graphic with the background 30

31 The transparency mode graphic contains no color information Only alpha values are stored The front color of the graphic and the rear color of the background are fetched from dedicated foreground and background registers The anti-aliased edges are pre-blended by the DCU to give smooth edges between the graphic (front color) and its background (rear color) Stored graphic White rear color Red rear color Blue front 1 color Green front color 31

32 Trans layer 8bpp $FF $C0 $80 $40 $00 Foreground Background BPP = 7,8, AB=0, BB=0 32

33 Trans layer 8bpp $FF $C0 $80 $40 $00 Foreground Background BPP = 7,8, AB=1, BB=0 33

34 Trans layer 8bpp $FF $C0 $80 $40 $00 Foreground Background BPP = 7,8, AB=1, BB=1 34

35 Trans layer 8bpp $FF $C0 $80 $40 $00 Foreground Background 35

36 Trans layer 8bpp $FF $C0 $80 $40 $00 Foreground Background BPP = 7,8, AB=2, BB=1 36

37 The DCU supports further operating modes for the layer Tile mode allows the filling of a large area using a small pattern that is repeated or tiled across the area The luminance of an area in a graphic can be adjusted for those cases where it is desirable to highlight a graphic element such as an area on a map or a menu selection For user-input operations, there is on-screen cursor available separate from the rest of the graphic layers The DCU also allows users to specify the default background color that layers can blend with in the absence of other layers and that is visible where no layer is active The DCU also can adjust the value of any color on the panel by using its gamma correction transfer function 37

38 The DCU provides a memory-efficient method of creating a textured layer by allowing a graphic to be tiled within a layer Layer size defines the extent of the layer Tile size defines the extent of the tile The DCU automatically repeats the tile to fill the layer Layer Tile graphic Layer on panel (before blending) + = 1 38

39 The DCU provides support for highlighting particular graphics through a layer luminance offset mode The luminance layer is not a normal display layer instead it modifies the values of the colors in the layer below 4bpp and 8bpp encoding is supported and provides a signed addition to the value of each component of the underlying pixel Typically used to highlight menu items or particular graphic items Graphic layer/s Luminance layer Cursor on panel + = 1 39

40 The DCU provides support for an on-screen cursor by using transparency and a dedicated memory area This cursor is independent of the other layers on the screen The cursor is a 1bpp image where 1 indicates that a pixel is visible Color is programmable to any 24bpp value The cursor includes hardware support for automatic blinking Panel Hardware cursor Cursor on panel + = 40

41 The DCU BGND register contains the RGB888 color used as a background color When the background pixel is involved in the blend stack, it is always as the lowest priority pixel The background can be replaced optionally with a video input signal from the Parallel Digital Interface (PDI) 41

42 The DCU has a choice of clock sources to optimize the configuration options External crystal (4 16MHz) Internal RC oscillator Secondary FMPLL Primary FMPLL Configure the DCU panel timing settings to match the provided by the panel manufacturer The DCU provides registers to configure these relationships in a panel friendly manner The pixel clock is specified by the panel manufacturer Value is specified to allow the panel to be refreshed at 50 60Hz The DCU clock can be calculated from the pixel clock value and the depth of the blend required 42

43 H Pulse width H Back Porch H Front Porch V Pulse width V Back Porch V Front Porch Sharp LQ043T1DG02 43

44 44

45 The DCU provides five timing interrupts/flags to indicate progress through the panel refresh cycle VS_BLANK: start of blanking period VSYNC: indicates end of vertical sync period PROG_END: registers contents latched for current cycle DMA_TRANS_FINISH: completed fetching data from memory (current cycle) LS_BF_VS: programmable number of lines before vertical sync period 45

46 The Parallel Data Interface allows connection of a camera/video source Parallel interface similar to DCU output 8-/16-/18-bit data input For 8-bit monochrome, RGB565, RGB666, YCbCr422 Physical Interface available as input data width or as narrow mode for RGB565 Incoming 16-bit data is brought in as 2 x 8-bit words Incoming video replaces default background color When enabled Incoming video must match DCU settings Maximum input frequency is 32MHz (64MHz for narrow mode) External or internal sync extraction supported ITU-R BT.656 input support 46

47 FIFO1 Crossbar DMA FIFO2 FIFO3 Format converter Blend/ Color key Gamma correction Display drive FIFO4 DCU Clock Video source PDI Ext. Video Sync Ext. Video CLK CLK Manager 47

48 AN3330: Introduction to the stepper stall detector module AN4037: Driving a stepper motor using the MPC56xxS SMC module AN4187: Configuring and using the DCU2 on the MPC5606S MCU AN4444: Configuring and using the DCU3 and DCUlite on the MPC5645S MCU 48

49 For technical support go to: Or send an to 49

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