HALT (HIGHLY ACCELERATED LIFE TEST) PROCESS

Transcription

1 HALT (HIGHLY ACCELERATED LIFE TEST) PROCESS Yoni Burg ELTA Systems Ltd Quality and reliability engineer P.O Box 330, Ashdod Tel: , Fax: , General Halt (Highly Accelerated Life ) is a process that utilizes a step stress approach in subjecting products to varied accelerated stresses to discover design limitations of the product. Halt is intended to discover the stress limits of a product and identify products weaknesses. The objectives of HALT is 1. To determine the upper and lower operating and destruction limits of the product. 2. To find and fix, weak components, poor component mounting, manufacturing process problems, deficiencies in product design and practices. The halt procedure utilized in microwave Elta products, has been useful to detect special intermittent failures in the product, which could not be found using the regular ESS procedures, The article will discuss the halt procedure, the results, conclusions and the design improvement achieved due to halt. References Qualmark Halt Guideline 24/4/2003 Failure in Course of the ing Analyzing product failures to the root cause is the way to make HALT effective. All failures shall be recorded in the order in which they occur. This shall include the failure symptoms, stress levels (temperature and/or vibration), other test conditions, and any corrective action taken, temporary or permanent. Detailed failure report containing all above shall be generated. Process HALT Facility The facilities required for HALT testing shall consist of: 1. HALT/HASS chamber with the following specification ranges a. Temperature: -60 to 150 C. b. Vibration: 0 to 50 Grms. 2. Product clamping test fixtures 3. Thermocouples. 4. Accelerometers. 5. Product power supply, test harnesses, and test equipment. LRU TESTS Internal Visual Inspection Equipment for this test shall include optical equipment having a capability of magnification and other means (illumination, drawings, illustrations, etc.)

2 These means are necessary for conducting an efficient examination, and permitting the person conducting the test to objectively determine the acceptability of the unit being tested. Functional A short electrical (functional) test shall be conducted of this test procedure and shall verify product s serviceability prior to and during the HALT. Procedure A selected number of environmental tests are performed in sequence at test levels in above of the qualification test levels. The test sequence will be repeated at progressively higher test levels until a failure occurs. The failure mode will be analyzed with emphasis on improving the design to prevent occurrence of the failure. The product will then be repaired and testing will continue until test levels are too high to yield useful information. Some deviations in tests procedures may be done due to partial tests results Low temperature, High Temperature, Vibration, Ramp Rate and temperature combined vibration tests shall be performed. Low Temperature The temperature will be changed at steps of 10 C from 25 C to - 55 C at a rate of 25 C/min. The modules/super components shall stay at each temperature step till it reaches thermal equilibrium within 5 C of the environment. Note: Option: = 15, 20,25, 30 minutes (recommended 4 cycles of low temperature cycles). Temp. (C) A-1 25 C A-2-5 C, minutes dwell time A-3-15 C, minutes dwell time A-4-25 C, minutes dwell time A-5-35 C, minutes dwell time A-6-45 C, minutes dwell time A-7-55 C, minutes dwell time Figure no 1: Low Temp High Temperature The temperature will be changed at steps of 10 C from 25 C to 90 C at a rate of 25 C/min. The modules/super components shall stay at each temperature step till it reaches thermal equilibrium within 5 C of the environment.

3 Temp. (C) Option: = 15, 20,25,30 minutes (recommended 4 cycles of high temperature cycles). Figure 2: High Temperature B-1 50 C, minutes dwell time B-2 60 C, minutes dwell time B-3 70 C, minutes dwell time B-4 75 C, minutes dwell time B-5 80 C, minutes dwell time B-6 85 C, minutes dwell time B-7 90 C, minutes dwell time Vibration Random vibration will be changed from 8 to 28 Grms, Hz in steps of 4 Grms, at each step the modules/super components will stay for minutes. Note: Option = 15, 20,25, 30 minutes (recommended 4 cycles of vibration). PSD G^2/Hz C-1 8 Grms, minutes C-2 12 Grms, minutes C-3 16 Grms, minutes C-4 20 Grms, minutes C-5 24 Grms, minutes C-6 28 Grms, minutes 12 8 Figure 3: Vibration Spectrum Ramp Rate 10 rapid temperature cycles at each rate: 30 c /min, 35 c /min, and 40 c /min. Low and high temperature will be determined according to low and high temperature experiments.

4 TEMP [C] FIRST CYCLE LAST CYCLE HIGH TEMP 25 TIME [MIN] LOW TEMP RATE OF HALT CHAMBER WILL BE CHANGE AFTER COMPLETING 10 CYCLES Figure 4: Ramp Rate Spectrum High and low Temperature Combined with Vibration 10 cycles with level of vibration 5 Grms. 10 cycles with level of vibration 10 Grms. 10 cycles with level of vibration 15 Grms. Temp. (C) high temp 1 cycle 3 cycle Last cycle Time (min) low temp Vibration Level (GRMS) dwell time 5 or 10 or 15 Figure 5: Temperature Cycles Combined Vibration Spectrum Time (min) Examples for halt failures and corrective actions

5 First example: Picture 1: Connector Broken During Halt We have a failure during vibration steps dwell time 25 min, at 24 and 25 grms The module was open, and delivered to visual inspection. It has been found that : the output and input of connector RF is disconnected, cracked and burned. The unit was delivered to photograph and continued investigation Corrective action: the broken connector was replaced. a new connector from another type with longer pins was placed in the module. We repeat the halt vibration steps of Grms, and the new connector passed the test successfully Second example: Picture 2: Burned Transistor During Vibration We have failure at 28 grms, duration of 15 minutes. The transistor was sent to the manufacturer for investigation. A possible root cause based on this failure pattern can be an electrical overstress (EOS) which might be caused by oscillation. (no corrective action was taken by the manufacturer) Corrective action: The decision was to perform degolding on the transistors legs. We repeat the halt vibration steps of 28 Grms, and the transistors passed the test successfully.