: Patrick Dorsey FPGA FPGA

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1 : Virtex-7 FPGA WP380 (v1.0) FPGA : Patrick Dorsey ( ) ASIC ASSP FPGA 2 FPGA FPGA FPGA Copyright 2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. All other trademarks are the property of their respective owners. WP380 (v1.0) japan.xilinx.com 1

2 FPGA FPGA 1 2 FPGA FPGA FPGA FPGA FPGA FPGA RAM FPGA FPGA FPGA (TSV) FPGA FPGA 2 FPGA FPGA FPGA FPGA I/O FPGA I/O FPGA 2 japan.xilinx.com WP380 (v1.0)

3 : (SoC) FPGA SoC I/O FPGA FPGA 1,024 SoC 1 1 I/O 鍵 1 1,200 I/O I/O I/O I/O FPGA I/O I/O I/O FPGA : FPGA 1 I/O FPGA pin-to-pin I/O (TDM) I/O I/O 4 32 ASIC : TDM FPGA PCB I/O (MCM) FPGA MCM I/O FPGA FPGA FPGA FPGA WP380 (v1.0) japan.xilinx.com 3

4 (TSV) ASMBL FPGA 1 4 FPGA FPGA I/O 5 1 X-Ref Target - Figure 1 FPGA Die Slices Silicon Interposer Package WP380_01_ : FPGA ( 20 ) 10,000 4 japan.xilinx.com WP380 (v1.0)

5 FPGA ASMBL (CLB) RAM DSP SelectIO FPGA FPGA DSP I/O FPGA ( 2) FPGA SRAM X-Ref Target - Figure 2 WP380_02_ : ASMBL FPGA ASMBL 3 ( 3) I/O FPGA I/O ( I/O 100 ) X-Ref Target - Figure 3 WP380_03_ : FPGA WP380 (v1.0) japan.xilinx.com 5

6 TSV FPGA 65nm FPGA 4 ( 4) X-Ref Target - Figure 4 WP380_04_ : 5 X 4 FPGA ( ) FPGA ( ) X-Ref Target - Figure 5 ASMBL Optimized FPGA Slices Side-by-Side Silicon Interposer >10K Routing Connections between Slices ~1ns Latency 5 : X WP380_05_ japan.xilinx.com WP380 (v1.0)

7 C4 (Controlled-Collapse Chip Connection) TSV FPGA/ ( 6) TSV I/O I/O / FPGA X-Ref Target - Figure 6 High-Bandwidth, Low-Latency Connections Microbumps Through Silicon Vias (TSV) C4 Bumps Slice 1 Slice 2 Slice 3 Slice 4 28 nm FPGA Die Slices Silicon Interposer Package Substrate BGA Solder Balls WP380_09_ : 10,000 Tb/s Mb RAM 2,375GMACS DSP ( 4,750GMACS) 1.6Gb/s LVDS 1,200 SelectIO 1,886Gb/s 72 Virtex -7 FPGA FPGA ( ) C4 WP380 (v1.0) japan.xilinx.com 7

8 FPGA 5 FPGA KGD (Known Good Die) (EM) 1,000 TSV B C4 1, % (CDF) FPGA TSMC Amkor Ibiden 28nm FPGA 65nm C4 (CoC) FPGA FPGA 1 FPGA FPGA RTL FPGA FPGA ( ) FPGA 1 IP FPGA FPGA FPGA FPGA 1 8 japan.xilinx.com WP380 (v1.0)

9 ISE Design Suite Virtex-7 FPGA FPGA (min-cut ) PlanAhead Xilinx Virtex-7 FPGA FPGA ASIC ASIC 300G FPGA ASSP 60% 50% FPGA / FPGA DSP FPGA FPGA FPGA FPGA WP380 (v1.0) japan.xilinx.com 9

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