Architekturen und Einsatz von FPGAs mit integrierten Prozessor Kernen. Hans-Joachim Gelke Institute of Embedded Systems Professur für Mikroelektronik

Save this PDF as:
 WORD  PNG  TXT  JPG

Size: px
Start display at page:

Download "Architekturen und Einsatz von FPGAs mit integrierten Prozessor Kernen. Hans-Joachim Gelke Institute of Embedded Systems Professur für Mikroelektronik"

Transcription

1 Architekturen und Einsatz von FPGAs mit integrierten Prozessor Kernen Hans-Joachim Gelke Institute of Embedded Systems Professur für Mikroelektronik

2 Contents Überblick: Aufbau moderner FPGA Einblick: Eigenschaften und Architektur von SoC FPGA Nachbarblick: Unterschiede zwischen Hauptkonkurrenten Ausblick: SoC FPGA der 2ten Generation 2

3 Digital hardware of the past DRAM & Controller Program Memory Communications Controller Customer Specific Logic Processor Scratch SRAM

4 Not flexible Hardware 4

5 Classic FPGA FPGA Fabric Interconnection between Logic Cells Logic Cell Lookup Table Image courtesy of Clieve Maxfield 5

6 FPGA with Hard Silicon Blocks Logic Element Block RAM Multiplier DSP block PLL Clock Manager I/O Bank Transceiver 6

7 Example of DSP hard block FIR Filter Register Filter coefficient Accumulator Digital Signal Processing Slice Source: Altera DSP Users Guide Scalable Multiplier Accumulator Konfig. Altera Cyclone Xilinx Zync 1 9x9 25x x19 35x x27 42x18 Source: Xilinx Users Guide 7

8 SoC FPGA & Silicon Convergence Classic FPGA General Processor ASIC ASSP SOC FPGA + Great flexibility - No Hard Processors - Licensing costs for IP + Software programmable + Great flexibility - Few application specific features + Customer Specific + Great power efficiency - High development costs - High turnaround times - Poor flexibility + Power efficient + No licenses + Great power efficiency -Poor flexibility + Good power efficiency + Less board space + High interconnect speed 8

9 Architecture of SoC FPGA SoC FPGA MPU Portion FPGA Portion Flash Controllers SDRAM Controller Subsystem Control Block User I/O HSSI Transceivers Cortex-A9 MPU Subsystem On-Chip Memories Support Peripherals Processor- FPGA Bridges FPGA Fabric (LUTs, RAMs, Multipliers & Routing) PLLs Interface Peripherals Debug PLLs Hard PCIe Hard Memory Controllers 9

10 SoC FPGA Architecture Dedicated MPU Pins UART CAN I2C SPI SD/SDIO GPIO Timer GigEth USB OTG Static Memory Controller DMA Interconnect ARM Cortex-A9 Neon/FPU L1 Cache Debug and Trace Block Memory L2 Cache Processor FPGA Bridges FPGA Fabric ARM Cortex-A9 Neon/FPU L1 Cache Multiport DDR2/3 Controller DSP Blocks Dedicated DDR Pins 1) Only Altera 2) Only Xilinx Scratch SRAM Boot ROM Multiport DDR2/3 Controller 1) PCIe A/D Conv. 2) FPGA Pins Transceivers 10

11 Processor to FPGA Bridges Altera Master Slave Xilinx Dual ARM Cortex-A9 Dual ARM Cortex-A9 ACP L2 Cache ACP L2 Cache L3 Interconnect 32-bit Multiport DDR3 Controller Master/Slave Interconnect Scratch SRAM Multiport DDR3 Controller MPU/ FPGA Bridge 128-bit FPGA/ MPU Bridge 128-bit Lightweight Bridge 32-bit 32-bit Scratch SRAM 256-bit 64 General Purpose bit High Performance Memory Interconnect Ports 288 FPGA Fabric FPGA Fabric ~ 100 ~ 90 Gbps 11

12 SoC Processor Cores Altera Xilinx CPU-Core Dual ARM Cortex-A9 MPCore Dual ARM Cortex-A9 MPCore Debug CoreSight CoreSight Neon-SIMD Neon-SIMD CPU Clock frequency 1) MHz MHz L1-Cache (Data/Instruction) 32 KB/ 32KB parity protected 32 KB/ 32KB parity protected L2-Cache 512KB ECC protected 512KB no ECC parity protected Scratch SRAM 64KB ECC protected 256KB parity protected Boot ROM 64KB 128 KB 1) CPU Clock frequency depends on speed grade 12

13 Comparing Altera and Xilinx Low End Altera Cyclone V 5CSEA5 Xilinx Zync Z-7020 Package Variantes 3 2 FPGA I/O Pins FPGA Logik 85k Logikelemente 85k Logikzellen FPGA Block-RAM 3.9 Mbit 4.3 Mbit SDRAM Controller 32-bit DDR2/DDR bit DDR2/DDR DSP Slices 174 (18x19 config.) 220 (18x25 config.) DSP Performance 104 GMAC/s 158 GMAC/s A/D Converters None 2 x 12 bit MSPS 17 inputs Static Power/W Total Power/W

14 Comparing Altera and Xilinx Mid End Altera Arria V5ASTD3 Xilinx Zync Z-7045 Package Variants 3 3 FPGA I/O Pins FPGA Logik 350k Logikelemente 350k Logikzellen FPGA Block-RAM 17.2 Mbit 17.4 Mbit Serial Transceivers 1) 30 x Gbits/s 16 x 12.5 Gbps or 16 x 10.3 Gbit/s SDRAM Controller 32-bit DDR2/DDR bit DDR2/DDR DSP Slices 1618 (18x19 config.) x25 (config.) DSP Performance 1197 GMAC/s 1334 GMAC/s A/D Converters none 2 x 12 bit MSPS 17 inputs Static Power/W Total Power/W ) For largest package 14

15 2 nd Generation SoC FPGA What has the 2 nd Generation to offer? 15

16 Intended Altera 2nd Generation 1. Generation Altera Arria 5 2. Generation Largest Altera (Arria 10) Process 28nm 20 nm Low Power Prozessor Clock 800 MHz 1.5 GHz (overdrive) Logic Elements 504k 1150k Power Dissipation 1x 0.6x Max Transceivers speed Gbps Gbps Memory Devices DDR3 SDRAM 1333Mbps DDR3 SDRAM 2133Mbps DDR4 SDRAM 2666 Mbps Soc SRAM 64KB 256kKB FPGA-MPU Bridge Up to Up to 128-bit Code Encryption - Secure Boot DSP Blocks 27 x 27 Multipliers 54 x 54 Multipliers 16

17 Questions 17

All Programmable Logic. Hans-Joachim Gelke Institute of Embedded Systems. Zürcher Fachhochschule

All Programmable Logic. Hans-Joachim Gelke Institute of Embedded Systems. Zürcher Fachhochschule All Programmable Logic Hans-Joachim Gelke Institute of Embedded Systems Institute of Embedded Systems 31 Assistants 10 Professors 7 Technical Employees 2 Secretaries www.ines.zhaw.ch Research: Education:

More information

Digitale Signalverarbeitung mit FPGA (DSF) Soft Core Prozessor NIOS II Stand Mai 2007. Jens Onno Krah

Digitale Signalverarbeitung mit FPGA (DSF) Soft Core Prozessor NIOS II Stand Mai 2007. Jens Onno Krah (DSF) Soft Core Prozessor NIOS II Stand Mai 2007 Jens Onno Krah Cologne University of Applied Sciences www.fh-koeln.de jens_onno.krah@fh-koeln.de NIOS II 1 1 What is Nios II? Altera s Second Generation

More information

Von der Hardware zur Software in FPGAs mit Embedded Prozessoren. Alexander Hahn Senior Field Application Engineer Lattice Semiconductor

Von der Hardware zur Software in FPGAs mit Embedded Prozessoren. Alexander Hahn Senior Field Application Engineer Lattice Semiconductor Von der Hardware zur Software in FPGAs mit Embedded Prozessoren Alexander Hahn Senior Field Application Engineer Lattice Semiconductor AGENDA Overview Mico32 Embedded Processor Development Tool Chain HW/SW

More information

FPGA-Adaptive Software Debug and Performance Analysis

FPGA-Adaptive Software Debug and Performance Analysis FPGA-Adaptive Software Debug and Performance Analysis WP-01198-1.0 White Paper The availability of devices incorporating hardened ARM applications processors closely coupled to an on-chip FPGA fabric opens

More information

7a. System-on-chip design and prototyping platforms

7a. System-on-chip design and prototyping platforms 7a. System-on-chip design and prototyping platforms Labros Bisdounis, Ph.D. Department of Computer and Communication Engineering 1 What is System-on-Chip (SoC)? System-on-chip is an integrated circuit

More information

OpenSPARC T1 Processor

OpenSPARC T1 Processor OpenSPARC T1 Processor The OpenSPARC T1 processor is the first chip multiprocessor that fully implements the Sun Throughput Computing Initiative. Each of the eight SPARC processor cores has full hardware

More information

Cyclone V Device Handbook Volume 1: Device Overview and Datasheet

Cyclone V Device Handbook Volume 1: Device Overview and Datasheet Cyclone V Device Handbook Volume 1: Device Overview and Datasheet Cyclone V Device Handbook 101 Innovation Drive San Jose, CA 95134 www.altera.com CV-5V1-1.2 Document last updated for Altera Complete Design

More information

Pre-tested System-on-Chip Design. Accelerates PLD Development

Pre-tested System-on-Chip Design. Accelerates PLD Development Pre-tested System-on-Chip Design Accelerates PLD Development March 2010 Lattice Semiconductor 5555 Northeast Moore Ct. Hillsboro, Oregon 97124 USA Telephone: (503) 268-8000 www.latticesemi.com 1 Pre-tested

More information

System Design Issues in Embedded Processing

System Design Issues in Embedded Processing System Design Issues in Embedded Processing 9/16/10 Jacob Borgeson 1 Agenda What does TI do? From MCU to MPU to DSP: What are some trends? Design Challenges Tools to Help 2 TI - the complete system The

More information

Bare-Metal, RTOS, or Linux? Optimize Real-Time Performance with Altera SoCs

Bare-Metal, RTOS, or Linux? Optimize Real-Time Performance with Altera SoCs WP-01245-1.0 Abstract This white paper examines various methods for optimizing real-time performance on Altera SoCs, which integrate an FPGA and applications processor into a single chip. Standard software

More information

Qsys and IP Core Integration

Qsys and IP Core Integration Qsys and IP Core Integration Prof. David Lariviere Columbia University Spring 2014 Overview What are IP Cores? Altera Design Tools for using and integrating IP Cores Overview of various IP Core Interconnect

More information

Cyclone V Device Overview

Cyclone V Device Overview 2016.06.10 CV-51001 Subscribe The Cyclone V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements

More information

AppliedMicro Trusted Management Module

AppliedMicro Trusted Management Module AppliedMicro Trusted Management Module Majid Bemanian, Sr. Director of Marketing, Applied Micro Processor Business Unit July 12, 2011 Celebrating 20 th Anniversary of Power Architecture 1 AppliedMicro

More information

FPGA-Accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters

FPGA-Accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters FPGA-Accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Clusters Rene Griessl, Peykanu Meysam, Jens Hagemeyer, Mario Porrmann Bielefeld University, Germany Stefan Krupop, Micha

More information

FPGA Design From Scratch It all started more than 40 years ago

FPGA Design From Scratch It all started more than 40 years ago FPGA Design From Scratch It all started more than 40 years ago Presented at FPGA Forum in Trondheim 14-15 February 2012 Sven-Åke Andersson Realtime Embedded 1 Agenda Moore s Law Processor, Memory and Computer

More information

The Effect and Technique of System Coherence in ARM Multicore Technology

The Effect and Technique of System Coherence in ARM Multicore Technology The Effect and Technique of System Coherence in ARM Multicore Technology John Goodacre Senior Program Manager ARM Division Cambridge, UK Cortex -A9 Microarchitecture (single core variant) Coresight / JTAG

More information

What is a System on a Chip?

What is a System on a Chip? What is a System on a Chip? Integration of a complete system, that until recently consisted of multiple ICs, onto a single IC. CPU PCI DSP SRAM ROM MPEG SoC DRAM System Chips Why? Characteristics: Complex

More information

Seeking Opportunities for Hardware Acceleration in Big Data Analytics

Seeking Opportunities for Hardware Acceleration in Big Data Analytics Seeking Opportunities for Hardware Acceleration in Big Data Analytics Paul Chow High-Performance Reconfigurable Computing Group Department of Electrical and Computer Engineering University of Toronto Who

More information

Network connectivity controllers

Network connectivity controllers Network connectivity controllers High performance connectivity solutions Factory Automation The hostile environment of many factories can have a significant impact on the life expectancy of PCs, and industrially

More information

Am186ER/Am188ER AMD Continues 16-bit Innovation

Am186ER/Am188ER AMD Continues 16-bit Innovation Am186ER/Am188ER AMD Continues 16-bit Innovation 386-Class Performance, Enhanced System Integration, and Built-in SRAM Problem with External RAM All embedded systems require RAM Low density SRAM moving

More information

Chapter 13. PIC Family Microcontroller

Chapter 13. PIC Family Microcontroller Chapter 13 PIC Family Microcontroller Lesson 01 PIC Characteristics and Examples PIC microcontroller characteristics Power-on reset Brown out reset Simplified instruction set High speed execution Up to

More information

Lab Experiment 1: The LPC 2148 Education Board

Lab Experiment 1: The LPC 2148 Education Board Lab Experiment 1: The LPC 2148 Education Board 1 Introduction The aim of this course ECE 425L is to help you understand and utilize the functionalities of ARM7TDMI LPC2148 microcontroller. To do that,

More information

SBC8600B Single Board Computer

SBC8600B Single Board Computer SBC8600B Single Board Computer 720MHz TI s Sitara AM3359 ARM Cortex-A8 Microprocessor Onboard 512MByte DDR3 SDRAM and 512MByte NAND Flash UARTs, 2*USB Host and 1*OTG, 2*Ethernet, CAN, RS485, LCD/TSP, Audio,

More information

Reconfigurable System-on-Chip Design

Reconfigurable System-on-Chip Design Reconfigurable System-on-Chip Design MITCHELL MYJAK Senior Research Engineer Pacific Northwest National Laboratory PNNL-SA-93202 31 January 2013 1 About Me Biography BSEE, University of Portland, 2002

More information

Open Flow Controller and Switch Datasheet

Open Flow Controller and Switch Datasheet Open Flow Controller and Switch Datasheet California State University Chico Alan Braithwaite Spring 2013 Block Diagram Figure 1. High Level Block Diagram The project will consist of a network development

More information

Arria V Device Overview

Arria V Device Overview 2015.12.21 AV-51001 Subscribe The Arria V device family consists of the most comprehensive offerings of mid-range FPGAs ranging from the lowest power for 6 gigabits per second (Gbps) and 10 Gbps applications,

More information

FPGA Acceleration using OpenCL & PCIe Accelerators MEW 25

FPGA Acceleration using OpenCL & PCIe Accelerators MEW 25 FPGA Acceleration using OpenCL & PCIe Accelerators MEW 25 December 2014 FPGAs in the news» Catapult» Accelerate BING» 2x search acceleration:» ½ the number of servers»

More information

ARM Cortex -A8 Computer with Xilinx Spartan -6 FPGA SBC1652

ARM Cortex -A8 Computer with Xilinx Spartan -6 FPGA SBC1652 ARM Cortex -A8 Computer with Xilinx Spartan -6 FPGA Features ARM Cortex-A8 processor, 800MHz Xilinx Spartan-6 FPGA 512MB SDRAM, 4GB Flash, 2 SD/MMC Four USB 2.0 ports Two SD/MMC card slots Dual CAN bus

More information

Simplifying Embedded Hardware and Software Development with Targeted Reference Designs

Simplifying Embedded Hardware and Software Development with Targeted Reference Designs White Paper: Spartan-6 and Virtex-6 FPGAs WP358 (v1.0) December 8, 2009 Simplifying Embedded Hardware and Software Development with Targeted Reference Designs By: Navanee Sundaramoorthy FPGAs are becoming

More information

SABRE Lite Development Kit

SABRE Lite Development Kit SABRE Lite Development Kit Freescale i.mx 6Quad ARM Cortex A9 processor at 1GHz per core 1GByte of 64-bit wide DDR3 @ 532MHz UART, USB, Ethernet, CAN, SATA, SD, JTAG, I2C Three Display Ports (RGB, LVDS

More information

PIC MICROCONTROLLERS FOR DIGITAL FILTER IMPLEMENTATION

PIC MICROCONTROLLERS FOR DIGITAL FILTER IMPLEMENTATION PIC MICROCONTROLLERS FOR DIGITAL FILTER IMPLEMENTATION There are many devices using which we can implement the digital filter hardware. Gone are the days where we still use discrete components to implement

More information

A Safety Methodology for ADAS Designs in FPGAs

A Safety Methodology for ADAS Designs in FPGAs A Safety Methodology for ADAS Designs in FPGAs WP-01204-1.0 White Paper This white paper discusses the use of Altera FPGAs in safety-critical Advanced Driver Assistance Systems (ADAS). It looks at the

More information

Nutaq. PicoDigitizer 125-Series 16 or 32 Channels, 125 MSPS, FPGA-Based DAQ Solution PRODUCT SHEET. nutaq.com MONTREAL QUEBEC

Nutaq. PicoDigitizer 125-Series 16 or 32 Channels, 125 MSPS, FPGA-Based DAQ Solution PRODUCT SHEET. nutaq.com MONTREAL QUEBEC Nutaq PicoDigitizer 125-Series 16 or 32 Channels, 125 MSPS, FPGA-Based DAQ Solution PRODUCT SHEET QUEBEC I MONTREAL I N E W YO R K I nutaq.com Nutaq PicoDigitizer 125-Series The PicoDigitizer 125-Series

More information

Model-based system-on-chip design on Altera and Xilinx platforms

Model-based system-on-chip design on Altera and Xilinx platforms CO-DEVELOPMENT MANUFACTURING INNOVATION & SUPPORT Model-based system-on-chip design on Altera and Xilinx platforms Ronald Grootelaar, System Architect RJA.Grootelaar@3t.nl Agenda 3T Company profile Technology

More information

Lesson 7: SYSTEM-ON. SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY. Chapter-1L07: "Embedded Systems - ", Raj Kamal, Publs.: McGraw-Hill Education

Lesson 7: SYSTEM-ON. SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY. Chapter-1L07: Embedded Systems - , Raj Kamal, Publs.: McGraw-Hill Education Lesson 7: SYSTEM-ON ON-CHIP (SoC( SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY 1 VLSI chip Integration of high-level components Possess gate-level sophistication in circuits above that of the counter,

More information

Networking Virtualization Using FPGAs

Networking Virtualization Using FPGAs Networking Virtualization Using FPGAs Russell Tessier, Deepak Unnikrishnan, Dong Yin, and Lixin Gao Reconfigurable Computing Group Department of Electrical and Computer Engineering University of Massachusetts,

More information

Building Blocks for PRU Development

Building Blocks for PRU Development Building Blocks for PRU Development Module 1 PRU Hardware Overview This session covers a hardware overview of the PRU-ICSS Subsystem. Author: Texas Instruments, Sitara ARM Processors Oct 2014 2 ARM SoC

More information

White Paper Increase Flexibility in Layer 2 Switches by Integrating Ethernet ASSP Functions Into FPGAs

White Paper Increase Flexibility in Layer 2 Switches by Integrating Ethernet ASSP Functions Into FPGAs White Paper Increase Flexibility in Layer 2 es by Integrating Ethernet ASSP Functions Into FPGAs Introduction A Layer 2 Ethernet switch connects multiple Ethernet LAN segments. Because each port on the

More information

USB 3.0 Connectivity using the Cypress EZ-USB FX3 Controller

USB 3.0 Connectivity using the Cypress EZ-USB FX3 Controller USB 3.0 Connectivity using the Cypress EZ-USB FX3 Controller PLC2 FPGA Days June 20, 2012 Stuttgart Martin Heimlicher FPGA Solution Center Content Enclustra Company Profile USB 3.0 Overview What is new?

More information

DMA Module. 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 DMA Module Slide 1. Hello and welcome to the PIC32 DMA Module webinar.

DMA Module. 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 DMA Module Slide 1. Hello and welcome to the PIC32 DMA Module webinar. PIC32 DMA Module 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 DMA Module Slide 1 Hello and welcome to the PIC32 DMA Module webinar. I am Nilesh Rajbharti, Applications Engineering

More information

Architectures, Processors, and Devices

Architectures, Processors, and Devices Architectures, Processors, and Devices Development Article Copyright 2009 ARM Limited. All rights reserved. ARM DHT 0001A Development Article Copyright 2009 ARM Limited. All rights reserved. Release Information

More information

ZigBee Technology Overview

ZigBee Technology Overview ZigBee Technology Overview Presented by Silicon Laboratories Shaoxian Luo 1 EM351 & EM357 introduction EM358x Family introduction 2 EM351 & EM357 3 Ember ZigBee Platform Complete, ready for certification

More information

Designing a System-on-Chip (SoC) with an ARM Cortex -M Processor

Designing a System-on-Chip (SoC) with an ARM Cortex -M Processor Designing a System-on-Chip (SoC) with an ARM Cortex -M Processor A Starter Guide Joseph Yiu November 2014 version 1.02 27 Nov 2014 1 - Background Since the ARM Cortex -M0 Processor was released a few years

More information

OpenSoC Fabric: On-Chip Network Generator

OpenSoC Fabric: On-Chip Network Generator OpenSoC Fabric: On-Chip Network Generator Using Chisel to Generate a Parameterizable On-Chip Interconnect Fabric Farzad Fatollahi-Fard, David Donofrio, George Michelogiannakis, John Shalf MODSIM 2014 Presentation

More information

Building an Embedded Processor System on a Xilinx Zync FPGA (Profiling): A Tutorial

Building an Embedded Processor System on a Xilinx Zync FPGA (Profiling): A Tutorial Building an Embedded Processor System on a Xilinx Zync FPGA (Profiling): A Tutorial Embedded Processor Hardware Design January 29 th 2015. VIVADO TUTORIAL 1 Table of Contents Requirements... 3 Part 1:

More information

Accelerate Cloud Computing with the Xilinx Zynq SoC

Accelerate Cloud Computing with the Xilinx Zynq SoC X C E L L E N C E I N N E W A P P L I C AT I O N S Accelerate Cloud Computing with the Xilinx Zynq SoC A novel reconfigurable hardware accelerator speeds the processing of applications based on the MapReduce

More information

STM32 F-2 series High-performance Cortex-M3 MCUs

STM32 F-2 series High-performance Cortex-M3 MCUs STM32 F-2 series High-performance Cortex-M3 MCUs STMicroelectronics 32-bit microcontrollers, 120 MHz/150 DMIPS with ART Accelerator TM and advanced peripherals www.st.com/mcu STM32 F-2 series The STM32

More information

Concept Engineering Adds JavaScript-based Web Capabilities to Nlview at DAC 2016

Concept Engineering Adds JavaScript-based Web Capabilities to Nlview at DAC 2016 KAL - Large IP Cores: Memory Controllers: SD/SDIO 2.0/3.0 Controller SDRAM Controller DDR/DDR2/DDR3 SDRAM Controller NAND Flash Controller Flash/EEPROM/SRAM Controller Dear , Concept Engineering

More information

4/2/2014 Linux Dev-Boards. Linux Dev Boards. Tagung Forth Gesellschaft e.v. Maerz 2014. file:///home/cas/talk/linux-boards/html/linux-boards.

4/2/2014 Linux Dev-Boards. Linux Dev Boards. Tagung Forth Gesellschaft e.v. Maerz 2014. file:///home/cas/talk/linux-boards/html/linux-boards. Linux Dev Boards Tagung Forth Gesellschaft e.v. Maerz 2014 file:///home/cas/talk/linux-boards/html/linux-boards.html 1/26 Linux Boards "embedded" Boards mit Linux Forth ideal fuer die Boards mit wenig

More information

System on Chip Platform Based on OpenCores for Telecommunication Applications

System on Chip Platform Based on OpenCores for Telecommunication Applications System on Chip Platform Based on OpenCores for Telecommunication Applications N. Izeboudjen, K. Kaci, S. Titri, L. Sahli, D. Lazib, F. Louiz, M. Bengherabi, *N. Idirene Centre de Développement des Technologies

More information

H.264 AVC Encoder IP Core Datasheet V.4.2, 2015

H.264 AVC Encoder IP Core Datasheet V.4.2, 2015 SOC H.264 AVC Video/Audio Encoder IP Core Datasheet Standard version I-Frame Version Slim Version Low-Bit-rate Version (with B frame) Special version for Zynq-7020 1. Product Overview (Integration information

More information

Using a Generic Plug and Play Performance Monitor for SoC Verification

Using a Generic Plug and Play Performance Monitor for SoC Verification Using a Generic Plug and Play Performance Monitor for SoC Verification Dr. Ambar Sarkar Kaushal Modi Janak Patel Bhavin Patel Ajay Tiwari Accellera Systems Initiative 1 Agenda Introduction Challenges Why

More information

Getting Started with Embedded System Development using MicroBlaze processor & Spartan-3A FPGAs. MicroBlaze

Getting Started with Embedded System Development using MicroBlaze processor & Spartan-3A FPGAs. MicroBlaze Getting Started with Embedded System Development using MicroBlaze processor & Spartan-3A FPGAs This tutorial is an introduction to Embedded System development with the MicroBlaze soft processor and low

More information

MVME162P2. VME Embedded Controller with Two IP Slots

MVME162P2. VME Embedded Controller with Two IP Slots MVME162P2 VME Embedded Controller with Two IP Slots [Advantages] [Details] [Specifications] [Ordering Info] [.pdf version ] 25 MHz MC68040 with floating point coprocessor or 25 MHz MC68LC040 High-performance

More information

Serial port interface for microcontroller embedded into integrated power meter

Serial port interface for microcontroller embedded into integrated power meter Serial port interface for microcontroller embedded into integrated power meter Mr. Borisav Jovanović, Prof. dr. Predrag Petković, Prof. dr. Milunka Damnjanović, Faculty of Electronic Engineering Nis, Serbia

More information

System Performance Analysis of an All Programmable SoC

System Performance Analysis of an All Programmable SoC XAPP1219 (v1.1) November 5, 2015 Application Note: Zynq-7000 AP SoC System Performance Analysis of an All Programmable SoC Author: Forrest Pickett Summary This application note educates users on the evaluation,

More information

ARM Webinar series. ARM Based SoC. Abey Thomas

ARM Webinar series. ARM Based SoC. Abey Thomas ARM Webinar series ARM Based SoC Verification Abey Thomas Agenda About ARM and ARM IP ARM based SoC Verification challenges Verification planning and strategy IP Connectivity verification Performance verification

More information

ARM Cortex -A8 SBC with MIPI CSI Camera and Spartan -6 FPGA SBC1654

ARM Cortex -A8 SBC with MIPI CSI Camera and Spartan -6 FPGA SBC1654 ARM Cortex -A8 SBC with MIPI CSI Camera and Spartan -6 FPGA SBC1654 Features ARM Cortex-A8 processor, 800MHz Xilinx Spartan-6 FPGA expands vision processing capabilities Dual MIPI CSI-2 CMOS camera ports,

More information

ARM Cortex-A9 MPCore Multicore Processor Hierarchical Implementation with IC Compiler

ARM Cortex-A9 MPCore Multicore Processor Hierarchical Implementation with IC Compiler ARM Cortex-A9 MPCore Multicore Processor Hierarchical Implementation with IC Compiler DAC 2008 Philip Watson Philip Watson Implementation Environment Program Manager ARM Ltd Background - Who Are We? Processor

More information

SPEAr family of embedded microprocessors

SPEAr family of embedded microprocessors SPEAr family of embedded microprocessors STMicroelectronics www.st.com/spear SPEAr devices, based on ARM core architecture, offer substantial processing power and wide peripheral support Embedded applications

More information

Prototyping ARM Cortex -A Processors using FPGA platforms

Prototyping ARM Cortex -A Processors using FPGA platforms Prototyping ARM Cortex -A Processors using FPGA platforms Brian Sibilsky and Fredrik Brosser April 2016 Page 1 of 17 Contents Introduction... 3 Gating... 4 RAM Implementation... 7 esign Partitioning...

More information

Attention. restricted to Avnet s X-Fest program and Avnet employees. Any use

Attention. restricted to Avnet s X-Fest program and Avnet employees. Any use Attention The Content material is contained copyright in by this its presentation original authors, is the property and is used of Avnet by Electronics permission. Marketing. This compendium Use of this

More information

High-Performance, Highly Secure Networking for Industrial and IoT Applications

High-Performance, Highly Secure Networking for Industrial and IoT Applications High-Performance, Highly Secure Networking for Industrial and IoT Applications Table of Contents 2 Introduction 2 Communication Accelerators 3 Enterprise Network Lineage Features 5 Example applications

More information

Architetture di bus per. on-chip motivations

Architetture di bus per. on-chip motivations Architetture di bus per System-On On-Chip Massimo Bocchi Corso di Architettura dei Sistemi Integrati A.A. 2002/2003 System-on on-chip motivations 400 300 200 100 0 19971999 2001 2003 2005 2007 2009 Transistors

More information

SBC6245 Single Board Computer

SBC6245 Single Board Computer SBC6245 Single Board Computer 400MHz Atmel AT91SAM9G45 ARM 926EJ-STM Microcontroller On Board 128MB Nand Flash plus 128MB DDR2 SDRAM RS232, RS485, Ethernet, USB Host, LCD, Touch Screen, RTC, Supports for

More information

Applying the Benefits of Network on a Chip Architecture to FPGA System Design

Applying the Benefits of Network on a Chip Architecture to FPGA System Design Applying the Benefits of on a Chip Architecture to FPGA System Design WP-01149-1.1 White Paper This document describes the advantages of network on a chip (NoC) architecture in Altera FPGA system design.

More information

Daniel Imfeld Derrick Kwong Mark Hsu Mike Hu

Daniel Imfeld Derrick Kwong Mark Hsu Mike Hu Daniel Imfeld Derrick Kwong Mark Hsu Mike Hu Product Description The Encore features a MIDI synthesizer and a sequencer in a portable package. It has MIDI In, MIDI Out and MIDI Thru ports to facilitate

More information

What are embedded systems? Challenges in embedded computing system design. Design methodologies.

What are embedded systems? Challenges in embedded computing system design. Design methodologies. Embedded Systems Sandip Kundu 1 ECE 354 Lecture 1 The Big Picture What are embedded systems? Challenges in embedded computing system design. Design methodologies. Sophisticated functionality. Real-time

More information

DE1 SOC FPGA: Independent study

DE1 SOC FPGA: Independent study DE1 SOC FPGA: Independent study Submitted by: Ahmed Kamel Project Advisor: Dr. Bruce Land Introduction 2 FPGA 2 Purpose 3 Hard Processor vs Soft Processor 4 Hardware / Software Integration 5 Hardware /

More information

13. Publishing Component Information to Embedded Software

13. Publishing Component Information to Embedded Software February 2011 NII52018-10.1.0 13. Publishing Component Information to Embedded Software NII52018-10.1.0 This document describes how to publish SOPC Builder component information for embedded software tools.

More information

WiSER: Dynamic Spectrum Access Platform and Infrastructure

WiSER: Dynamic Spectrum Access Platform and Infrastructure WiSER: Dynamic Spectrum Access Platform and Infrastructure I. Seskar, D. Grunwald, K. Le, P. Maddala, D. Sicker, D. Raychaudhuri Rutgers, The State University of New Jersey University of Colorado, Boulder

More information

ARM Cortex A9. Alyssa Colyette Xiao Ling Zhuang

ARM Cortex A9. Alyssa Colyette Xiao Ling Zhuang ARM Cortex A9 Alyssa Colyette Xiao Ling Zhuang Outline Introduction ARMv7-A ISA Cortex-A9 Microarchitecture o Single and Multicore Processor Advanced Multicore Technologies Integrating System on Chips

More information

5.4 Microcontrollers I: Introduction

5.4 Microcontrollers I: Introduction 5.4 Microcontrollers I: Introduction Dr. Tarek A. Tutunji Mechatronics Engineering Department Philadelphia University, Jordan Microcontrollers: Introduction Microprocessors were described in the last three

More information

NORTHEASTERN UNIVERSITY Graduate School of Engineering

NORTHEASTERN UNIVERSITY Graduate School of Engineering NORTHEASTERN UNIVERSITY Graduate School of Engineering Thesis Title: Enabling Communications Between an FPGA s Embedded Processor and its Reconfigurable Resources Author: Joshua Noseworthy Department:

More information

System Considerations

System Considerations System Considerations Interfacing Performance Power Size Ease-of Use Programming Interfacing Debugging Cost Device cost System cost Development cost Time to market Integration Peripherals Different Needs?

More information

Main Memory Background

Main Memory Background ECE 554 Computer Architecture Lecture 5 Main Memory Spring 2013 Sudeep Pasricha Department of Electrical and Computer Engineering Colorado State University Pasricha; portions: Kubiatowicz, Patterson, Mutlu,

More information

EVAT - Emblitz Varsity Associate Trainee Program - Embedded Systems Design

EVAT - Emblitz Varsity Associate Trainee Program - Embedded Systems Design EVAT - Emblitz Varsity Associate Trainee Program - Embedded Systems Design Product Number: EVAT 001 This fully interactive self study course of embedded system design teaches the basic and advanced concepts

More information

DesignWare IP for IoT SoC Designs

DesignWare IP for IoT SoC Designs DesignWare IP for IoT SoC Designs The Internet of Things (IoT) is connecting billions of intelligent things at our fingertips. The ability to sense countless amounts of information that communicates to

More information

Ethernet Switch. WAN Gateway. Figure 1: Switched LAN Example

Ethernet Switch. WAN Gateway. Figure 1: Switched LAN Example 1 Introduction An Ethernet switch is used to interconnect a number of Ethernet LANs (Local Area Networks), forming a large Ethernet network. Different ports of the switch are connected to different LAN

More information

FPGA Development Board Hardware and I/O Features

FPGA Development Board Hardware and I/O Features CHAPTER 2 FPGA Development Board Hardware and I/O Features Photo: The Altera DE1 board contains a Cyclone II FPGA, external SRAM, SDRAM & Flash memory, and a wide assortment of I/O devices and connectors.

More information

Lesson 9: Challenges in Embedded System Design: Optimizing the Design Metrics and Formalism of System Design

Lesson 9: Challenges in Embedded System Design: Optimizing the Design Metrics and Formalism of System Design Lesson 9: Challenges in Embedded System Design: Optimizing the Design Metrics and Formalism of System Design 1 Amount and type of hardware needed Optimizing the microprocessors, ASIPs and single purpose

More information

DoCD IP Core. DCD on Chip Debug System v. 6.01

DoCD IP Core. DCD on Chip Debug System v. 6.01 2016 DoCD IP Core DCD on Chip Debug System v. 6.01 C O M P A N Y O V E R V I E W Digital Core Design is a leading IP Core provider and a System-on-Chip design house. The company was founded in 1999 and

More information

Nios II System Architect Design Tutorial

Nios II System Architect Design Tutorial Nios II System Architect Design Nios II System Architect Design 101 Innovation Drive San Jose, CA 95134 www.altera.com TU-01004-2.0 Document last updated for Altera Complete Design Suite version: Document

More information

ARM Processors and the Internet of Things. Joseph Yiu Senior Embedded Technology Specialist, ARM

ARM Processors and the Internet of Things. Joseph Yiu Senior Embedded Technology Specialist, ARM ARM Processors and the Internet of Things Joseph Yiu Senior Embedded Technology Specialist, ARM 1 Internet of Things is a very Diverse Market Human interface Location aware MEMS sensors Smart homes Security,

More information

Black Box for Robot Manipulation

Black Box for Robot Manipulation Black Box for Robot Manipulation Second Prize Black Box for Robot Manipulation Institution: Participants: Hanyang University, Seoul National University, Yonsei University Kim Hyong Jun, Ahn Ho Seok, Baek

More information

Implementing a Digital Answering Machine with a High-Speed 8-Bit Microcontroller

Implementing a Digital Answering Machine with a High-Speed 8-Bit Microcontroller Implementing a Digital Answering Machine with a High-Speed 8-Bit Microcontroller Zafar Ullah Senior Application Engineer Scenix Semiconductor Inc. Leo Petropoulos Application Manager Invox TEchnology 1.0

More information

Rapid System Prototyping with FPGAs

Rapid System Prototyping with FPGAs Rapid System Prototyping with FPGAs By R.C. Coferand Benjamin F. Harding AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO SAN FRANCISCO SINGAPORE SYDNEY TOKYO Newnes is an imprint of

More information

Xilinx 7 Series FPGA Power Benchmark Design Summary May 2015

Xilinx 7 Series FPGA Power Benchmark Design Summary May 2015 Xilinx 7 Series FPGA Power Benchmark Design Summary May 15 Application-centric Benchmarking Process 1G Packet Processor OTN Muxponder ASIC Emulation Wireless Radio & Satellite Modem Edge QAM AVB Switcher

More information

Atmel SMART ARM Core-based Embedded Microprocessors

Atmel SMART ARM Core-based Embedded Microprocessors Atmel SMART ARM Core-based Embedded Microprocessors High Performance, Power Efficient, Easy to Use Atmel SMART SAMA5 ARM Cortex-A5 MPUs Core Sub-System Memory Connectivity Device Name Core VFPU / NEON

More information

White Paper. S2C Inc. 1735 Technology Drive, Suite 620 San Jose, CA 95110, USA Tel: +1 408 213 8818 Fax: +1 408 213 8821 www.s2cinc.com.

White Paper. S2C Inc. 1735 Technology Drive, Suite 620 San Jose, CA 95110, USA Tel: +1 408 213 8818 Fax: +1 408 213 8821 www.s2cinc.com. White Paper FPGA Prototyping of System-on-Chip Designs The Need for a Complete Prototyping Platform for Any Design Size, Any Design Stage with Enterprise-Wide Access, Anytime, Anywhere S2C Inc. 1735 Technology

More information

7 Series FPGA Overview

7 Series FPGA Overview 7 Series FPGA Overview 7 Series FPGA Families Maximum Capability Lowest Power and Cost Industry s Best Price/Performance Industry s Highest System Performance Logic Cells Block RAM DSP Slices Peak DSP

More information

Wireless Microcontrollers for Environment Management, Asset Tracking and Consumer. October 2009

Wireless Microcontrollers for Environment Management, Asset Tracking and Consumer. October 2009 Wireless Microcontrollers for Environment Management, Asset Tracking and Consumer October 2009 Jennic highlights Jennic is a fabless semiconductor company providing Wireless Microcontrollers to high-growth

More information

ARM Processors for Computer-On-Modules. Christian Eder Marketing Manager congatec AG

ARM Processors for Computer-On-Modules. Christian Eder Marketing Manager congatec AG ARM Processors for Computer-On-Modules Christian Eder Marketing Manager congatec AG COM Positioning Proprietary Modules Qseven COM Express Proprietary Modules Small Module Powerful Module No standard feature

More information

DAC Digital To Analog Converter

DAC Digital To Analog Converter DAC Digital To Analog Converter DAC Digital To Analog Converter Highlights XMC4000 provides two digital to analog converters. Each can output one analog value. Additional multiple analog waves can be generated

More information

Real-Time Challenges and Opportunities in SoCs

Real-Time Challenges and Opportunities in SoCs Real-Time Challenges and Opportunities in SoCs WP-01190-1.1 White Paper Advanced process technology and system-integration provide the driving forces behind silicon convergence. FPGAs speed along this

More information

PowerPC 405 GP Overview

PowerPC 405 GP Overview PowerPC 405 GP Overview Marcelo T Pereira LISHA/UFSC trier@lisha.ufsc.br http://www.lisha.ufsc.br/~trier October 1, 2002 October 1, 2002 Marcelo T Pereira (http://www lisha ufsc br) 1 Khomp Plataform Software/Hardware

More information

Reducing Total System Cost with Low-Power 28-nm FPGAs

Reducing Total System Cost with Low-Power 28-nm FPGAs Reducing Total System Cost with Low-Power 28-nm FPGAs WP-01180-1.1 White Paper When building systems for high-volume applications, it is very important to keep costs in check. There are several dimensions

More information

NORTHEASTERN UNIVERSITY Graduate School of Engineering. Thesis Title: CRASH: Cognitive Radio Accelerated with Software and Hardware

NORTHEASTERN UNIVERSITY Graduate School of Engineering. Thesis Title: CRASH: Cognitive Radio Accelerated with Software and Hardware NORTHEASTERN UNIVERSITY Graduate School of Engineering Thesis Title: CRASH: Cognitive Radio Accelerated with Software and Hardware Author: Jonathon Pendlum Department: Electrical and Computer Engineering

More information

Cut Network Security Cost in Half Using the Intel EP80579 Integrated Processor for entry-to mid-level VPN

Cut Network Security Cost in Half Using the Intel EP80579 Integrated Processor for entry-to mid-level VPN Cut Network Security Cost in Half Using the Intel EP80579 Integrated Processor for entry-to mid-level VPN By Paul Stevens, Advantech Network security has become a concern not only for large businesses,

More information