Single-chip Cloud Computer A many-core research platform from Intel Labs

Transcription

1 Single-chip Cloud Computer A many-core research platform from Intel Labs

2 Compute evolving to Tera- Scale Entertainment, Learning Performance TIPS GIPS MIPS KIPS Multimedia Model- Based Apps 3D and Video Text Single-Core Multi-Core Financial Analytics Many-core INTEL TEA-SCALE ESEACH Personal Media Creation and Management Health and Medicine 2 Kilobytes Megabytes Gigabytes Dataset Size Terabytes

3 Tera-Scale Scaling Challenges Energy Efficiency Design Complexity Programming Models Emerging Applications 3

4 Single-chip Cloud Computer Experimental many-core CPU/Platform for Tera-Scale HW/SW research Many-core processor research Hardware Parallel Programming research Software esearch platform shared with industry and academic collaborators to enable/encourage tera-scale explorations Energy Efficiency Design Complexity Programming Model Dynamic voltage/frequency scaling 1/3 power reduction for core-core I/O Array of small IA-based tiles could lead to more agile, flexible designs Message-passing approach proven to scale to 1000 s processors 4 Application Development Sharing with Microsoft* & others for academic, industry innovation

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6 The SCC Platform Debug tools Memory eader, SoftAM, /W SCC Config egisters Provides SW based virtual I/O (e.g. performance widget) Konsole w/ SSH connections to all booted cores Comandline tools sccboot, scceset, sccbmc, scckonsole Intel SCC a complete HW/SW Tera-Scale research platform 6

7 A closer look 24 Dual-core tiles (48 IA cores) 24 outers Mesh network with 256 GB/s bisection bandwidth 4 Integrated DD 3 memory controllers 1.3 Billion transistors L2 Cache Dual-core SCC Core 1 MEMOY CONTOLLE 1TILE OUTE Message Buffer L2 Cache Core 2 7 OUTE

8 Dynamic Power Management Fine-grain, software-controlled power management 8 Voltage and frequency islands Dynamic range W Each tile can run at a different frequency 6 banks of 4 tiles can run at different voltages Independent V&F control for I/O network & MCs F n V 1 V 2 F n V 3 Memory Controller Memory Controller F n F n V 4 V 5 V 6 Memory Controller Memory Controller 48 IA cores at W 8

9 Advancing Parallel SW esearch The SCC eliminates significant complexity & power by removing hardware cache coherency DATA Enables exploration of more scalable alternatives: Message passing models common in datacenter, HPC Software-managed, adaptive cache coherency 9

10 SCC Co-Traveler Program Goal: Enable Tera-Scale esearch by Industry/academic institutions Access to SCC System(s), Tools, Documentation, Open Source SW, Support etc Access to Eco-system of users, Intel sponsored conferences, SCC Workshops Working with 100+ partners around the world Deployment in waves, currently executing wave #1 10

11 SCC Co-Traveling in action Financial Analytics w/ shared virtual memory Microsoft Visual Studio Advanced Power Management JavaScript Physics Modeling HPC Parallel Workloads Hadoop Web Search 11

12 SCC Co-Traveler Timeline (2010) Jan Feb Mar Apr May Jun Jul Aug Sep Introduction Symposia/Workshops Santa Clara Feb 12 Germany Mar 16 esearch Proposal Process (1 st wave) EWME May Workshops and Conferences TBD egistration Applications 15 Apr Deadline Notification 1st Week of May Documentation/SW Availability Overview, Messaging LIB, EAS, How To Use Linux Sample Workflows Final Docs Website Active Platform Availability Beta Testers General HW Availability Datacenter For emote Access 12

13 Summary: Many-Core/Tera-Scale compute transition will happen! The Intel SCC is an experimental many-core research platform designed to help addressing the tera-scale HW and SW challenges: Energy Efficiency Design Complexity Programming Model Application Development Dynamic voltage/frequency scaling 1/3 power reduction for core-core I/O Array of small IA-based tiles could lead to more agile, flexible designs Message-passing approach proven to scale to 1000 s processors Sharing with Microsoft* & others for academic, industry innovation Intel is making the SCC available world-wide to enable industry and academic research and innovation. 13

14 Visit our website: Technical Questions about SCC Platform, esearch: Copyright 2010, Intel Corporation. All ights eserved. Partner Disclaimer: It is acknowledged that the use of the word "Partner" is a commonly used term in the technology industry to designate a marketing relationship between otherwise unaffiliated companies and is used in accordance with this common usage herein. The use of the word Partner herein shall not be deemed to nor is it intended to create a partnership, agency, joint venture or other similar arrangement between Intel and such partners and the employees, agents and representatives of one party shall not be deemed to be employees, agents or representatives of the other. Intel and the partners shall be deemed to be independent contractors and shall have no authority to bind each other. Intel and the Intel logo are trademarks of Intel Corporation in the United States and other countries. * Other names and brands may be claimed as the property of others. 14