Sn-Cu Intermetallic Grain Morphology Related to Sn Layer Thickness

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1 Journal of ELECTRONIC MATERIALS, Vol. 36, No. 11, 2007 DOI: /s x Ó 2007 TMS Special Issue Paper -Cu Intermetallic Grain Morphology Related to Layer Thickness MIN-HSIEN LU 1 and KER-CHANG HSIEH 2,3 1. Institute of Materials Science and Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan. 2. Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung, Taiwan khsieh@mail.nsysu.edu.tw Tin is widely used as a coating material for copper metal in the electronics industry where tin whisker growth is a concern because it affects the reliability of electronic devices. Because whisker growth reduces joint reliability, it is important to monitor the growth of Cu 3 and Cu 6 5, which is usually done by using an X-ray diffraction method to estimate the thickness of the tin layer. In this study, we use the sequential electrochemical reduction analysis (SERA) technique to measure the thickness of layers of pure tin, Cu 6 5, and Cu 3. We also discuss the depletion rate of tin layers at high-temperature aging and the growth of these intermetallics. Key words: Grain morphology, intermetallic compound, tin plating, SERA INTRODUCTION Because Pb is harmful to our health and the environment, the electronics industry has been replacing common Pb- solder with pure. Because of its desirable properties, including solderability, conductivity, ductility, and corrosion resistance, pure is a suitable replacement for Pb- solder and is widely used as a coating material in metal finishing. During the plating process in the production of semiconductor devices, tin layers are electroplated onto the copper base leadframe. The thickness of the tin layer in this process can be controlled by the plating parameters, e.g., current density and plating time. Part of the tin will react with the copper substrate to form a Cu- intermetallic when the device is stored at room temperature, 1 3 reducing the solderability of pure and affecting the reflow process. Therefore, it is important during the plating process to control the thickness of the tin layer. Two current pieces of equipment used to measure the thickness of tin are X-ray photoelectron spectroscopy (XPS) and SEM cross-sectional measurement. Another possible way of measuring a tin layer may be the sequential electrochemical reduction (Received February 6, 2007; accepted May 9, 2007; published online September 19, 2007) analysis (SERA) technique, which has been used to evaluate the surface of different metal finishes This technique has been described in detail by other researchers In this study, we apply the procedures for the technique used in those studies to measure the layers of pure tin and intermetallics. This simple electrochemical method easily measured the thickness of the tin layer and intermetallic layer, allowing us to evaluate the growth rate of intermetallics and the depletion rate of the tin layer during high-temperature aging. It may also be useful when characterizing a tin-plated layer during the assembly processes. EXPERIMENTAL PROCEDURE In this study, pure tin is plated onto a copper substrate with the MSA (methyl sulfuric acid) base plating solution. The thickness of the tin layer can be controlled by the current density and plating time. To obtain various thicknesses of intermetallics, the plated samples were aged in an oven set at 150 C for different periods of time. The electrochemical method was applied to examine the thickness of tin layers and intermetallic layers. The test sample was used as an anode, and platinum was used as a cathode. AgCl was used as a reference electrode. To perform these tests, we used a Potentiometry (made by AUTOLAB model PGSTAT100) and a commercial electrolyte from Densoku Instruments, Japan, 1448

2 -Cu Intermetallic Grain Morphology Related to Layer Thickness 1449 Pt electrode AgCl reference electrode + - Current control Voltage measurement The value of n = 4 for Cu 6 5, and Cu 3 was estimated from a comparison of the intermetallic layer thicknesses of cross-section samples. RESULTS AND DISCUSSION Determination of Tin Thickness Figure 2 shows the association between thickness and electric chemical potential and measurement time. The different plateaus represent different Sample Fig. 1. Sketch of electrochemical experimental apparatus. (a) minutes 1 hour 2 hours Cu 3 which is normally used in plating plants. As can be seen in Fig. 1, the thickness of the tin layer and intermetallic was determined from the current amount and time period while the cell voltage was maintained at a certain plateau under constant current (0.01 A). The layer thickness was calculated using the Faraday equation: T ¼ M I t n F S d ; where T is the thickness (cm), M the atomic weight of ( g/mol) or the molecular weight of Cu 6 5 and Cu 3 ( and g/mol ), I the constant current (0.01 A), t the time (s), n the balance valence of pure, Cu 6 5, and Cu 3 (2, 4, and 4), F the FaradayÕs constant (96,485 C/mol), d the density of pure, Cu 6 5, and Cu 3 (7.31, 8.26, and g/cm 3 ), and S the surface area (cm 2 ). E (V ) (b) E (V ) minutes 1 hour 2 hours Time (s) Cu 6 5 Cu 6 5 Cu E (V ) Type A sample Type B sample Cu 6 5 Cu Time (s) Fig. 3. Measured electrochemical potential curves of tin-plated samples after different aging treatment at 150 C. (a) Type A sample, (b) Type B sample Time (s) Sample (µm) Cu 6 5 (µm) Cu 3 (µm) Type A Type B Fig. 2. Electrochemical potential of tin plating on the copper substrate of Type A sample and Type B sample. Table I. Results of Measured Thickness of, Cu 6 5, and Cu 3 Layers for Fig. 3 Sample Condition (lm) Cu 6 5 (lm) Cu 3 (lm) Type A 0.5 h h h Type B 0.5 h h h

3 1450 Lu and Hsieh phases as they are exposed on the anode surface. The time period of each plateau corresponds to the thickness of the phase layer. There were three phase layers formed on each sample. The external first layer was tin with tin oxide. We could not measure the thickness of tin oxide using this method because the potential difference of tin and tin oxide were too close. The subsequent second and third layers were Cu 6 5 and Cu 3 intermetallics. Figure 2 also shows the thickness of, Cu 6 5, and Cu 3, as measured and calculated using FaradayÕs equation. Intermetallic Growth at 150 C Aging Two types of samples were prepared using different layer thicknesses of tin: Type A was lm and Type B lm. These samples were aged at 150 C for 0.5, 1 and 2 h. Figure 3 shows the electric chemical potentials of the tin-plated samples over the three periods of aging at 150 C. The thickness of the tin layer continuously decreased, while that of the intermetallic layers increased. As can be seen in Table I, after 2 h of aging, the thickness of the Type A tin layer had decreased to lm and that of Type B to lm. The thickness of the Cu 6 5 layer increased gradually, while that of the Cu 3 layer did not. The electrochemical potential plateau of the Cu 3 layer was not as clear as that of the Cu 6 5 layer, making it more difficult to measure the thickness of the Cu 3 layer with a great deal of uncertainty. Fig. 4. Cu 6 5 phase morphology of Type A sample after aging at 150 C for (a) 30 min, (b) 1 h, (c) 2 h, and (d) 26 h.

4 -Cu Intermetallic Grain Morphology Related to Layer Thickness 1451 Observation of the Surface Morphology of the Cu 6 5 Phase The surface morphology of the intermetallic could be examined clearly after removing the external tin layer using the same electric chemical dissolving technique. The surface morphologies of the Cu 6 5 phase for the Type A sample aged at 150 C from 30 min to 26 h are shown in Fig. 4. The surface morphology of the Cu 6 5 phase changed over each aging period. In the initial stages, Cu diffused preferentially into the tin grain boundaries and formed the Cu- intermetallic phases on the tin grain boundary regions. The outline of the tin grain boundary made clear by the Cu 6 5 phase form had a concave shape at the early aging stage. The mechanism behind the growth of the intermellatic started predominantly as a grain boundary diffusion at the early stage but became bulk diffusion as the continuous phase layer formed over the aging time. After aging for 26 h, the surface morphology of the Cu 6 5 phase became flat and the Cu 6 5 grain size was about 2 4 lm. Figure 5 shows the Cu 6 5 phase morphology of the Type B sample after aging at 150 C. The Cu 6 5 phase growth condition of the Type B sample was similar to that of the Type A sample. However, the grain size of the Cu 6 5 phase reached as high as 6 lm, which is much larger than that of the Type A sample after 26 h of aging. The maximum grain size of the Cu 6 5 phase was related to the initial tin layer thickness. Fig. 5. Cu 6 5 phase morphology of Type B sample after aging at 150 C for (a) 30 min, (b) 1 h, (c) 2 h, and (d) 26 h.

5 1452 Lu and Hsieh Relationship of Cu 6 5 Grain Size and Tin Layer Thickness The cross sections of the tin layer in Type A and B samples are shown in Fig. 6. The tin grain size of the Type B sample was clearly larger than that of the Type A sample. We also found some small tin grains within the larger grain in Type B sample. These small grains formed in the earlier stage of the plating process and the grain growth was stopped by the growth of neighboring grains in the later stage of the plating process. This mechanism is depicted schematically in Fig. 7. During the initial plating stage, the tin nucleated on the Cu substrate surface and grew. Afterward, one grain grew to the point where it could touch another adjoining one grain and then entered a stage in which it could grow mutually and competitively with others. During this stage, those grains with higher growth rates Fig. 6. Tin grain size in the different tin layer thicknesses. (a) Type A sample, (b) Type B sample. The marked region shows the small grain still left in the larger grain. Fig. 7. Tin grain growth mechanism in different plating period.

6 -Cu Intermetallic Grain Morphology Related to Layer Thickness 1453 Fig. 8. Cu 6 5 phase formation mechanism in tin grain boundaries. formed tips with greater diameters, which would block the tin supply and eliminate the growth of the neighboring grains. As the plating process continued, the top layer had larger grain sizes and the lower layer had smaller grains that might recrystallize with neighboring grains, becoming one larger grain once the grain boundary was eliminated. As can be seen in Fig. 6, after this process, some residual small grains may remain in the vicinity of the newly formed larger grains. The formation and growth of the Cu 6 5 phase started from the tin grain boundary regions (Figs. 4 and 5). Because the grain boundary diffusion is faster than the interface diffusion in the bulk area, the intermetallic formed a concave shape at the earlier stage. After a certain period, the Cu 6 5 phase through the grain boundary regions stopped growing upwards and started growing laterally. Once the Cu 6 5 grain started touching an adjoining one, the growth stopped. Therefore, the Type B Cu 6 5 grain size could grow larger than that of Type A, because the Type B sample had larger tin grain sizes, as shown schematically in Fig. 8. CONCLUSIONS 1. The electrochemical method can be used in conjunction with FaradayÕs equation to measure the thickness of a tin layer and an intermetallic. 2. In this study, this electrochemical method could be used to estimate the depletion rate of the tin layer under various aging conditions. 3. At 150 C aging, the Cu 6 5 is the major phase. The mechanism behind its growth was grain boundary diffusion in the earlier stage and then the bulk diffusion in the later stage. 4. The tin grain size and Cu 6 5 grain size are closely related to the tin layer thickness.

7 1454 Lu and Hsieh ACKNOWLEDGEMENTS The authors are pleased to acknowledge the financial support for this research provided by National Science Council, Grant Nos. NSC E and E REFERENCES 1. K.N. Tu, Acta Metall. 21, 347 (1973). 2. K.N. Tu and R.D. Thompson, Acta Metall. 30, 947 (1982). 3. K.N. Tu, Mater. Chem. Phys. 46, 217 (1996). 4. P. Bratin, M. Pavlov, and G. Chalyt, Circuit World 25, 59 (1999). 5. P. Bratin, M. Pavlov, and G. Chalyt, Printed Circuit Fabricat. 22, 30 (1999). 6. P. Bratin, G. Chalyt, F. Hayward, and M. Pavlov, Printed Circuit Fabricat. 23, 48 (2000). 7. R. Schetty, 2004 International Conference on the Business of Electronic Product Reliability and Liability (2004), p S.V. Sattiraju, B. Dang, R.W. Johnson, Y. Li, J.S. Smith, and M.J. Bozack, IEEE Trans. Electron. Packag. Manuf. 25, 168 (2002). 9. S. Cho, J. Yu, S.K. Kang, and D.-Y. Shih, J. Electron. Mater. 34, 635 (2005). 10. S. Cho, J. Yu, S.K. Kang, and D.-Y. Shih, JOM 57, 50 (2005). 11. D.M. Tench, M.W. Kendig, D.P. Anderson, D.D. Hillman, G.K. Lucey, and T.J. Gher, Solder. Surface Mount Technol. 46, 18 (1993). 12. D.M. Tench, D.P. Anderson, and P. Kim, J. Appl. Electrochem. 24, 18 (1994). 13. D.M. Tench and D.P. Anderson, U.S. Patent 5,262,002 (1993).