DDR2 SDRAM Memory SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.

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1 eb R2 SR emory Product uide SSUN LTRONIS RSRVS T RIT TO N PROUTS, INORTION N SPIITIONS WITOUT NOTI. Products and specifications discussed herein are for reference purposes only. ll information discussed herein is provided on an "S IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of Samsung lectronics. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. or updates or additional information about Samsung products, contact your nearest Samsung office. ll brand names, trademarks and registered trademarks belong to their respective owners. c 2012 Samsung lectronics o., Ltd. ll rights reserved

2 R2 SR emory 1. R2 SR ORY ORRIN INORTION K 4 T X X X X X X X - X X X X SSUN emory R R Type ensity it Organization Speed Temp & Power Package Type Revision Interface (V, VQ) # of Internal anks 1. SSUN emory K 2. R 4 3. R Type T R2 SR 4. ensity b b 1 1b 2 2b 4 4b 5. it Organization 04 x 4 06 x 4 Stack 07 x 8 Stack 08 x 8 16 x16 26 x 4 Stack ( Standard) 27 x 8 Stack ( Standard) 6. # of Internal anks 3 4 anks 4 8 anks 8. Revision I Q R 9. Package Type Z T 10. Temp & Power L Y 1st en. 2nd en. 3rd en. 4th en. 5th en. 6th en. 7th en. 8th en. 9th en. 10th en. 17th en. 18th en. (Lead-free) P (Lead-free) (Lead-free & alogen-free) P (Lead-free & alogen-free) SP (Lead-free & alogen-free, Thin) (Lead-free & alogen-free, lip hip) ommercial Temp.( 0 ~ 95 ) & Normal Power ommercial Temp.( 0 ~ 95 ) & Low Power ommercial Temp.( 0 ~ 95 ) & Low Voltage 7. Interface ( V, VQ) Q SSTL_18 (1.8V, 1.8V) 11. Speed R2-400 L=3, tr=3, trp=3) R2-533 L=4, tr=4, trp=4) R2-667 L=5, tr=5, trp=5) R2-800 L=6, tr=6, trp=6) R2-800 L=5, tr=5, trp=5) - 2 -

3 R2 SR emory 2. R2 SR omponent Product uide 2.1 SR ensity anks Part Number Package & Power, Temp. (-/-L) & Speed Org. PK vail. 1b -die 8anks K4T1044Q 7/7/6 256 x 4 60 ball K4T1084Q 7/7/6 128 x 8 K4T1164Q 7/7/6 64 x ball Now - 3 -

4 R2 SR emory 3. R2 SR odule Ordering Information X X X T X X X X X X X - X X X X emory odule I Type ata bits R omponent Type epth # of anks in omp. & Interface it Organization Vendor Speed Temp & Power P Revision Package omponent Revision 1. emory odule 2. I Type 3 I 4 SOI 3. ata its 78 x64 240pin Unbuffered I 91 x72 240pin unbuffered I 92 x72 240pin VLP Registered I 93 x72 240pin Registered I 95 x72 240pin ully uffered I 70 x64 200pin Unbuffered SOI 4. R omponent Type T R2 SR 5. epth (for 128b/512b) (for 128b/512b) (for 128b/512b) (for 512b/2b) (for 512b/2b) 1 1 1K 1 (for 2b) 6. # of anks in comp. & Interface 5 4anks & SSTL-1.8V 6 8anks & SSTL-1.8V 7. it Organization 0 x 4 3 x 8 4 x16 6 x 4 Stack ( Standard) 7 x 8 Stack ( Standard) 8 x 4 Stack 9 x 8 Stack 8. omponent Revision I R 9. Package Z Q 10. P Revision 0 other P 2 2nd Rev. 4 4th Rev. 12. Speed st en. 3rd en. 5th en. 7th en. 10th en. 18th en. 1 1st Rev. 3 3rd Rev. Parity I S Reduced P 11. Temp & Power ommercial Temp.( 0 ~ 95 ) & Normal Power L ommercial Temp.( 0 ~ 95 ) & Low Power Y ommercial Temp.( 0 ~ 95 ) & Low Voltage Q R2-400 L=3, tr=3, trp=3) R2-533 L=4, tr=4, trp=4) R2-667 L=5, tr=5, trp=5) R2-800 L=6, tr=6, trp=6) R2-800 L=5, tr=5, trp=5) 13. Vendor or I 5 Intel 6, 8 IT 3, 4 ontage 2nd en. 4th en. 6th en. 8th en. 17th en. (Lead-free) P (Lead-free) QP (Lead-free) (Lead-free & alogen-free) P (Lead-free & alogen-free) QP (Lead-free & alogen-free) (Lead-free & alogen-free, lip hip) NOT P2-6400(R2-800), P2-5300(R2-667) P2-4200(R2-533), P2-3200(R2-400) - 4 -

5 R2 SR emory 4. R2 SR odule Product uide Org. ensity Part Number Speed omposition 240Pin R2 VLP Registered I omp. Version Internal anks 128x T2863 7/7/6 128 x 8 * 9pcs 1b -die 8 1 Rank PK eight vail. 60 ball 18.3mm Now 256x T5660 7/7/6 256 x 4 * 18pcs 1b -die ball 392T5663 7/7/6 128 x 8 * 18pcs 1b -die mm Now 240Pin R2 ully uffered I Org. ensity Part Number Speed omposition omp. Internal Version anks Rank PK eight vail. 60 ball 128x T /7/6 8 IT L4 128 x 8 * 9pcs 1b -die mm Now 256x T /7/6 6 IT 1 60 ball 128 x 8 * 18pcs 1b -die IT L mm Now 512x T /7/6 8 IT L4 256 x 4 * 36pcs 1b -die ball 395T /7/6 8 IT L4 128 x 8 * 36pcs 1b -die mm Now - 5 -

6 R2 SR emory 5. Package imension 60all for 1b -die (x4/x8) (atum ) x 8 = # 1 INX RK #1 0.10X (atum ) 4.00 x 10 = ± ± 0.10 K L Solder ball (Post reflow 0.50 ± 0.05) 0.2 (0.30) (0.60) ottom OLIN R Top 0.37± ± all for 1b -die (x16) x 8 = # 1 INX RK 0.10X (atum ) #1 (atum ) K x 14 = ± ± 0.10 L 5.60 N P R (0.30) 0.37± Solder ball (Post reflow 0.50 ± 0.05) (0.60) OLIN R 1.10± ottom Top - 6 -

DDR3 SDRAM Memory SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE.

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