PCLD-870 Wiring Terminal Board User's manual
Copyright This documentation is copyrighted 998 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable. However, Advantech Co., Ltd. assumes no responsibility for its use, nor for any infringements of the rights of third parties which may result from its use. Acknowledgments PC-LabCard is a trademark of Advantech Co., Ltd. Part No. 0087000 st Edition Printed in Taiwan December 998
Contents Introduction... Features... Applications... Board Layout... Single-ended Connections... Differential Connections... 4 CJC Output (Channel 0)...5 Calibration of the CJC Circuity...6 Tec ecechnical Diagram...8 am...8
Introduction The PCLD-870 Screw-terminal Board provides convenient and reliable signal wiring for the PCI-70 and PCI-70HG, both of which have a 68-pin SCSI-II connector. This screw terminal board also includes cold junction sensing circuitry that allows direct measurement of thermocouples transducers. Together with software compensation and linearization, every thermocouple type can be accommodated. Due to its special PCB layout you can install passive components to construct your own signal-conditioning circuits. The user can easily construct a low-pass filter, attenuator or current shunt converter by adding resistors and capacitors on to the board s circuit pads. Features Low-cost screw-terminal board for the PCI-70 and PCI- 70HG with 68-pin SCSI-II connector. On-board CJC (Cold Junction Compensation) circuits for direct thermocouple measurement. Reserved space for signal-conditioning circuits such as lowpass filter, voltage attenuator and current shunt. Industrial-grade screw-clamp terminal blocks for heavy-duty and reliable connections. DIN-rail mounting case for easy mounting. Dimensions:69 mm (W) x mm (L) x 5mm (H) (6.7" x 4.4" x.0") ) PCLD-870 User's Manual
Applications Field wiring for the PCI-70 and PCI-70HG equipped with 68-pin SCSI-II connector. Board Layout CN PCLD-870 WIRING TERMINAL BOARD REV.A 0- CJC ADJUST VR DIG IN CN DIG OUT CN JP CN: 68-pin SCSI-II connector for connection with the PCI-70/ PCI-70HG CN: 0-pin connector for digital output CN: 0-pin connector for digital input VR: Variable resistor for CJC sensing transducer adjustment, : Jumpers for CJC setting PCLD-870 User's Manual
Single-ended Connections RBn Cn where n = 0,,,..., 5 a)a)a)a)a) Straight-through connection (factory setting) = 0 Ω (short) RBn = none Cn = none b)b).6 khz (db) low pass filter = 0 kω RBn = none Cn = 0.0 gf fdb = kcn c)c)c)c)c) 0 : voltage attenuator: = 9 kω RBn = kω Cn = none RBn Attenuation = + RBn d)d) 4 ~ 0 ma to ~ 5 VDC signal converter: = 0 Ω (short) RBn = 50 Ω (0.% percision resistor) Cn = none Cn RBn RBn PCLD-870 User's Manual
Differential Connections RDn CDn + + where n = 0,, 4,..., 4 a)a)a)a)a) Straight-through connection (factory setting): = 0 Ω (short) + =0 Ω (short) RDn = none CDn = none b)b).6 khz (db) low pass filter = 5 kω + =5kΩ RDn = none CDn = 0.0 gf fdb = k( + + ) CDn c)c)c)c)c) 0 : voltage attenuator: = 4.5 kω + =4.5kΩ RDn = kω Cn = none Attenuation = RDn + + + RDn d)d) 4 ~ 0 ma to ~ 5 VDC signal converter: = 0 Ω (short) + =0 Ω (short) RDn = 50 Ω (0.% percision resistor) CDn = none CDn + RDn + RDn + + + + 4 PCLD-870 User's Manual
CJC Output (Channel 0) The PCLD-870 provides on-board CJC (Cold Junction Compensation) for thermocouple measurement. Through the setting of jumpers and JP you control disabling of the CJC circuitry and single-ended or differential mode. The jumper settings are as follows: Differential mode, CJC enabled JP + CJC Single-ended mode, CJC enabled JP + CJC CJC disabled JP + CJC where n = 0,, 4,..., 4 PCLD-870 User's Manual 5
Calibration of the CJC Circuity When the PCLD-870 leaves our factory it is calibrated. To maintain accuracy, it is necessary to check and calibrate the PCLD-870 on a regular basis. In order to calibrate the board, you need the following: A temperature sensor that is connected to the PCLD-870 The PCI-70/70HG board A program that can read the PCI-70/70HG card Note!: Advantech provides the CJCCAL.EXE program, which allows the user to calibrate the PCLD-870 easily. A digital precision thermometer.. Jumper settings: Set the jumpers of the PCLD-870 to single-ended mode: JP Notice that the analog input channel AI0 of the PCI-70/70HG should also be set to single-ended mode.. Temperature measurement Measure the temperature at the temperature sensor with the digital thermometer.. Calculations Use the following formula to calculate the calibration voltage: Vt = 0 (mv/ Κ) x T ( Κ) where Vt: the calibration voltage T : measured temperature in K, and x K = (x - 7.) C, x 0 6 PCLD-870 User's Manual
For example, if the temperature is 5 C (98 K ), the calibration voltage would be 0mV x 98 =.98 V 4. Data acquisition Use the CJCCAL.EXE program to read the voltage output of the PCLD-870 to AI0 of the PCI-70/70HG. 5. Calibration Adjust the voltage output from VRof the PCLD-870 until the voltage output reading corresponds to the environmental temperature. Refer to " Board Layout " on page. PCLD-870 User's Manual 7
8 PCLD-870 User's Manual Technical Diagram Technical Diagram Technical Diagram Technical Diagram Technical Diagram C RB5 Q LM4Z R V+ V- RB C5 CD4 CD8 RA C5 RA0 Q LM5 RD0 C RA CD0 C7 CD CD6 C4 RA8 RJ 68 RA4 RB4 C4 RB5 C RB7 RA7 RB0 C VR 0K CONNECTOR SCSI 68P_4 4 5 6 7 8 9 0 4 5 6 7 8 9 0 4 5 6 7 8 9 0 4 5 6 7 8 9 40 4 4 4 44 45 46 47 48 49 50 5 5 5 54 55 56 57 58 59 60 6 6 6 64 65 66 67 68 69 70 CD4 RA RD0 RB C0 RB C RB4 RB0 RD C8 RB RD8 RD6 JP RB6 J TB40 4 5 6 7 8 9 0 4 5 6 7 8 9 0 4 5 6 7 8 9 0 4 5 6 7 8 9 40 RB RA0 C RA RD4 RB9 C6 RA5 C9 RA CD0 RD4 C0 CD RA6 RA RA4 RB RB8 RA5 RA9 RD AI +V DA0_REF DI0 DO AI7 DA_OUT DI5 DI7 DO AI8 DO DA0_REF DO4 DI AI4 DI8 CNT0_GATE AI AI0 AI4 AI8 AI4 DO0 DO0 DI DO AI0 DGND CNT0_CLK AI5 DO DO5 AI7 DI4 DO AI0 AI4 DO7 DA_REF AI DGND AI5 DI5 DO5 PACER_OUT AI9 DA0_OUT DI CNT0_OUT AI AI AI AI AI AI6 DI6 DA0_OUT AI5 DGND DI9 DGND DA_OUT AI DI4 DO8 +5V AI9 AI0 DI0 DI +V DA_REF DI EXT_TRG AI DO4 AI DGND TRG_GATE AI6 AI DO6 DI AI5 DO9