Memory Management. Reading: Silberschatz chapter 9 Reading: Stallings. chapter 7 EEL 602

Similar documents
Memory Management Outline. Background Swapping Contiguous Memory Allocation Paging Segmentation Segmented Paging

Chapter 7 Memory Management

Chapter 7 Memory Management

Memory management basics (1) Requirements (1) Objectives. Operating Systems Part of E1.9 - Principles of Computers and Software Engineering

OPERATING SYSTEM - MEMORY MANAGEMENT

The Deadlock Problem. Deadlocks. Deadlocks. Bridge Crossing Example

Operating Systems, 6 th ed. Test Bank Chapter 7

OPERATING SYSTEMS MEMORY MANAGEMENT

Memory unit sees only the addresses, and not how they are generated (instruction counter, indexing, direct)

& Data Processing 2. Exercise 3: Memory Management. Dipl.-Ing. Bogdan Marin. Universität Duisburg-Essen

W4118: segmentation and paging. Instructor: Junfeng Yang

Memory Allocation. Static Allocation. Dynamic Allocation. Memory Management. Dynamic Allocation. Dynamic Storage Allocation

Memory Management 1. Memory Management. Multitasking without memory management is like having a party in a closet.

Virtual vs Physical Addresses

Technical Properties. Mobile Operating Systems. Overview Concepts of Mobile. Functions Processes. Lecture 11. Memory Management.

CS5460: Operating Systems

Chapter 12. Paging an Virtual Memory Systems

Two Parts. Filesystem Interface. Filesystem design. Interface the user sees. Implementing the interface

Operating Systems. Virtual Memory

Page 1 of 5. IS 335: Information Technology in Business Lecture Outline Operating Systems

CS 61C: Great Ideas in Computer Architecture Virtual Memory Cont.

A3 Computer Architecture

Segmentation Segmentation: Generalized Base/Bounds

Operating System Tutorial

COS 318: Operating Systems. Virtual Memory and Address Translation

How To Write A Page Table

OPERATING SYSTEM - VIRTUAL MEMORY

Chapter 2: OS Overview

Lecture 17: Virtual Memory II. Goals of virtual memory

Chapter 11: File System Implementation. Chapter 11: File System Implementation. Objectives. File-System Structure

Chapter 1 Computer System Overview

CHAPTER 17: File Management

361 Computer Architecture Lecture 14: Cache Memory

Virtual Memory. Virtual Memory. Paging. CSE 380 Computer Operating Systems. Paging (1)

Memory management. Chapter 4: Memory Management. Memory hierarchy. In an ideal world. Basic memory management. Fixed partitions: multiple programs

Disk Space Management Methods

Chapter 2 Basic Structure of Computers. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Peter J. Denning, Naval Postgraduate School, Monterey, California

Computer Architecture

Advanced Computer Architecture-CS501. Computer Systems Design and Architecture 2.1, 2.2, 3.2

Stack Allocation. Run-Time Data Structures. Static Structures

Outline: Operating Systems

HyperThreading Support in VMware ESX Server 2.1

Board Notes on Virtual Memory

a storage location directly on the CPU, used for temporary storage of small amounts of data during processing.

Lecture 10: Dynamic Memory Allocation 1: Into the jaws of malloc()

Physical Data Organization

Computers. Hardware. The Central Processing Unit (CPU) CMPT 125: Lecture 1: Understanding the Computer

Chapter 12 File Management

Chapter 11: File System Implementation. Operating System Concepts with Java 8 th Edition

Chapter 12 File Management. Roadmap

Operating Systems CSE 410, Spring File Management. Stephen Wagner Michigan State University

File-System Implementation

Convenience: An OS makes a computer more convenient to use. Efficiency: An OS allows the computer system resources to be used in an efficient manner.

x64 Servers: Do you want 64 or 32 bit apps with that server?

Operating System Overview. Otto J. Anshus

1 File Management. 1.1 Naming. COMP 242 Class Notes Section 6: File Management

Record Storage and Primary File Organization

File System & Device Drive. Overview of Mass Storage Structure. Moving head Disk Mechanism. HDD Pictures 11/13/2014. CS341: Operating System

2) Write in detail the issues in the design of code generator.

Paging: Introduction A Simple Example And Overview

Hardware Assisted Virtualization

Keil C51 Cross Compiler

On Demand Loading of Code in MMUless Embedded System

System Virtual Machines

6. Storage and File Structures

Introduction Disks RAID Tertiary storage. Mass Storage. CMSC 412, University of Maryland. Guest lecturer: David Hovemeyer.

Chapter 11 I/O Management and Disk Scheduling

Logical Operations. Control Unit. Contents. Arithmetic Operations. Objectives. The Central Processing Unit: Arithmetic / Logic Unit.

An Introduction to Computer Science and Computer Organization Comp 150 Fall 2008

Full and Para Virtualization

CS 464/564 Introduction to Database Management System Instructor: Abdullah Mueen

Organization of Programming Languages CS320/520N. Lecture 05. Razvan C. Bunescu School of Electrical Engineering and Computer Science

OS OBJECTIVE QUESTIONS

Chapter 12 File Management

CS 377: Operating Systems. Outline. A review of what you ve learned, and how it applies to a real operating system. Lecture 25 - Linux Case Study

This tutorial will take you through step by step approach while learning Operating System concepts.

POSIX. RTOSes Part I. POSIX Versions. POSIX Versions (2)

Reconfigurable Architecture Requirements for Co-Designed Virtual Machines

INTRODUCTION The collection of data that makes up a computerized database must be stored physically on some computer storage medium.

Chapter 3: Operating-System Structures. System Components Operating System Services System Calls System Programs System Structure Virtual Machines

File System Management

Part III Storage Management. Chapter 11: File System Implementation

Chapter 5 Cloud Resource Virtualization

Chapter 11: File System Implementation. Operating System Concepts 8 th Edition

1/20/2016 INTRODUCTION

Kernel Optimizations for KVM. Rik van Riel Senior Software Engineer, Red Hat June

1 Organization of Operating Systems

W4118 Operating Systems. Instructor: Junfeng Yang

Symbol Tables. Introduction

Unit Storage Structures 1. Storage Structures. Unit 4.3

Virtual Memory. How is it possible for each process to have contiguous addresses and so many of them? A System Using Virtual Addressing

Chapter 14 MS-DOS Operating System

APP INVENTOR. Test Review

Chapter 3 Operating-System Structures

Traditional IBM Mainframe Operating Principles


The Classical Architecture. Storage 1 / 36

Transcription:

Memory Management Reading: Silberschatz chapter 9 Reading: Stallings chapter 7 1

Outline Background Issues in Memory Management Logical Vs Physical address, MMU Dynamic Loading Memory Partitioning Placement Algorithms Dynamic Partitioning Buddy System Paging Memory Segmentation Example Intel Pentium 2

Background Main memory fast, relatively high cost, volatile Secondary memory large capacity, slower, cheaper than main memory and is usually non volatile The CPU fetches instructions/data of a program from memory; therefore, the program/data must reside in the main (RAM and ROM) memory Multiprogramming systems main memory must be subdivided to accommodate several processes This subdivision is carried out dynamically by OS and known as memory management 3

Issues in Memory Management Relocation: Swapping of active process in and out of main memory to maximize CPU utilization Process may not be placed back in same main memory region! Ability to relocate the process to different area of memory Protection: Protection against unwanted interference by another process Must be ensured by processor (hardware) rather than OS Sharing: Flexibility to allow several process to access the same portions of the main memory Efficiency: Memory must be fairly allocated for high processor utilization, Systematic flow of information between main and secondary memory 4

Binding of Instructions and Data to Memory Compiler Generates Object Code Linker Combines the Object code into a single self sufficient executable code Loading Copies executable code into memory Execution dynamic memory allocation 5

Binding of Instructions and Data to Memory Address binding of instructions and data to memory addresses can happen at three different stages Compile time: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes Load time: Must generate relocatable code if memory location is not known at compile time Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another most general purpose OS 6

Logical Vs Physical Address Space Each logical address is bound to physical address space; Logical address generated by the CPU; also referred to as virtual address Physical address address seen by the memory unit Logical and physical addresses ; Identical in compile-time and load-time addressbinding schemes Differ in execution-time address-binding scheme Logical address Virtual address 7

Memory-Management Unit (MMU) The runtime mapping from virtual physical address Relocation register is added to every address generated by user process The user program logical addresses, it never sees the real physical addresses 8

Dynamic Loading Routine is not loaded until it is called Better memory-space utilization unused routine is never loaded Useful to handle infrequently occurring cases, e.g. error handling routines No special support from the OS required implemented through user program design 9

Memory Partitioning Two schemes used in several variations of now-obsolete OS Fixed Partitioning: OS occupies fixed portion of main memory, rest available for multiple processes. Two alternatives; Equal size fixed partitions any process partition size can be loaded Unequal size partitions several unequal size partitions, process of matching sizes Problems with equal size fixed partitions: If program is bigger than a partition size, use of overlays Main memory utilization is extremely inefficient; Internal Fragmentation waste of space internal to partition due to the fact that block of data loaded is smaller than partition 10

Unequal-Size Partitions Assign each processes the smallest partition to which it will fit Advantages: Process are always assigned in such a way as to minimize wasted memory within a partition internal fragmentation Relatively simple and require minimal OS software and overhead Disadvantages: Limitations on the active number of processes, number of partitions specified at system generation time Small jobs cannot utilize partition space efficiently; In most cases it is an inefficient technique 11

Placement Algorithm with Partitions Equal-size partitions Because all partitions are of equal size, it does not matter which partition is used Unequal-size partitions Can assign each process to the smallest partition within which it will fit Queue for each partition size Processes are assigned in such a way as to minimize wasted memory within a partition 12

Placement Algorithm with Partitions 13

Dynamic Partitioning Developed to address the drawbacks of fixed partitioning Partitions of variable length and number; Process in bought into main memory, it is allocated exactly as much memory as it requires Leaves Holes First at the end eventually lot of small holes Memory becomes more fragmented with time, memory utilization External Fragmentation Memory that is external to all partitions becomes increasingly fragmented Compaction Used to overcome external fragmentation OS shifts processes so that free memory is together in one block Compaction requires use of dynamic relocation capability Time consuming procedure and wasteful of processor time 14

Dynamic Partitioning 15

Placement Algorithms Compaction is time consuming OS must be clever in plugging holes while assigning processes to memory Three placement algorithms Selecting among free blocks of main memory Best-Fit: Closest in size to the request First-Fit: Scans the main memory from the beginning and first available block that is large enough Next-Fit: Scans the memory from the location of last placement and chooses next available block that is large enough 16

Placement Algorithms - Example Allocation of 16 MB block using three placement algorithms 17

Placement Algorithms Which of the above approaches is the best? Process Size/Sequence, General Comments First-Fit Simplest, usually the best and fastest Next-Fit Slightly worst results with next fit Compaction may be more frequently required Best-Fit Usually the worst performer; main memory is quickly littered by blocks too small to satisfy memory allocation requests Compaction - more frequently than other algorithms 18

Buddy System Drawbacks Fixed partitioning: Limits number of active process, inefficient if poor match between partition and process sizes Dynamic Partitioning: Complex to maintain, includes the overhead of compaction Compromise may be the Buddy System - Entire space available is treated as a single block of 2 U If a request of size s such that 2 U-1 < s 2 U, entire block is allocated Otherwise block is split into two equal buddies Process continues until smallest block greater than or equal to s is generated 19

Buddy System - Example Initial block size 1 MB; First request A is for 100 KB 20

Buddy System - Example Binary tree representation immediately after Release B request. 21

Relocation A process may occupy different partitions which means different absolute memory locations during execution (from swapping) Compaction will also cause a program to occupy a different partition which means different absolute memory locations 22

Paging Partitioning main memory small equal fixed-size chunks Each process is divided into the same size chunks pages Chunks of memory frames or page frames Advantages No external fragmentation Internal fragmentation only a fraction of last page of a process OS maintains a page table for each process Contains frame location for each page in the process Memory address a page number, a offset within the page Processor hardware logical-to-physical address translation 23

Paging - Example Assignment of process pages to free frames 24

Paging - Example Assignment of process pages to free frames. 25

Paging - Example Data structures for page tables at time epoch (f) 26

Paging - Example Convenience in Paging scheme Frame size power of 2 Relative address (wrt origin of program) and the logical address (page # and offset) are same Example - 16 bit address, page size 1K or 1024 bytes Maximum 64 (2 6 ) pages of 1K bytes each Advantages Logical addressing transparent to programmer, assembler, linker Relatively easy to implement a function to perform dynamic address translation at run time 27

Paging - Example 28

Paging - Example Logical-to-physical address translation in Paging 29

Paging - Example Logical-to-physical address translation in Paging 30

Implementation of Page Table Different methods of storing page tables, OS dependent Pointer to page table PCB Hardware implementation of page tables Page table Set of dedicated high speed registers, Simplest Suitable for small page table sizes, Usually very large requirements Page table is kept in main memory Page-table base register (PTBR) points to the page table Two memory access, page table and other for data/instruction Memory access slowed by a factor of two Solution to the two memory access problem Usage of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) TLB contains Page # Frame #, Small # of TLB entries (64-1024) 31

Paging Hardware With TLB 32

Shared Pages Shared code One copy of read-only (reentrant) code shared among processes, e.g. text editors, compilers Shared code must appear in same location in the logical address space of all processes Private code and data Each process keeps a separate copy of the code and data The pages for the private code and data can appear anywhere in the logical address space 33

Shared Pages Example Sharing of code in paging environment 34

Segmentation Memory-management scheme that supports user view of memory Program Collection of segments (name and length) Complier automatically constructs segments reflecting input program Example A C complier might create separate segments for the following main program, procedure, function, object, local variables, global variables, common block, stack, symbol table, arrays 35

Segmentation The program/process and its associated data is divided into a number of segments All segments of all programs do not have to be of the same length There is a maximum segment length Addressing consist of two parts - a segment number and an offset Since segments are not equal, segmentation is similar to dynamic partitioning 36

Address Translation Architecture 37

User s View of a Program 38

Logical View of Segmentation 1 1 4 2 3 4 2 3 user space physical memory space 39

Example of Segmentation 40

Sharing of Segments 41

Segmentation Compared to dynamic partition, segmentation program may occupy more than one partition and these partitions need not be contiguous Segmentation eliminates the need for internal fragmentation but like dynamic partitioning it suffers from external fragmentation Process is broken in small pieces, the external fragmentation is less with segmentation than dynamic partition Paging is invisible to the programmer, segmentation is usually visible 42

Segmentation EXAMPLE: Logical Addresses. 43

Segmentation EXAMPLE: Logical-to-physical address translation in Segmentation 44

Hierarchical Page Tables Most systems support a large logical address space 2 32 2 64, page table itself becomes excessively large Break up the logical address space into multiple page tables A simple technique is a two-level page table 45

Two-Level Paging Example A logical address (32-bit machine with 4K page size) is divided into: a page number consisting of 20 bits a page offset consisting of 12 bits Since the page table is paged, page number is further divided into: a 10-bit page number a 10-bit page offset Thus, a logical address is as follows: page number page offset p i p 2 d 10 10 12 where p i is an index into the outer page table, and p 2 is the displacement within the page of the outer page table 46

Two-Level Page-Table Scheme 47

Address-Translation Scheme Address-translation scheme for a two-level 32-bit paging architecture 48