FXA 1012 Frame Transfer CCD Image Sensor



Similar documents
TOSHIBA CCD Image Sensor CCD (charge coupled device) TCD2955D

TOSHIBA CCD LINEAR IMAGE SENSOR CCD(Charge Coupled Device) TCD1304AP

NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter

Programmable Single-/Dual-/Triple- Tone Gong SAE 800

TS321 Low Power Single Operational Amplifier

AP331A XX G - 7. Lead Free G : Green. Packaging (Note 2)

0.9V Boost Driver PR4403 for White LEDs in Solar Lamps

Kit Watt Audio Amplifier

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

Kit 27. 1W TDA7052 POWER AMPLIFIER

NTE923 & NTE923D Integrated Circuit Precision Voltage Regulator

ILX pixel CCD Linear Image Sensor (B/W)

LM138 LM338 5-Amp Adjustable Regulators

Advanced Monolithic Systems

LM117 LM317A LM317 3-Terminal Adjustable Regulator

CCD42-40 Ceramic AIMO Back Illuminated Compact Package High Performance CCD Sensor

DATA SHEET. TDA1543 Dual 16-bit DAC (economy version) (I 2 S input format) INTEGRATED CIRCUITS

TSL INTEGRATED OPTO SENSOR

STF & STF201-30

Baseband delay line QUICK REFERENCE DATA

TDA4605 CONTROL CIRCUIT FOR SWITCH MODE POWER SUPPLIES USING MOS TRANSISTORS

MM74HC4538 Dual Retriggerable Monostable Multivibrator

LM1084 5A Low Dropout Positive Regulators

Features. Modulation Frequency (khz) VDD. PLL Clock Synthesizer with Spread Spectrum Circuitry GND

ICS379. Quad PLL with VCXO Quick Turn Clock. Description. Features. Block Diagram

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS

LM139/LM239/LM339/LM2901/LM3302 Low Power Low Offset Voltage Quad Comparators

Cross-beam scanning system to detect slim objects. 100 mm in

INTEGRATED CIRCUITS DATA SHEET. TDA W BTL mono audio amplifier. Product specification File under Integrated Circuits, IC01

CCD Line Scan Array P-Series High Speed Linear Photodiode Array Imagers

Cold-Junction-Compensated K-Thermocoupleto-Digital Converter (0 C to C)

DATA SHEET. TDA8560Q 2 40 W/2 Ω stereo BTL car radio power amplifier with diagnostic facility INTEGRATED CIRCUITS Jan 08

Supply voltage Supervisor TL77xx Series. Author: Eilhard Haseloff

STF THRU STF203-33

ICS514 LOCO PLL CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET

CD4013BC Dual D-Type Flip-Flop

MADR TR. Single Driver for GaAs FET or PIN Diode Switches and Attenuators Rev. V1. Functional Schematic. Features.


DRM compatible RF Tuner Unit DRT1

SWITCH-MODE POWER SUPPLY CONTROLLER PULSE OUTPUT DC OUTPUT GROUND EXTERNAL FUNCTION SIMULATION ZERO CROSSING INPUT CONTROL EXTERNAL FUNCTION

MADR TR. Quad Driver for GaAs FET or PIN Diode Switches and Attenuators Rev. 4. Functional Schematic. Features.

LM118/LM218/LM318 Operational Amplifiers

MADR TR. Quad Driver for GaAs FET or PIN Diode Switches and Attenuators. Functional Schematic. Features. Description. Pin Configuration 2

LM108 LM208 LM308 Operational Amplifiers

LM2704 Micropower Step-up DC/DC Converter with 550mA Peak Current Limit

SG2525A SG3525A REGULATING PULSE WIDTH MODULATORS

Y.LIN ELECTRONICS CO.,LTD.

Product Datasheet P MHz RF Powerharvester Receiver

TS555. Low-power single CMOS timer. Description. Features. The TS555 is a single CMOS timer with very low consumption:

How To Power A Power Supply On A Microprocessor (Mii) Or Microprocessor Power Supply (Miio) (Power Supply) (Microprocessor) (Miniio) Or Power Supply Power Control (Power) (Mio) Power Control

Voltage Output Temperature Sensor with Signal Conditioning AD22100

Low Voltage, Resistor Programmable Thermostatic Switch AD22105

Series AMLDL-Z Up to 1000mA LED Driver

4N25 Phototransistor Optocoupler General Purpose Type

Video surveillance camera Installation Guide

MM74HC174 Hex D-Type Flip-Flops with Clear

High-Speed, 5 V, 0.1 F CMOS RS-232 Driver/Receivers ADM202/ADM203

LF442 Dual Low Power JFET Input Operational Amplifier

CA723, CA723C. Voltage Regulators Adjustable from 2V to 37V at Output Currents Up to 150mA without External Pass Transistors. Features.

LM56 Dual Output Low Power Thermostat

TCS230 PROGRAMMABLE COLOR LIGHT TO FREQUENCY CONVERTER TAOS046 - FEBRUARY 2003

PS323. Precision, Single-Supply SPST Analog Switch. Features. Description. Block Diagram, Pin Configuration, and Truth Table. Applications PS323 PS323

Precision, Unity-Gain Differential Amplifier AMP03

High Common-Mode Rejection. Differential Line Receiver SSM2141. Fax: 781/ FUNCTIONAL BLOCK DIAGRAM FEATURES. High Common-Mode Rejection

+5 V Powered RS-232/RS-422 Transceiver AD7306

Data Sheet. HCMS-235x CMOS Extended Temperature Range 5 x 7 Alphanumeric Display. Features. Description. Typical Applications

TSL250, TSL251, TLS252 LIGHT-TO-VOLTAGE OPTICAL SENSORS

MASW TB. GaAs SPST Switch, Absorptive, Single Supply, DC-4.0 GHz. Features. Pin Configuration 1,2,3,4. Description. Ordering Information

High Speed, Low Power Monolithic Op Amp AD847

INTEGRATED CIRCUITS DATA SHEET. TDA7000 FM radio circuit. Product specification File under Integrated Circuits, IC01

PowerAmp Design. PowerAmp Design PAD135 COMPACT HIGH VOLATGE OP AMP

ICS SPREAD SPECTRUM CLOCK SYNTHESIZER. Description. Features. Block Diagram DATASHEET

CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate

Op-Amp Simulation EE/CS 5720/6720. Read Chapter 5 in Johns & Martin before you begin this assignment.

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

40 V, 200 ma NPN switching transistor

IR Receiver Module for Light Barrier Systems

MM74HC273 Octal D-Type Flip-Flops with Clear

PIN CONFIGURATION FEATURES ORDERING INFORMATION ABSOLUTE MAXIMUM RATINGS. D, F, N Packages

MH Hybrid Subscriber Line Interface Circuit (SLIC) Preliminary Information. Features. Description. Applications. Ordering Information

Dome Camera with IR Night Vision

Transistor Amplifiers

Features. Symbol JEDEC TO-220AB

Features. Applications

K817P/ K827PH/ K847PH. Optocoupler with Phototransistor Output. Vishay Semiconductors. Description. Applications. Features.

Push-Pull FET Driver with Integrated Oscillator and Clock Output

AS A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response

Low Noise, Matched Dual PNP Transistor MAT03

S2000 Spectrometer Data Sheet

2048-pixel CCD Linear Sensor (B/W) for Single 5V Power Supply Bar-code Reader

PI5A100. Precision, Wide-Bandwidth Quad SPDT Analog Switch. Description. Features. Block Diagram, Pin Configuration. Applications.

Modifying the Yaesu FT-847 External MHz Reference Input

N-channel enhancement mode TrenchMOS transistor

CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset

Color Mark Sensor with Red or Green LED E3S-VS

LM380 Audio Power Amplifier

PS25202 EPIC Ultra High Impedance ECG Sensor Advance Information

High Voltage Current Shunt Monitor AD8212

Transcription:

IMAGE SENSORS FXA Frame Transfer CCD Image Sensor January 7 File under Image Sensors Philips Semiconductors

Frame Transfer CCD Image Sensor FXA M active pixels (H x 9) /-inch type optical format Still and monitor modes RGB Bayer pattern colour filters Progressive scan Excellent anti-blooming (ertical Overflow Drain) High dynamic range (>7dB) High sensitivity Low dark current and low fixed pattern noise Low read-out noise ariable electronic shuttering Data rate up to MHz, frames/s Small outline LCC package Low cost Description The FXA is a colour frame-transfer CCD image sensor designed for consumer digital photography applications. The combination of high speed and a high linear dynamic range of over true bits makes this device the perfect solution for use in compact high quality imaging applications. Two modes of operation provide both a monitoring image for LCD screens, and a full resolution, zero-smear still image with excellent colour rendition. The device structure is shown in figure. Device structure Optical size:. mm (H) x. mm () Chip size: 9.9 mm (H) x 9. mm () Pixel size:. µm x. µm Active pixels: (H) x 9 () Total no. of pixels: (H) x () Optical black pixels: Left: Right: 7 Optical black lines: Top: Bottom: Total no. of storage lines: 9 Dummy register cells: dark lines GBGB G B G B R G R G black lines R G R G GBGB G B G B Image Section active pixels G B G B R G R G 9 active lines 7 G B G B R G R G dark + dummy lines Storage Section 9 lines x cells Output amplifier cells Output register Figure - Device structure January

Frame Transfer CCD Image Sensor FXA Architecture of the FXA The FXA consists of an open image section and a storage section with an optical light shield. An output register and amplifier are located below the storage section for read-out. The optical centres of all pixels in the image section form a square grid. The image area has RGB Bayer colour filter pattern. The charge is generated and integrated in the image section. This section is controlled by four image clock phases (A to A). After the integration time the image charge is shifted one line at a time to the storage section. The storage section is controlled by four storage clock phases (B to B). In the still mode the image information is transported straight through the storage section to the horizontal output register. In the monitoring mode subsampling of the image is performed at the image-to-storage transition and the subsampled image is stored in the storage section. The stored image is shifted one line at a time into the horizontal output register. In the next active line time the pixels are transported towards the output amplifier. Four clock phases (C to C) control the pixel transport in the output register. In the output amplifier the charge packets are dumped one by one on a floating diffusion area. The voltage of this area is sensed and buffered by a three-stage FET source-follower. Figure shows the detailed internal structure. IMAGE SECTION Image diagonal (active video only) Aspect ratio Active image width x height Pixel width x height Image clock pins Capacity of each clock phase Number of active lines Number of black reference lines Number of dummy lines Total number of lines Number of active pixels per line Number of black reference pixels per line Total number of pixels per line. mm :. x. mm. x. µm A, A,, A. nf per pin 9 (+) 7 (+7) STORAGE SECTION Cell width x height Storage clock pins Capacity of each clock phase Number of cells per line x number of lines. x. µm B, B, B, B. nf per pin x 9 OUTPUT REGISTER Number of dummy cells Total number of register cells Output register clock pins Capacity of each clock phase Reset Gate (RG) capacity Output stage 9 C, C,, C pf per pin pf -stage source follower (open source) January

Frame Transfer CCD Image Sensor FXA Operational modes The FXA is designed for high-resolution digital photography with real time monitoring at reduced resolution. Two different modes of operation make this possible. In the monitoring mode, images with reduced vertical resolution are produced that are suitable for LCD displays. These images can have for example,, or lines at up to images per second. In the still picture mode the high-resolution image is read-out directly. A mechanical shutter ensures a % smear-free image with a resolution of (H) x (). A A A A A A A lines A A A A A One Pixel A A A A A 9 active images lines IMAGE A A A A A A A A A A A A A A lines A A A FT CCD A A B B OG: output gate RG: reset gate RD: reset drain B B B B B 9 storage lines STORAGE B B B B B OUT B B B B OG C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C RG RD dummy pixels column black timing columns column + image pixels column + column ++7 7 black timing columns A, A,, A: clocks of image section B, B, B, B: clocks of storage section C, C,, C: clocks of horizontal register Figure - Detailed internal structure January

Frame Transfer CCD Image Sensor FXA Specifications Absolute Maximum Ratings Min. Max. Unit GENERAL: storage temperature ambient temperature during operation voltage between any two gates DC current through any clock phase (absolute value) OUT current (no short circuit protections) - - - -. + + + +. C C µa ma OLTAGES IN RELATION TO PS: NS, RD all other pins -. - + + OLTAGES IN RELATION TO NS: RD PS all other pins - - - +. +. +. NS PS SFD SFS OG RD N substrate P substrate Source Follower Drain Source Follower Source Output Gate Reset Drain DC Conditions Min. [] Typical [] Max. [] 9. 9 7 9. Max. current [ma]. - - Min. Typical Max. Pin Number of adjustments NS To set the NS voltage for optimal Anti-Blooming (vertical overflow drain), it should be adjustable between minimum and maximum values. Currents INS and IPS are specified at overexposure of x Qmax. Measured with Rload =. kohms. AC Clock Level Conditions Min. Typical Max. Unit IMAGE CLOCKS: A-clock amplitude A-clock low level STORAGE CLOCKS: B-clock amplitude B-clock low level HORIZONTAL AND RESET CLOCKS: C-clock amplitude C-clock low level C, C-clock low level C, C.... Reset Gate (RG) amplitude Reset Gate (RG) high level.. NS PULSE: Charge Reset (CR) pulse on NS.. January

Frame Transfer CCD Image Sensor FXA Timing diagrams (for default operation) AC Characteristics Min. Typical Max. Unit Horizontal frequency ertical frequency Charge Reset (CR) time Rise and fall times: image clocks (A) register clocks (C) reset gate (RG). Tp/ Tp/ MHz MHz µs ns ns ns Typical value for monitor mode. Duty cycle = % Tp is pulse period of C clocks C-clock pulses FREQUENCY = MHz COMPLETE LINE READOUT CYCLE SSC C C C RG blue (even) lines red (odd) lines dummy pixels black pixels active pixels overscan pixels active pixels within aspect ratio overscan pixels G B G B G B G B G B G B G B G B G B G B G B G B G B G....... R G R G R G R G R G R G R G R G R G R G R G R G R G R....... B G 7 black pixels ns ns MHz HORIZONTAL TRANSPORT PULSES C ns C C.7ns RG SENSOR SIGNAL Figure - Timing diagram for horizontal pulses January

Frame Transfer CCD Image Sensor FXA HORIZONTAL PULSES C-clock frequency = MHz Thorizontal = /E * =.us 9 sensor pixels overscan active pixels phase count 9 9 9 7 black / dummy black lineblanking black dummy phic reg overscan active pixels SSC CR_A/A 9 us 9 CR_NS 9 9 A / B Line shift 9 9 A / B Line shift 9 9 / B Line shift 9 9 A / B Line shift 9 9 Figure - Pulse timing diagrams for vertical clocks during line blanking STILL PICTURE MODE - /s Integration Tvertical = (/E * ) * =. ms line count integration 9 / 7 9 9 storage lines dummy sensor lines black lines overscan active lines overscan black lines 9 9 9 9 9 9 97 9 99 7 9 7 9 7 image lines dummy lines integration 99 7 9 7 9 7 9 NS_pulse A / A CR CR / A B / B line shift B / B Figure - Still picture mode timing diagrams January 7

Frame Transfer CCD Image Sensor FXA MONITOR MODE - /s integration Tvertical = (/E * ) * =.7ms line count dummy black dummy black / 7 9 7 9 7 9 9 sensor lines subsampled 9 9 integration black remaining storage lin 97 9 99 7 9 / NS_pulse A / A CR CR / A B / B B / B frame shift line shift FS and Subsampling pulses in monitor mode phase - : Frame Shift with / subsampling Transport frequency.mhz dummy black 9 active image lines to lines via subsampling FS-counter 7 9 7 9 7 9 7 A A A B B B B Remaining active image lines black Removing storage gap lines FS-counter 9 9 9 9 97 9 99 7 9 7 9 7 9 A A A B B B B Figure - Monitor mode timing diagrams January

Frame Transfer CCD Image Sensor FXA Pixel timing C C C RG > time Y : / Div. X : ns/ Div. Figure 7 - Start horizontal readout January 9

Frame Transfer CCD Image Sensor FXA Performance The test conditions for the performance characteristics in the still mode of operation are as follows: All values are measured using typical operating conditions. Integration time = / sec (unless specified otherwise). Test temperature = C (K). The light source is a K lamp with a.7mm thick BG infrared cut-off filter; F=. ertical Anti-Blooming condition Horizontal transport frequency = MHz. Performance Characteristics Min. Typical Max. Unit Charge Transfer Efficiency vertical.999997 Charge Transfer Efficiency horizontal.999997 Image lag % Sensitivity, green S G 9 m/lux.s Sensitivity, red S R m/lux.s Sensitivity, blue S B 7 m/lux.s Sensitivity Ratio S G / S R. Sensitivity Ratio S G / S B.7 Sensitivity Ratio S R / S B. Shading per colour plane % Differential colour shading % PRNU per colour plane.. % Green green difference % Power consumption (Still mode) mw Power consumption (Monitoring mode) mw Full-well capacity saturation level (Q max ) x Saturation signal 7 m Dynamic range at C : log(q max /noise electrons) 7 db Overexposure 7 handling x Q max level Charge Transfer Efficiency values are expressed as the value per gate transfer. The sensitivity when a light source directly illuminates the CCD. Shading is defined as the one-σ value of the pixel output distribution expressed as a percentage of the mean value output (low-pass image). Difference in shading between the four colour planes, with standard imaging condition, still mode. Difference in average green signal between green in red line and green in blue line, with standard imaging condition, still mode Q max is determined from the lowpass filtered image. 7 Overexposure over entire area while maintaining good ertical Anti-Blooming (AB). It is tested by measuring the dark line. January

Frame Transfer CCD Image Sensor FXA RGB response Response (A.U.)* 9 Red Green 7 Blue 7 Wavelenght (nm) *Arbitrary units Figure - RGB response Output Buffer Min Typical Max Unit Conversion factor at output node µ/el. Supply current ma Bandwidth 9 MHz RMS readout noise @ MHz bandwidth after CDS el. Dark Condition at C Min. Typical Max. Unit Average no. of dark signal electrons per pixel after / sec integration electrons Dark signal shading m Dark current level @ C.. na/cm Fixed Pattern Noise (FPN) @ C electrons Typical operating conditions (Image capture mode; C; /s exp. time). FPN is the one-σ value of the highpass image. January

Frame Transfer CCD Image Sensor FXA Application information Current handling One of the purposes of PS is to drain the holes that are generated during exposure of the sensor to light. Free electrons are either transported to the RD connection and, if excessive (from overexposure), free electrons are drained to NS. No current should flow into PS. During overexposures a total current. to ma through PS may be expected. The PNP emitter follower in the circuit diagram (figure 9) serves these current requirements. NS drains superfluous electrons as a result of overexposure. In other words, it only sinks current. During overexposures a total current of. to ma through NS may be expected. The NPN emitter follower in the circuit diagram meets these current requirements. The clamp circuit, consisting of the diode and electrolytic capacitor, enables the addition of a Charge Reset (CR) pulse on top of an otherwise stable NS voltage. To protect the CCD, the current resulting from this pulse should be limited. This can be accomplished by designing a pulse generator with a rather high output impedance. Decoupling of DC voltages All DC voltages (not NS, which has additional CR pulses as described above) should be decoupled with a nf decoupling capacitor. This capacitor must be mounted as close as possible to the sensor pin. Further noise reduction (by bandwidth limiting) is achieved by the resistors in the connections between the sensor and its voltage supplies. The electrons building up the charge packets that will reach the floating diffusion only add up to a small current, which will flow through RD. Therefore a large series resistor in the RD connection may be used. Output To limit the on-chip power dissipation, the output buffer is designed with open source output. The output should therefore be loaded with a current source or more simply with a resistance to GND. In order to prevent the output (which typically has an output impedance of about Ohm) from bandwidth limitation as a result of capacitive loading, load the output with an emitter follower built from a highfrequency transistor. Mount the base of this transistor as close as possible to the sensor and keep the connection between the emitter and the next stage short. The CCD output buffer can easily be destroyed by ESD. By using this emitter follower, this danger is suppressed; do NOT reintroduce this danger by measuring directly on the output pin of the sensor with an oscilloscope probe. Instead, measure on the output of the emitter follower. Slew rate limitation is prevented by avoiding a too-small quiescent current in the emitter follower; about ma should do the job. The collector of the emitter follower should be decoupled properly to suppress the Miller effect from the base-collector capacitance. A CCD output load resistor of. kω typically results in a bandwidth of 9MHz. Device protection The output buffer or NS of the FXA is likely to be damaged if PS rises above SFD or RD at any time. This danger is most realistic during power-on or power-off of the camera. Never exceed the maximum output current. This may damage the device permanently. The maximum output current should be limited to ma. Be especially aware that the output buffers of these image sensors are very sensitive to ESD damage. Because of the fact that our CCDs are built on an n-substrate, we are dealing with some parasitic NPN transistors. To avoid activation of these transistors during switch-on and switch-off of the camera, we recommend the application diagram of figure 9. From CCD Supply From -Drivers From PPG SFD NS B B A A A B B ES C C C C RG BAT7 NC A A A B NC B C R n R K 7K R K BCC BAT7 B PS NC FXA B NS NC R C.7uF K BAS 7K R n CCD OUT Cstray 7E R BFR9 R7 K R9 E R K C n OUT SFD SFS RD RG C C BAT7 C n OG C C C7 C C9 R n K n n n H DRIER K R BAS BAS R K BAS R K 7ACT C n C n R R R R7 K K K K Figure 9 - Application diagram to protect the FXA January

Frame Transfer CCD Image Sensor FXA Peripheral ICs To allow compact and low-cost applications, use of the following peripheral circuits for the FXA is suggested: Pulse Pattern Generator The PPG (pulse pattern generator) delivers all the pulses, at logic level, to drive the vertical clocks of the CCD. For this sensor, the PPG is included in the DSP SAA or separately in the Timing Generator SAA. ertical Drivers + DC/DC Converter The vertical drivers convert the. or logic pulses from the PPG to analog pulses to drive the vertical clocks of the CCD. The recommended driver is the Philips TDA999. CDS - AGC - ADC The combined CDS (correlated double sampling) - AGC (automatic gain control) and ADC ( bit analog-to-digital convertor) is the easiest way to link the output of the CCD to a DSP (digital signal processor). Philips Semiconductors # TDA7 DSP A dedicated DSP has been developed that can handle the image format and different modes of the FXA. Philips Semiconductors # SAA. Special modes of operation Monitor mode with lines vertical resolution is achieved with : subsampling, yielding / = lines. When : subsamlping is applied, an image with lines vertical resolution is obtained. Device Handling An image sensor is a MOS device which can be destroyed by electrostatic discharge (ESD). Therefore, the device should be handled with care. Always store the device with short-circuiting clamps or on conductive foam. Always switch off all electric signals when inserting or removing the sensor into or from a camera (the ESD protection in a CCD image sensor is less effective than the ESD protection of standard CMOS circuits). Being a high quality optical device, it is important that the cover glass remain undamaged. When handling the sensor, use fingercots. To remove the protective tape from the cover glass, use the following procedure: do not scratch or tear off the protective tape before mounting. peel off the tape slowly. the use of an ionised air blower is recommended when peeling off the tape. once peeled off, do not reuse the tape. To clean stains from the package surface, use a cotton stick soaked in ethanol. Wipe carefully in order not to scratch the glass surface. Dry rubbing of the cover glass may cause electro-static discharges which can destroy the device. Soldering information The CCD package temperature must not exceed C. Soldering iron temperature should be under C when mounting a CCD on a printed circuit board. Aim for a soldering time of seconds per pad. Use a soldering iron that has an adjustable temperature control function (that is grounded) that holds the soldering iron tip at a constant temperature. January

Frame Transfer CCD Image Sensor FXA Pin configuration Pin Number Symbol Pin Number Symbol 7 9 a a NC b b vps NC out sfd sfs rd rg 7 9 c c c c og NC vns b b NC a a 9 9 7 7 7 7 9 9 Figure - Pin configuration January

Frame Transfer CCD Image Sensor FXA Package information. +/ -.. +/ -.. 7 +/ -.. +/ -.. +/ -. R. a. +/ -... +/ -.. +/ -.. +/ -.. +/ -.. 9 +/ -. H (R.). Glass B. +/ -. Resin A Sensor. 7 +/ -. R. -R. Optical center - (.) c a'. +/ -.. +/ -.. +/ -.. +/ -. a-a'. The bottom of the package [A] is the height reference.. The height from the bottom [A] to the effective image area is. +/-.mm. The height from the top of the cover glass [B] to the effective image area is. +/-.mm.. The tilt of the effective image area relative to the height reference is less than.9mm.. The thickness of the Au plating is more than.um. The thickness of the Au plating is less than.um.. The point [C] is the origin of H& direction.. The center of effective image area relative to [C] is (,H)=(.,)+/-.mm. 7. The rotation angle of the effective image area relative to H and is less than +/-. degrees.. The rotation angle of the cover glass relative to H and is less than +/-degrees. 9. The thickness of the cover glass is. +/-.mm, and the refractive index... The refractive index of the resin is... The tolerances that are not shown are +/-.mm.. D=. +/-.mm D: Distance between left edge of imaging area and left edge of cover glass. +/-.mm means sgm =.mm.. No horizontal force is allowed to cover glass lid. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS Figure - Mechanical drawing of the FXA package January

R Philips Semiconductors Frame Transfer CCD Image Sensor FXA. 7. a Protection foil Glass Resin. Sensor a'. a-a' Figure - Protective foil on top of cover glass January

Frame Transfer CCD Image Sensor FXA Order codes The sensor can be ordered using the following code: Description You can contact the Image Sensors division of Philips Semiconductors at the following address: Philips Semiconductors Image Sensors Internal Postbox WAG- Prof. Holstlaan AA Eindhoven The Netherlands phone + - - 7 fax + - - 7 9 FXA sensor www.semiconductors.philips.com/imagers/ Order Code FXA WC 9 7 7 Philips reserves the right to change any information contained herein without notice. All information furnished by Philips is believed to be accurate. Philips Electronics N.. 9 7 7 Philips Semiconductors