TN004 Technical note Power supply HOLD-UP time Introuction A warning signal at a time perio is often requeste from a power supply for the loa to complete housekeeping chores before the output voltage rops out of regulation A circuit to monitor AC input voltage an a bulk capacitor of sufficient size are often use to meet these requirements The HOLD-UP time of an off line, high frequency power supply can be efine as the time require for the output voltage to remain within regulation after the AC input voltage is remove It is commonly expresse in ms from a specific input voltage, which is usually less than the nominal AC input voltage, an at a specific output power The power supply is esigne to regulate output voltage at the DC bulk voltage which is reache after the HOLD- UP time If a HOLD-UP time is require, there are traeoffs with respect to the power supply esign input voltage an regaring the size of bulk capacitors Often the major part of the power supply esign, on the primary sie, epens on the lowest DC bulk voltage after the HOLD- UP time in which the power supply can operate This ocument presents a comparison between lab ata, P-Spice simulation an MathCAD analysis of the same high frequency off line power supply The power supply is a VIPer5DIP-E emo boar with a universal 85 to 64 VAC input voltage an a V output voltage with a A loa The inrush resistor,, is Ω an the common moe inuctor, L, is about 5 Ω The bulk capacitor, C, is 68 µf an measures about 60 µf The requirement is for a 0ms HOLD-UP time, an AC voltage at turn off of 0 V AC an the power supply is esigne to operate at an input voltage of 80 V DC February 007 ev / wwwstcom
Equation erivation TN004 Equation erivation The equation erivation approach is to etermine the minimum bulk voltage with energy equations an then use the energy at this voltage to etermine the minimum operating voltage The symbol for overall efficiency is cc µ an the efficiency use when the AC line is remove is represente by N o MathCAD MathCAD is use to etermine the minimum operating voltage an also to etermine the bulk capacitor value for a HOLD-UP time, T up, of 0 ms Figure shows the AC input voltage as a blue ashe line an the equivalent DC input voltage in re Note that for a bulk capacitor of 60 µf (x-axis), the DC voltage is about 80 V (y-axis) A proceure to calculate the bulk DC voltage or the bulk capacitance is given in Section 6, Equation 7 an Equation 8 P-SPICE A P-Spice simulation of a bulk capacitor ischarge can be approximate using a voltage controlle current source G (see Figure ) Using an effective voltage range from the peak bulk voltage to a minimum operating voltage, a loa current can be simulate which is inversely proportional to the bulk DC voltage For an example, bulk voltages of 80 to 50 V DC can be monitore from a 0 V AC input voltage turn off with a 0ms HOLD - UP time requirement an a power supply output power of 4 W The following equations calculate the bulk capacitor current supplie to the power supply at 50 V an 80V for an output power of 4 W an an efficiency of 87%: Equation 4W N 087 Equation P in P ------ o N 4 ---------- 76W 087 Equation at Vc 76 50V I C ---------- 084A 50 Equation 4 at 76 Vc 80V I C ---------- 045A 80 A voltage controlle current source with a 0 V reference can be use with a gain of 000 to simulate the above currents /
TN004 Lab ata A voltage source of 0 V DC when subtracte from the initial bulk voltage gives 0-50 80 an when subtracte from the final bulk voltage gives 0-80 50 A gain of 084 / 80 000 an 045/50 000 satisfies the require currents: Table Current simulation V bulk V bulk (0 V) V bulk (0 V) x 000 50 80 084 80 50 045 The simulation in Figure is similar to the lab ata in Figure 5 with the DC bulk voltage (green) ropping to about 80 V DC (y-axis) after 0 ms (x-axis 40 to 50 ms) from the low point of the ripple voltage Figure also shows the bulk loa current (blue) from G, which is 084 A when the bulk voltage is 50 V an 045 A when the bulk voltage is 80 V 4 Lab ata Figure 5, shows the AC input voltage (green) an DC bulk voltage (yellow) The HOLD-UP time begins the measurement at the low level (min Bulk Voltage) of the ripple voltage (re ashe horizontal line) an after 0 ms the bulk voltage rops to about 80 VDC (re vertical ash-ot line) The measurement begins at that point because the AC input line coul be remove when the bulk voltage is at its minimum Note how the DC bulk voltage ecreases more quickly as the DC bulk voltage rops because the power supply current rain increases from the bulk 5 Equation erivation Energy equation for a capacitor (C): Equation 5 E --CV Equation 6 E --C( V bpk V bmin ) How to calculate the energy in C for each half line cycle: Equation 7 E in CV ( bpk V bmin ) Equation 8 E V bmin V in bpk ------- C /
Equation erivation TN004 How to calculate the power supply input energy: Equation 9 E in P ------- in f Equation 0 P in P ------ o N Equation E in How to calculate the peak bulk voltage: P ------ o fn Equation V bpk V coff V in P o --------------------- NVc off Equation V bmin V coff V in --------------------- P ---------- o NVc off CfN How to calculate the bulk energy at low bulk voltage minus the loa energy for HOLD- UP time T up : Equation 4 Equation 5 E bulkoff E bulkon E loa C V bmin E bulkon ------------------------- Equation 6 E loa T --------------- up N o Equation 7 How to calculate minimum DC bulk voltage: Equation 8 C V bmin P E bulkoff ------------------------- o T --------------- up N o E bulkoff --------------------- C 4/
TN004 Equation erivation Equation 9 P V o T up bmin ------------------- CN o Equation 0 How to factor out /C: V coff V in P ----------------- o P ---------- o T ------------------- up NV coff CfN CN o Equation V coff V in ----------------- ------ T C ----- + ------------ up fn NV coff N o Equation V coff Equation V in ------------------------------- ------ T ----- + ------------ up N C fn N o Solving for C in Equation : Equation 4 T up P o ----- + ------------ fn N C --------------------------------------------------------------------------------------------------------------- o V in ------------------------------- N 5/
HOLD-UP graph: Tup 0 ms TN004 6 HOLD-UP graph: T up 0 ms Equation 5 c V ( ) acoff V in ------------------------------------- P ------ o T ----------- + ------------------ up N c f N N o Equation 6 ------------------- V ( c) acmin( c) Figure Minimum operating voltage vs bulk capacitance Vcmin () c Vacmin () c 00 95 90 85 80 75 70 65 60 55 50 45 40 50 5 54 56 58 60 6 64 66 68 70 7 74 76 c0 6 Capacitance (µf) e soli trace: Minimum DC voltage Blue ash trace: Minimum AC voltage 6 HOLD-UP example 0 AC voltage at turn-off 4 Output power η 084 Efficiency running N o 087 Efficiency at turn-off C 60 0 6 Bulk capacitor f 60 Line frequency T up 0 0 Desire HOLD-UP time V Voltage rop of the input ioes in 55 Inrush resistor an EMI filter resistance in the AC line 6/
TN004 HOLD-UP graph: Tup 0 ms Equation 7 V in ------------------------------------- ------ T ----------- + ------------------ up V N C f N cmin 799 799 The minimum DC input voltage that the power supply will run: Equation 8 C P T o ----------- + ------------------ up f N N C ------------------------------------------------------------------------------------------------------------------------ o V in C 60 0 6 ------------------------------------- N N o Figure P-Spice schematic DN4004 DN4004 7mS VAMPL 55V FEQ 60 VOFF V U V 55 D D V D D4 C 60uF 50k V 0V V 4 5 k G + - G00 I DN4004 DN4004 0 Figure P-Spice simulation - voltage, current vs time Time (ms) Green: Bulk capacitor voltage Blue: Loa current 7/
HOLD-UP graph: Tup 0 ms TN004 Figure 4 VIPer5 power supply schematic Line J CON 85 to 64Vac ohms 50V X 5mH L C 68uF 400V C4 47uF 5V C 4700pF kv k W 0 C D4 470pF Kv BYW98-00 C8 000uF 5V % % V @ A 4 4 AC in W FUSE A 5X0mm F B KBP0GDI 4 U4 Comp TOVL Osc V Source nc Source Drain VIPer5DIP 50V 0 0 8 7 6 5 5 TX 0 9 8 7 6 U LTV87 7 k L uh C9 0uF 5V gn 4 - + C 0047uF C8 0uF 50V k C5 47nF 5 K C7 470nF 4 47 D N448 0 C6 47uF W U TL4 ST C 00uF 6 48k 9 k k J CON C7 0uF 50V D5 5KE0A D STTA06 W K D STTA06 C nf C4 0pF C5 nf C0 W 47nF Y cap 8 68 C6 000uF 5V 8/
TN004 VIPer5DIP-E (see Figure 4) Figure 5 Measure voltage vs time Time (5 ms/iv) Orange: Bulk capacitor voltage (0 V/iv) 7 VIPer5DIP-E (see Figure 4) The VIPer5DIP-E has a state-of-the-art, enhance current moe PWM circuit combine with an optimize avalanche rugge high voltage MDMesh Power MOSFET in the same package The VIPer5DIP-E use for this application has an s(on) of 0 Ω, a peak current of 7 A, a rain to source voltage rating of 60 V an is capable of 0 W for a wie voltage range input voltage in the iscontinuous flyback moe It also has an overloa elay at TOVL controlle by an external capacitor The TOVL function is well suite for various length power line rop conitions which coul cause amage or overheating to the power supply An external capacitor, C6, is use to elay the overloa protection to meet the esigne HOLD-UP time specification an then protect the power supply while entering an enless restart sequence The VIPer5DIP-E resumes normal switching immeiately after the line voltage returns to the power supply esigne input voltage 9/
evision history TN004 8 evision history Table evision history Date evision Changes 08-Feb-007 First issue 0/
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