FEATURES n.mhz Switching Frequency n Low V CESAT Switches: 33mV at.3a n High Output Voltage: Up to V n Wide Input Range:.V to 6V n Inverting Capability n V at 63mA from 3.3V Input n V at 3mA from V Input n V at ma from V Input n Uses Tiny Surface Mount Components n Low Shutdown Current: <μa n Low Profi le (.7mm) -Lead 3mm 3mm DFN Package APPLICATIONS n Organic LED Power Supply n Digital Cameras n White LED Power Supply n Cellular Phones n Medical Diagnostic Equipment n Local ±V or ±V Supply n TFT-LCD Bias Supply n xdsl Power Supply LT37 Dual.3A,.MHz Boost/Inverter in 3mm 3mm DFN DESCRIPTION The LT 37 dual switching regulator combines two V,.3A switches with error amplifi ers that can sense to ground providing boost and inverting capability. The low V CESAT bipolar switches enable the device to deliver high current outputs in a small footprint. The LT37 switches at.mhz, allowing the use of tiny, low cost and low profi le inductors and capacitors. High inrush current at start-up is eliminated using the programmable soft-start function, where an external RC sets the current ramp rate. A constant frequency current mode PWM architecture results in low, predictable output noise that is easy to filter. The LT37 switches are rated at V, making the device ideal for boost converters up to ±V as well as SEPIC and fl yback designs. Each channel can generate V at up to 63mA from a 3.3V supply, or V at ma from four alkaline cells in a SEPIC design. The device can be confi gured as two boosts, a boost and inverter or two inverters. The LT37 is available in a low profi le (.7mm) -lead 3mm 3mm DFN package. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION CONTROL CONTROL μf 3.3V SHDN/SS.μH SHDN/SS OLED Driver SW LT37 μh FBN FBP FBN FBP SW μf 37 TA 9.9k k.μf k k 7pF μh μf V OUT 7V 3mA V OUT 7V ma EFFICIENCY (%) OLED Driver Effi ciency 9 9 V OUT = 7V 8 8 V OUT = 7V 7 7 6 6 3 I OUT (ma) 37 TAb
LT37 ABSOLUTE MAXIMUM RATINGS (Note ) Voltage...6V SW, SW Voltage....V to V FBN, FBP, FBN, FBP Voltage... V or.v SHDN/SS, SHDN/SS Voltage... 6V Voltage...V Maximum Junction Temperature... C Operating Temperature Range (Note )... C to 8 C Storage Temperature Range... 6 C to C PIN CONFIGURATION FBN FBP FBP FBN TOP VIEW SW 9 SHDN/SS 3 8 7 SHDN/SS 6 SW DD PACKAGE -LEAD (3mm 3mm) PLASTIC DFN T JMAX = C, θ JA = 3 C/ W, θ JC = 3 C/W EXPOSED PAD (PIN ) IS MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT37EDD#PBF LT37EDD#TRPBF LBHM -Lead (3mm 3mm) Plastic DFN C to 8 C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT37EDD LT37EDD#TR LBHM -Lead (3mm 3mm) Plastic DFN C to 8 C Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ ELECTRICAL CHARACTERISTICS The denotes specifi cations which apply over the full operating temperature range, otherwise specifi cations are T A = C. = V SHDN = 3V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Operating Voltage.. V Reference Voltage.99..9 V l.987.3 V Reference Voltage Current Limit (Note 3). ma Reference Voltage Load Regulation ma I REF μa (Note 3).. %/μa Reference Voltage Line Regulation.6V 6V.3.8 %/V Error Amplifi er Offset Transition from Not Switching to Switching, V FBP = V FBN = V ± ±3 mv FB Pin Bias Current V FB = V (Note 3) l 6 na Quiescent Current V SHDN =.8V, Not Switching. ma Quiescent Current in Shutdown V SHDN =.3V, = 3V. μa Switching Frequency.. MHz Maximum Duty Cycle 9 9 % l 86 % Minimum Duty Cycle % Switch Current Limit At Minimum Duty Cycle At Maximum Duty Cycle (Note )..9...6. A A Switch V CESAT I SW =.A (Note ) mv Switch Leakage Current V SW = V. μa SHDN/SS Input Voltage High.8 V
ELECTRICAL CHARACTERISTICS The denotes specifi cations which apply over the full operating temperature range, otherwise specifi cations are T A = C. = V SHDN = 3V unless otherwise noted. LT37 PARAMETER CONDITIONS MIN TYP MAX UNITS SHDN Input Voltage Low Quiescent Current μa.3 V SHDN Pin Bias Current V SHDN = 3V, = V V SHDN = V 36. μa μa Note : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : The LT37E is guaranteed to meet performance specifi cations from C to 7 C. Specifi cations over the C to 8 C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Current fl ows out of the pin. Note : See Typical Performance Characteristics for guaranteed current limit vs duty cycle. Note : V CESAT is % tested at wafer level only. TYPICAL PERFORMANCE CHARACTERISTICS.6 Quiescent Current vs Temperature Voltage vs Temperature Voltage vs Current. QUIESCENT CURRENT (ma)....8 (V)...99 VOLTAGE mv/div CURRENT μa/div 37 G3.6 7 TEMPERATURE ( C).99 7 TEMPERATURE ( C) 37 G 37 G SHDN/SS CURRENT μv/div SHDN/SS Current vs SHDN/SS Voltage = 3.3V SHDN/SS VOLTAGE V/DIV > V SHDN/SS 37 G CURRENT LIMIT (A) Current Limit vs Duty Cycle. T A = C. TYPICAL.8.6. GUARANTEED...8.6.. 6 8 DUTY CYCLE (%) V CESAT (mv) 8 7 6 3 Switch Saturation Voltage vs Switch Current...6.8....6.8. SW CURRENT (A) 9 C C 37 G 37 G6 3
LT37 TYPICAL PERFORMANCE CHARACTERISTICS FREQUENCY (MHz)....3.3.... Oscillator Frequency vs Temperature SWITCH CURRENT (A)..8.6....8.6. Peak Switch Current vs SHDN/SS Voltage T A = C I SUPPLY A/DIV V OUT V/DIV V OUT V/DIV CONTROL AND V/DIV Start-Up Waveform (Figure Circuit).ms/DIV 37 G9... 7 TEMPERATURE ( C)...6.8...6.8. V SHDN/SS (V) 37 G7 37 G8 PIN FUNCTIONS FBN (Pin ): Negative Feedback Pin for Switcher. Connect resistive divider tap here. Minimize trace area at FBN. Set V OUT = V FBP ( + R/R), or connect to ground for inverting topologies. FBP (Pin ): Positive Feedback Pin for Switcher. Connect either to or a divided down version of, or connect to a resistive divider tap for inverting topologies. (Pin 3):.V Reference Pin. Can supply up to ma of current. Do not pull this pin high. Must be locally bypassed with no less than.μf and no more than μf. A.μF ceramic capacitor is recommended. Use this pin as the positive feedback reference or connect a resistor divider here for a smaller reference voltage. FBP (Pin ): Same as FBP but for Switcher. FBN (Pin ): Same as FBN but for Switcher. SW (Pin 6): Switch Pin for Switcher (Collector of internal NPN power switch). Connect inductor/diode here and minimize the metal trace area connected to this pin to minimize EMI. SHDN/SS (Pin 7): Shutdown and Soft-Start Pin. Tie to.8v or more to enable device. Ground to shut down. Softstart function is provided when the voltage at this pin is ramped slowly to.8v with an external RC circuit. (Pin 8): Input Supply. Must be locally bypassed. SHDN/SS (Pin 9): Same as SHDN/SS but for Switcher. Note: taking either SHDN/SS pin high will enable the part. Each switcher is individually enabled with its respective SHDN/SS pin. SW (Pin ): Same as SW but for Switcher. Exposed Pad (Pin ): Ground. Connect directly to local ground plane. This ground plane also serves as a heat sink for optimal thermal performance.
+ + BLOCK DIAGRAM LT37 FBP FBN + A R C CC + A R S Q DRIVER Q SW.V 8 3 REFERENCE.Ω 9 SHDN/SS LEVEL SHIFTER RAMP GENERATOR FBP FBN + A3 R C CC + A R S Q DRIVER 6 Q SW 7 SHDN/SS LEVEL SHIFTER.Ω RAMP GENERATOR.MHz OSCILLATOR 37 F Figure. Block Diagram OPERATION The LT37 uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Refer to the Block Diagram. At the start of each oscillator cycle, the SR latch is set, which turns on the power switch, Q (Q). A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A (A). When this voltage exceeds the level at the negative input of A (A), the SR latch is reset, turning off the power switch Q (Q). The level at the negative input of A (A) is set by the error amplifi er A (A3) and is simply an amplifi ed version of the difference between the negative feedback voltage and the positive feedback voltage, usually tied to the reference voltage V REG. In this manner, the error amplifi er sets the correct peak current level to keep the output in regulation. If the error amplifi er s output increases, more current is delivered to the output. Similarly, if the error decreases, less current is delivered. Each switcher functions independently but they share the same oscillator and thus the switchers are always in phase. Enabling the part is done by taking either SHDN/SS pin above.8v. Disabling the part is done by grounding both SHDN/SS pins. The soft-start feature of the LT37 allows for clean start-up conditions by limiting the amount of voltage rise at the output of comparator A and A, which in turn limits the peak switching current. The soft-start feature for each switcher is enabled by slowly ramping that switcher s SHDN/SS pin, using an RC network, for example. Typical resistor and capacitor values are and, allowing for a start-up time on the order of milliseconds. The LT37 has a current limit circuit not shown in the Block Diagram. The switch current is constantly monitored and not allowed to exceed the maximum switch current (typically.6a). If the switch
LT37 OPERATION current reaches this value, the SR latch is reset regardless of the state of the comparator A (A). Also not shown in the Block Diagram is the thermal shutdown circuit. If the temperature of the part exceeds approximately 6 C, both latches are reset regardless of the state of comparators A and A. The current limit and thermal shutdown circuits protect the power switch as well as the external components connected to the LT37. APPLICATIONS INFORMATION Duty Cycle The typical maximum duty cycle of the LT37 is 9%. The duty cycle for a given application is given by: 6 DC= V OUT + V D V OUT + V D V CESAT Where V D is the diode forward voltage drop and V CESAT is in the worst case 33mV (at.3a) The LT37 can be used at higher duty cycles, but it must be operated in the discontinuous conduction mode so that the actual duty cycle is reduced. Setting Output Voltage Setting the output voltage depends on the topology used. For normal noninverting boost regulator topologies: V OUT = V FBP + R R where V FBN is connected between R and R (see the Typical Applications section for examples). Select values of R and R according to the following equation: R= R V OUT A good value for R is k which sets the current in the resistor divider chain to.v/k = 67μA. V FBP is usually just tied to =.V, but V FBP can also be tied to a divided down version of or some other voltage as long as the absolute maximum ratings for the feedback pins are not exceeded (see Absolute Maximum Ratings). For inverting topologies, V FBN is tied to ground and V FBP is connected between R and R. R is between V FBP and and R is between V FBP and V OUT (see the Applications section for examples). In this case: R V OUT = R Select values of R and R according to the following equation: R=R V OUT A good value for R is k, which sets the current in the resistor divider chain to.v/k = 67μA. Switching Frequency and Inductor Selection The LT37 switches at. MHz, allowing for small valued inductors to be used..7μh or μh will usually suffi ce. Choose an inductor that can handle at least.a without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I R power losses. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology where each inductor only carries one half of the total switch current. For better effi ciency, use similar valued inductors with a larger volume. Many different sizes and shapes are available from various manufacturers. Choose a core material that has low losses at. MHz, such as ferrite core. Table. Inductor Manufacturers Sumida (87) 96-666 www.sumida.com TDK (87) 83-6 www.tdk.com Murata (7) 8- www.murata.com
APPLICATIONS INFORMATION Soft-Start and Shutdown Features To shut down the part, ground both SHDN/SS pins. To shut down one switcher but not the other one, ground that switcher s SHDN/SS pin. The soft-start feature provides a way to limit the inrush current drawn from the supply upon start-up. To use the soft-start feature for either switcher, slowly ramp up that switcher s SHDN/SS pin. The rate of voltage rise at the output of the switcher s comparator (A or A3 for switcher or switcher respectively) tracks the rate of voltage rise at the SHDN/SS pin once the SHDN/SS pin has reached about.v. The soft-start function will go away once the voltage at the SHDN/SS pin exceeds.8v. See the Peak Switch Current vs SHDN/SS Voltage graph in the Typical Performance Characteristics section. The rate of voltage rise at the SHDN/SS pin can easily be controlled with a simple RC network connected between the control signal and the SHDN/SS pin. Typical values for the RC network are Ω and, giving start-up times on the order of milliseconds. This RC time constant can be adjusted to give different start-up times. If different values of resistance are to be used, keep in mind the SHDN/SS Current vs SHDN/SS voltage graph along with the Peak Switch Current vs SHDN/SS Voltage graph, both found in the Typical Performance Characteristics section. The impedance looking into the SHDN/SS pin depends on whether the SHDN/SS is above or below. Normally SHDN/SS will not be driven above, and thus the impedance looks like kω in series with a diode. If the voltage of the SHDN/SS pin is above, the impedance looks more like kω in series with a diode. This kω or kω impedance can have a slight effect on the start-up time if you choose the R in the RC soft-start network too large. Another consideration is selecting the soft-start time so that the soft-start feature is dominated by the RC network and not the capacitor on. (See voltage reference section of the Applications Information for details.) The soft-start feature is of particular importance in applications where the switch will see voltage levels of 3V or higher. In these applications, the simultaneous presence of high current and voltage during startup may cause an overstress condition to the switch. Therefore, depending on input and output voltage conditions, higher RC time constant values may be necessary to improve the ruggedness of the design. LT37 CAPACITOR SELECTION Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multi-layer ceramic capacitors are an excellent choice, as they have extremely low ESR and are available in very small packages. XR dielectrics are preferred, followed by X7R, as these materials retain the capacitance over wide voltage and temperature ranges. A to μf output capacitor is suffi cient for most applications, but systems with very low output currents may need only a μf or.μf output capacitor. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a suffi cient voltage rating. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the LT37. A to μf input capacitor is suffi cient for most applications. Table shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. Table. Ceramic Capacitor Manufacturers Taiyo Yuden (8) 73- www.t-yuden.com AVX (83) 8-9 www.avxcorp.com Murata (7) 8- www.murata.com The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors can affect the stability of the overall system. The ESR of any capacitor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OS-CON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor (C PL ) in parallel with the resistor (R3) between V OUT and V FB as shown in Figure. The frequency of the zero is determined by the following equation. ƒ Z = π R3 C PL 7
LT37 APPLICATIONS INFORMATION CONTROL.8V V.6V TO.V Li-Ion CONTROL.8V V R SS C SS μf R SS C SS 9 8 7 SHDN/SS L.μH SHDN/SS SW LT37 6 L μh FBN FBP 37 F C μf 3 FBN FBP SW D L3 μh D C.μF R k C PL 33pF R k R3 9.9k R k C6 7pF C μf V OUT 7V C3 V OUT 7V C, C: XR OR X7R 6.3V C3, C: XR OR X7R V C: XR OR X7R 6V C PL : OPTIONAL D, D: ON SEMICONDUCTOR MBRM- L: SUMIDA CR3-R L: SUMIDA CDRHD8- L3: SUMIDA CDRHD8- Supply Current of Figure During Start-Up without Soft-Start RC Network Supply Current of Figure During Start-Up with Soft-Start RC Network I SUPPLY.A/DIV = 3.3V I SUPPLY.A/DIV = 3.3V V OUT V/DIV > V SHDN/SS V OUT V/DIV > V SHDN/SS.ms/DIV 37 Fb.ms/DIV 37 Fc Figure. Li-Ion OLED Driver 8
LT37 APPLICATIONS INFORMATION By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 3kHz to khz. Figure 3 shows the transient response of the step-up converter from Figure without the phase lead capacitor C PL. Although adequate for many applications, phase margin is not ideal as evidenced by -3 bumps in both the output voltage and inductor current. A 33pF capacitor for C PL results in ideal phase margin, which is revealed in Figure as a more damped response and less overshoot. V OUT mv/div AC COUPLED I L.A/DIV AC/COUPLED LOAD CURRENT ma/div AC/COUPLED Figure 3. Transient Response of Figure s Step-Up Converter without Phase Lead Capacitor V OUT mv/div AC COUPLED I L.A/DIV AC/COUPLED LOAD CURRENT ma/div AC/COUPLED = 3.3V μs/div > V SHDN/SS = 3.3V > V SHDN/SS V REG VOLTAGE REFERENCE Pin 3 of the LT37 is a bandgap voltage reference that has been divided down to.v and buffered for external use. This pin must be bypassed with at least.μf and no more than μf. This will ensure stability as well as reduce the noise on this pin. The buffer has a built-in current limit of at least ma (typically.ma). This not only means that you can use this pin as an external reference for supplemental circuitry, but it also means that it is possible to provide a soft-start feature if this pin is used as one of the feedback pins for the error amplifi er. Normally the soft-start time will be dominated by the RC time constant discussed in the soft-start and shutdown section. However, because of the finite current limit of the buffer for the V REG pin, it will take some time to charge up the bypass capacitor. During this time, the voltage at the V REG pin will ramp up, and this action provides an alternate means for soft-starting the circuit. If the largest recommended bypass capacitor is used, μf, the worst-case (longest) soft-start function that would be provided from the pin is: μf.v.ma =.ms Choose the RC network such that the soft-start time is longer than this time, or choose a smaller bypass capacitor for the pin (but always larger than.μf) so that the RC network dominates the soft-starting of the LT37. The voltage at the pin can also be divided down and used for one of the feedback pins for the error amplifi er. This is especially useful in LED driver applications, where the current through the LEDs is set using the voltage reference across a sense resistor in the LED chain. Using a smaller or divided down reference leads to less wasted power in the sense resistor. See the Typical Applications section for an example of LED driving applications. μs/div Figure. Transient Response of Figure s Step-Up Converter with 33pF Phase Lead Capacitor 9
LT37 APPLICATIONS INFORMATION DIODE SELECTION A Schottky diode is recommended for use with the LT37. For high effi ciency, a diode with good thermal characteristics at high currents should be used such as the On Semiconductor MBRM. This is a V diode. Where the switch voltage exceeds V, use the MBRM, a V diode. These diodes are rated to handle an average forward current of.a. In applications where the average forward current of the diode is less than.a, use the Philips PMEG, 3, or (a V, 3V or V diode, respectively). LAYOUT HINTS The high speed operation of the LT37 demands careful attention to board layout. You will not get advertised performance with careless layout. Figure shows the recommended component placement. Compensation Theory Like all other current mode switching regulators, the LT37 needs to be compensated for stable and effi cient operation. Two feedback loops are used in the LT37: a fast current loop which does not require compensation, and a slower voltage loop which does. Standard Bode plot analysis can be used to understand and adjust the voltage feedback loop. As with any feedback loop, identifying the gain and phase contribution of the various elements in the loop is critical. Figure 6 shows the key equivalent elements of a boost converter. Because of the fast current control loop, the power stage of the IC, inductor and diode have been replaced by the equivalent transconductance amplifi er g mp. g mp acts as a current source where the output current is proportional to the V C voltage. Note that the maximum output current of g mp is finite due to the current limit in the IC. CONTROL CONTROL C SS C SS R SS R SS g mp V OUT R C R O + g ma + C PL R ESR R L C V OUT D L V CC C L C V OUT L3 V C C C.V REFERENCE R R C OUT SW SW 37 F6 C3 9 8 7 SHDN/SS SHDN/SS LT37 PIN 6 D C C : COMPENSATION CAPACITOR C OUT : OUTPUT CAPACITOR C PL : PHASE LEAD CAPACITOR g ma : TRANSCONDUCTANCE AMPLIFIER INSIDE IC g mp : POWER STAGE TRANSCONDUCTANCE AMPLIFIER R C : COMPENSATION RESISTOR R L : OUTPUT RESISTANCE DEFINED AS V OUT DIVIDED BY I LOAD(MAX) R O : OUTPUT RESISTANCE OF g ma R, R: FEEDBACK RESISTOR DIVIDER NETWORK R ESR : OUTPUT CAPACITOR ESR FBN FBP FBP FBN 3 Figure 6. Boost Converter Equivalent Model R R3 R R V OUT V OUT C 37 F Figure. Suggested Layout Showing a Boost on SW and an Inverter on SW. Note the Separate Ground Returns for All High Current Paths (Using a Multilayer Board)
APPLICATIONS INFORMATION From Figure 6, the DC gain, poles and zeroes can be calculated as follows: Output Pole: P= π R L C OUT Error Amp Pole: P= π R O C C Error Amp Zero: Z= π R C C C DC GAIN: A= g ma R O g mp R L V OUT ESR Zero: Z = π R ESR C OUT V RHP Zero: Z3= IN R L π V OUT L High Frequency Pole: P3> f S 3 Phase Lead Zero: Z= π R C PL Phase Lead Pole: P= π C PL R R R+R The Current Mode zero is a right half plane zero which can be an issue in feedback control design, but is manageable with proper external component selection. LT37 Using the circuit of Figure as an example, Table 3 shows the parameters used to generate the Bode plot shown in Figure 7. Table 3. Bode Plot Parameters Parameter Value Units Comment R L Ω Application Specifi c C OUT.7 μf Application Specifi c R ESR mω Application Specifi c R O.9 MΩ Not Adjustable C C 9 pf Not Adjustable C PL 33 pf Adjustable R C kω Not Adjustable R 9.9 kω Adjustable R kω Adjustable V OUT 7 V Application Specifi c 3.3 V Application Specifi c g ma μmho Not Adjustable g mp 9.3 mho Not Adjustable L. μh Application Specifi c f S. MHz Not Adjustable From Figure 7, the phase is when the gain reaches db giving a phase margin of 6. This is more than adequate. The crossover frequency is khz. GAIN (db) 7 6 3 3 GAIN 3 PHASE 3 k k k M FREQUENCY (Hz) PHASE (DEG) 37 F7 Figure 7. Bode Plot of 3.3V to 7V Application
LT37 TYPICAL APPLICATIONS Li-Ion OLED Driver CONTROL.8V V.6V TO.V Li-Ion CONTROL.8V V R SS C SS C μf R SS C SS 9 8 7 SHDN/SS L.μH SHDN/SS SW LT37 SW 6 FBN FBP 3 FBN FBP 37 TA D C.μF C6 33pF V CONTROL V TO V R k R6 k R3 9.9k R k R k C3 V OUT 7V ma WHEN =.V 3mA WHEN = 3.3V ma WHEN =.6V L μh C μf C, C: XR OR X7R 6.3V C3, C: XR OR X7R V C: XR OR X7R 6V C6: OPTIONAL L3 μh D R k C6 7pF C μf D, D: ON SEMICONDUCTOR MBRM- L: SUMIDA CR3-R L: SUMIDA CDRHD8- L3: SUMIDA CDRHD8- V OUT 7V TO V 7V WHEN V CONTROL = V V WHEN V CONTROL = 7V, 3mA WHEN =.V 7V, ma WHEN = 3.3V 7V, ma WHEN =.6V Li-Ion OLED Driver Effi ciency 9 9 V OUT = 7V =.V EFFICIENCY (%) 8 8 7 7 6 = 3.3V =.6V =.V = 3.3V =.6V 6 V OUT = 7V 3 I OUT (ma) 37 TAb
TYPICAL APPLICATIONS Single Li-Ion Cell to V, V Boost Converter LT37 CONTROL.8V OV.6V TO.V CONTROL.8V V R SS R SS C SS C C SS 9 8 7 SHDN/SS L 3.3μH SHDN/SS SW LT37 SW 6 L 6.8μH FBN FBP 3 FBP FBN 37 TA3 D D C.μF C pf C6 pf R k R.99k R3.9k C3 μf C μf V OUT V 9mA IF =.V 63mA IF = 3.3V ma IF =.6V V OUT V 3mA IF =.V ma IF = 3.3V ma IF =.6V R.99k C-C3: XR OR X7R 6.3V C: XR OR X7R 6V D, D: ON SEMICONDUCTOR MBRM- L: SUMIDA CR3-3R3 L: SUMIDA CR3-6R8 3
LT37 TYPICAL APPLICATIONS Li-Ion White LED Driver L.μH D CONTROL.8V OV.6V TO.V CONTROL.8V OV R SS R SS C SS C C SS 9 8 7 SHDN/SS SHDN/SS SW LT37 SW 6 FBN FBP 3 FBP FBN 37 TA C.μF C3.μF R 9.9k R k I OUT ma WHITE LEDs L.μH D.99Ω C, C: XR OR X7R 6.3V C3, C: XR OR X7R V D, D: ON SEMICONDUCTOR MBRM- L, L: SUMIDA CDRHD-R C.μF I OUT ma WHITE LEDs.99Ω
TYPICAL APPLICATIONS Li-Ion or -Cell Alkaline to 3.3V and V SEPIC LT37 CONTROL.8V OV.6V TO 6.V CONTROL.8V OV R SS R SS C SS C C SS 9 8 7 SHDN/SS L μh SHDN/SS SW LT37 SW 6 L3 μh FBN FBP FBP FBN C, C3, C: XR OR X7R V C, C6: XR OR X7R 6.3V D, D: ON SEMICONDUCTOR MBRM- L-L: MURATA LQH3CNK3 37 TA C3 L μh 3 C μf L μh D C.μF D C7 6pF R 3.8k R k C8 R3 6pF 6.k R k C μf C6 μf V OUT 3.3V 6mA AT = 6.V ma AT = V 7mA AT = V ma AT = 3.3V 3mA AT =.6V V OUT V ma AT = 6.V ma AT = V 36mA AT = V 3mA AT = 3.3V ma AT =.6V PACKAGE DESCRIPTION.67 ±. DD Package -Lead Plastic DFN (3mm 3mm) (Reference LTC DWG # -8-698) R =. TYP 6.38 ±. 3. ±.. ±..6 ±. ( SIDES). ±.. BSC.38 ±. ( SIDES) PACKAGE OUTLINE RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN TOP MARK (SEE NOTE 6). REF NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M-9 VARIATION OF (WEED-). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3. ±. ( SIDES).7 ±... Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights..6 ±. ( SIDES).38 ±. ( SIDES). ±.. BSC BOTTOM VIEW EXPOSED PAD (DD) DFN 3
LT37 TYPICAL APPLICATIONS CONTROL.8V OV V CONTROL.8V OV C V to ±V Dual Supply Boost/Inverting Converter 9 8 7 SHDN/SS L μh SHDN/SS SW LT37 6 L μh FBN FBN SW FBP FBP 37 TA6 C μf 3 D C.μF D L3 μh C6 R 6pF.9k R.99k R3 k R 8k C7 6pF C C3 V OUT V 3mA V OUT V ma C, C: XR OR X7R 6.3V C3, C: XR OR X7R 6V C: XR OR X7R V D, D: ON SEMICONDUCTOR MBRM- L: SUMIDA CR3- L, L3: SUMIDA CLS63- RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT6 ma (I SW ),.MHz, High Effi ciency Micropower Inverting :.V to V, V OUT(MAX) = 3V, I Q = 3mA, I SD < μa, DC/DC Converter ThinSOT Package LT63 LT6 LT6/LT6- LT67/LT67- LT93/LT93A LT93/LT93A LT93 (Quad) LT9 (Dual) LT96/LT96A ma (I SW ),.MHz, High Effi ciency Step-Up DC/DC Converter 7mA (I SW ), 6kHz, High Effi ciency Micropower Inverting DC/DC Converter 3mA/8mA (I SW ), High Effi ciency Step-Up DC/DC Converters 3mA/mA (I SW ), High Effi ciency Micropower Inverting DC/DC Converters A (I SW ),.MHz/.MHz, High Effi ciency Step-Up DC/DC Converters A (I SW ),.MHz/.MHz High Effi ciency Micropower Inverting DC/DC Converters Quad Boost,.6A Buck,.6A Boost,.3A Boost,.A Inverter.MHz TFT DC/DC Converter Dual Output, Boost/Inverter, 3mA (I SW ), Constant Off-Time, High Effi ciency Step-Up DC/DC Converter.A (I SW ),.MHz/.7MHz, High Effi ciency Step-Up DC/DC Converters :.9V to V, V OUT(MAX) = 3V, I Q = 3mA, I SD < μa, ThinSOT Package : V to V, V OUT(MAX) = V, I Q = ma, I SD < μa, MS8, S8 Packages = V to V, V OUT(MAX) = 3V, I Q = μa, I SD < μa, ThinSOT Package =.V to V, V OUT(MAX) = 3V, I Q = μa, I SD < μa, ThinSOT Package :.6V to 6V, V OUT(MAX) = 3V, I Q =.ma/.ma, I SD < μa, ThinSOT Package =.6V to 6V, V OUT(MAX) = 3V, I Q =.8mA, I SD < μa, ThinSOT Package =.V to V, V OUT(MAX) = V, I Q = μa, I SD < 3μA, TSSOP8E Package =.V to V, V OUT(MAX) = ±3V, I Q = μa, I SD < μa, -Lead MS Package :.V to 6V, V OUT(MAX) = 3V, I Q = 3.mA, I SD < μa, MS8 Package LT336 3A (I SW ), MHz, 3V Step-Up DC/DC Converter : 3V to V, V OUT(MAX) = 3V, I Q =.9mA, I SD < 6μA, TSSOP6E Package LT36/LT36A LT363/LT363A LT36 3mA (I SW ),.MHz/.7MHz, High Effi ciency Inverting DC/DC Converters with Integrated Schottkys Dual Output, Boost/Inverter, ma (I SW ), Constant Off-Time, High Effi ciency Step-Up DC/DC Converters with Integrated Schottkys 8mA (I SW ), High Effi ciency Step-Up DC/DC Converter with Integrated Schottky and PNP Disconnect =.V to 6V, V OUT(MAX) = 38V, I Q =.9mA, I SD < μa, ThinSOT Package =.3V to V, V OUT(MAX) = ±V, I Q = μa, I SD < μa, DFN Package =.3V to V, V OUT(MAX) = 3V, I Q = μa, I SD < μa, ThinSOT Package 6 LT 8 REV B PRINTED IN USA Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA 93-77 (8) 3-9 FAX: (8) 3-7 www.linear.com LINEAR TECHNOLOGY CORPORATION