TDA7850. 4 x 50 W MOSFET quad bridge power amplifier. Features. Description. Protections:



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4 x 50 W MOSFET quad bridge power amplifier Features High output power capability: 4 x 50 W/4 max. 4 x 30 W/4 @ 14.4 V, 1 khz, % 4 x 80 W/2 max. 4 x 55 W/2 @ 14.4V, 1 khz, % MOSFET output power stage Excellent 2 driving capability Hi-Fi class distortion Low output noise ST-BY function Mute function Automute at min. supply voltage detection Low external component count: Internally fixed gain (26 db) No external compensation No bootstrap capacitors On board 0.35 A high side driver Protections: Output short circuit to gnd, to V s, across the load Very inductive loads Overrating chip temperature with soft thermal limiter Output DC offset detection Load dump voltage Fortuitous open gnd Reversed battery ESD Description Flexiwatt25 (Vertical) Flexiwatt25 (Horizontal) The TDA7850 is a breakthrough MOSFET technology class AB audio power amplifier in Flexiwatt 25 package designed for high power car radio. The fully complementary P-Channel/N- Channel output structure allows a rail to rail output voltage swing which, combined with high output current and minimized saturation losses sets new power references in the car-radio field, with unparalleled distortion performances. The TDA7850 integrates a DC offset detector. Table 1. Device summary Order code Package Packing TDA7850 Flexiwatt25 (Vertical) Tube TDA7850H Flexiwatt25 (Horizontal Tube September 2013 Rev 6 1/18 www.st.com 1

Contents TDA7850 Contents 1 Block diagram and application circuit........................... 5 1.1 Block diagram............................................... 5 1.2 Standard test and application circuit............................. 5 2 Pin description............................................. 6 3 Electrical specifications...................................... 7 3.1 Absolute maximum ratings..................................... 7 3.2 Thermal data............................................... 7 3.3 Electrical characteristics....................................... 8 3.4 Electrical characteristic curves................................. 11 4 Application hints........................................... 14 4.1 SVR..................................................... 14 4.2 Input stage................................................ 14 4.3 Standby and muting......................................... 14 4.4 DC offset detector.......................................... 14 4.5 Heatsink definition.......................................... 14 5 Package information........................................ 15 6 Revision history........................................... 17 2/18

List of tables List of tables Table 1. Device summary.......................................................... 1 Table 2. Absolute maximum ratings.................................................. 7 Table 3. Thermal data............................................................. 7 Table 4. Electrical characteristics.................................................... 8 Table 5. Document revision history................................................. 17 3/18

List of figures TDA7850 List of figures Figure 1. Block diagram............................................................ 5 Figure 2. Standard test and application circuit........................................... 5 Figure 3. Pin connection (top view)................................................... 6 Figure 4. Components and top copper layer of the Figure 2............................... Figure 5. Bottom copper layer Figure 2............................................... Figure 6. Quiescent current vs. supply voltage......................................... 11 Figure 7. Output power vs. supply voltage (R L = 4 ).................................... 11 Figure 8. Output power vs. supply voltage (R L = 2 ).................................... 11 Figure 9. Distortion vs. output power (R L = 4 )......................................... 11 Figure. Distortion vs. output power (R L = 2 )......................................... 11 Figure 11. Distortion vs. frequency (R L = 4 )........................................... 11 Figure 12. Distortion vs. frequency (R L = 2 )........................................... 12 Figure 13. Crosstalk vs. frequency................................................... 12 Figure 14. Supply voltage rejection vs. frequency........................................ 12 Figure 15. Output attenuation vs. supply voltage......................................... 12 Figure 16. Power dissipation and efficiency vs. output power (R L = 4, SINE)................. 12 Figure 17. Power dissipation and efficiency vs. output power (R L = 2, SINE)................. 12 Figure 18. Power dissipation vs. output power (R L = 4, audio program simulation)............. 13 Figure 19. Power dissipation vs. output power (R L = 2, audio program simulation)............. 13 Figure 20. ITU R-ARM frequency response, weighting filter for transient pop................... 13 Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions.................... 15 Figure 22. Flexiwatt25 (horizontal) mechanical data and package dimensions.................. 16 4/18

Block diagram and application circuit 1 Block diagram and application circuit 1.1 Block diagram Figure 1. Block diagram Vcc1 Vcc2 470μF 0nF ST-BY MUTE HSD HSD/V OFF_DET OUT1+ IN1 OUT1-0.1μF PW-GND OUT2+ IN2 OUT2-0.1μF PW-GND OUT3+ IN3 OUT3-0.1μF PW-GND OUT4+ IN4 OUT4-0.1μF PW-GND AC-GND SVR TAB S-GND 0.47μF 47μF D94AU158D 1.2 Standard test and application circuit Figure 2. Standard test and application circuit C8 0.1μF C7 2200μF Vcc1-2 Vcc3-4 ST-BY MUTE IN1 R1 K R2 47K C1 0.1μF C9 1μF C 1μF 4 22 11 6 20 9 8 7 5 2 3 OUT1 OUT2 IN2 12 17 C2 0.1μF 18 OUT3 IN3 15 19 C3 0.1μF 21 IN4 14 24 OUT4 C4 0.1μF S-GND 13 16 25 1 23 C5 0.47μF SVR C6 47μF HSD/OD R3 *) TAB *) R3 = kω to be placed when pin 25 is used as offset detector. D95AU335C 5/18

Pin description TDA7850 2 Pin description Figure 3. Pin connection (top view) 1 Vertical 25 D94AU159A 1 Horizontal TAB P-GND2 OUT2- ST-BY OUT2+ V CC OUT1- P-GND1 OUT1+ SVR IN1 IN2 S-GND IN4 IN3 AC-GND OUT3+ P-GND3 OUT3- V CC OUT4+ MUTE OUT4- P-GND4 HSD TAB P-GND2 OUT2- ST-BY OUT2+ V CC OUT1- P-GND1 OUT1+ SVR IN1 IN2 S-GND IN4 IN3 AC-GND OUT3+ P-GND3 OUT3- V CC OUT4+ MUTE OUT4- P-GND4 HSD 25 D06AU1655 6/18

Electrical specifications 3 Electrical specifications 3.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V S Operating supply voltage 18 V V S (DC) DC supply voltage 28 V V S (pk) Peak supply voltage (for t = 50 ms) 50 V I O Output peak current repetitive (duty cycle % at f = Hz) non repetitive (t = 0 s) P tot Power dissipation T case = 70 C 80 W T j Junction temperature 150 C T stg Storage temperature -55 to 150 C 9 A A 3.2 Thermal data Table 3. Thermal data Symbol Parameter Value Unit R th j-case Thermal resistance junction to case Max. 1 C/W 7/18

Electrical specifications TDA7850 3.3 Electrical characteristics Table 4. Electrical characteristics (Refer to the test and application diagram, V S = 14.4 V; R L = 4 ; R g = 600 ; f = 1 khz; T amb = 25 C; unless otherwise specified). Symbol Parameter Test condition Min. Typ. Max. Unit I q1 Quiescent current R L = 0 180 280 ma V OS Output offset voltage Play mode / Mute mode ±50 mv dv OS During mute ON/OFF output offset voltage During Standby ON/OFF output offset voltage ITU R-ARM weighted see Figure 20 - + mv - + mv G v Voltage gain 25 26 27 db dg v Channel gain unbalance ±1 db P o Output power V S = 13.2 V; THD = % V S = 13.2 V; THD = 1 % V S = 14.4 V; THD = % V S = 14.4 V; THD = 1 % P o max. Max. output power (1) V S = 14.4 V; R L = 4 V S = 14.4 V; R L = 2 THD e No Distortion Output noise 23 16 28 20 25 19 30 23 V S = 14.4 V; THD = %, 2 50 55 W P o = 4W P o = 15W; R L = 2 "A" Weighted Bw = 20 Hz to 20 khz 50 85 0.006 0.015 SVR Supply voltage rejection f = 0 Hz; V r = 1Vrms 50 75 db f ch High cut-off frequency P O = 0.5 W 0 300 KHz R i Input impedance 80 0 120 K C T I SB Cross talk Standby current consumption f = 1 khz P O = 4 W f = khz P O = 4 W 35 50 60 70 60 0.02 0.03 50 70 V ST-BY = 1.5 V 20 V ST-BY = 0 V I pin5 ST-BY pin current V ST-BY = 1.5 V to 3.5 V ±1 A V SB out Standby out threshold voltage (Amp: ON) 2.75 V V SB in Standby in threshold voltage (Amp: OFF) 1.5 V A M Mute attenuation P Oref = 4 W 80 90 db V M out Mute out threshold voltage (Amp: Play) 3.5 V V M in Mute in threshold voltage (Amp: Mute) 1.5 V - - W W % V db A 8/18

Electrical specifications Table 4. Electrical characteristics (continued) (Refer to the test and application diagram, V S = 14.4 V; R L = 4 ; R g = 600 ; f = 1 khz; T amb = 25 C; unless otherwise specified). Symbol Parameter Test condition Min. Typ. Max. Unit V AM in I pin23 V S automute threshold Muting pin current (Amp: Mute) Att 80 db; P Oref = 4 W (Amp: Play) Att < 0.1 db; P O = 0. 5W 6.5 7 7.5 8 V MUTE = 1.5 V (Sourced Current) 7 12 18 A V MUTE = 3.5 V -5 18 A V HSD section V dropout Dropout voltage I O = 0.35 A; V S = 9 to 16 V 0.25 0.6 V I prot Current limits 400 800 ma Offset detector (Pin 25) V M_ON Mute voltage for DC offset 8 V V detection enabled ST-BY = 5 V V M_OFF 6 V V OFF Detected differential output offset V ST-BY = 5 V; V mute = 8 V ±2 ±3 ±4 V V 25_T Pin 25 voltage for detection = TRUE V 25_F Pin 25 Voltage for detection = FALSE 1. Saturated square wave output. V ST-BY = 5 V; V mute = 8 V V OFF > ±4 V V ST-BY = 5 V; V mute = 8 V V OFF > ±2 V 0 1.5 V 12 V 9/18

Electrical specifications TDA7850 Figure 4. Components and top copper layer of the Figure 2. Figure 5. Bottom copper layer Figure 2. /18

Electrical specifications 3.4 Electrical characteristic curves Figure 6. Quiescent current vs. supply voltage Figure 7. Output power vs. supply voltage (R L = 4 ) I d (ma) 200 190 180 170 160 150 140 130 120 1 Vi = 0 RL = 0 8 12 14 16 18 Vs (V) AC00064 80 75 70 65 60 55 50 45 40 35 30 25 20 15 P o (W) R L = 4Ω f = 1 KHz 5 8 9 11 12 13 14 15 16 17 18 V s (V) Po-max THD= % THD= 1% AC00064 Figure 8. Output power vs. supply voltage (R L = 2 ) Figure 9. Distortion vs. output power (R L = 4 ) 130 P o (W) THD (%) 120 1 0 R L = 2Ω f = 1 KHz Po-max 1 V S = 14.4 V R L = 4Ω 90 80 THD=% f = KHz 70 60 0.1 50 40 30 THD=1% 0.01 f = 1 KHz 20 0 8 9 11 12 13 14 15 16 17 18 V s (V) AC00066 0.001 0.1 1 0 P o (W) AC00067 Figure. Distortion vs. output power (R L = 2 ) Figure 11. Distortion vs. frequency (R L = 4 ) THD (%) THD (%) 1 V S = 14.4 V R L = 2Ω 1 V S = 14.4 V R L = 4Ω P o = 4 W f = KHz 0.1 0.1 0.01 f = 1 KHz 0.01 0.001 0.1 1 0 P o (W) AC00068 0.001 0 00 000 0000 f (Hz) AC00069 11/18

Electrical specifications TDA7850 Figure 12. Distortion vs. frequency (R L = 2 ) Figure 13. Crosstalk vs. frequency THD (%) -20 CROSSTALK (db) 1 V S = 14.4 V R L = 2Ω P o = 8 W -30-40 R L = 4Ω P o = 4 W R g = 600Ω -50 0.1-60 -70 0.01-80 -90 0.001 0 00 000 0000 f (Hz) AC00070-0 0 00 000 0000 f (Hz) AC00071 Figure 14. Supply voltage rejection vs. frequency Figure 15. Output attenuation vs. supply voltage -20 SVR (db) OUTPUT ATTN (db) -30-40 Rg = 600Ω Vripple = 1 Vrms 0-20 R L = 4Ω P o = 4 W ref -50-60 -40-70 -60-80 -90-80 -0 0 00 000 0000 f (Hz) AC00072-0 5 6 7 8 9 Vs (V) AC00073 Figure 16. Power dissipation and efficiency vs. output power (R L = 4, SINE) Figure 17. Power dissipation and efficiency vs. output power (R L = 2, SINE) 90 80 70 P tot (W) η (%) V S = 14.4 V R L = 4 x 4Ω f = 1 KHz SINE η 90 80 70 180 160 140 Ptot (W) η (%) V S = 14.4 V R L = 4 x 2Ω f = 1 KHz SINE η 90 80 70 60 60 120 60 50 50 0 50 40 30 P tot 40 30 80 60 P tot 40 30 20 20 40 20 20 0 0 0 2 4 6 8 12 14 16 18 20 22 24 26 28 30 0 0 0 5 15 20 25 30 35 40 45 50 55 P o (W) AC00074 P o (W) AC00075 12/18

Electrical specifications Figure 18. Power dissipation vs. output power Figure 19. (R L = 4, audio program simulation) Power dissipation vs. output power (R L = 2, audio program simulation) 30 25 20 15 P tot (W) V S = 13.2 V R L = 4 x 4Ω GAUSSIAN NOISE CLIP START 5 0 1 2 3 4 5 6 P o (W) AC00076 60 55 50 45 40 35 30 25 20 15 P tot (W) V S = 13.2 V R L = 4 x 2Ω GAUSSIAN NOISE CLIP START 5 0 2 4 6 8 P o (W) AC00077 Figure 20. ITU R-ARM frequency response, weighting filter for transient pop Output attenuation (db) 0 - -20-30 -40-50 0 00 000 0000 Hz AC00343 13/18

Application hints TDA7850 4 Application hints 4.1 SVR Referred to the circuit of Figure 2. Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients. To conveniently serve both needs, Its minimum recommended value is µf. 4.2 Input stage The TDA7850's inputs are ground-compatible and can stand very high input signals (± 8Vpk) without any performance degradation. If the standard value for the input capacitors (0.1µF) is adopted, the low frequency cut-off will amount to 16 Hz. 4.3 Standby and muting Standby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or microprocessors, a direct connection to Vs of these two pins is admissible but a 470k equivalent resistance should be present between the power supply and the muting and ST-BY pins. R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises. About the standby, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than 2.5 V/ms. 4.4 DC offset detector The TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on the outputs which may lead to speakers damage for overheating. The feature is enabled by the MUTE pin (according to table 3) and works with the amplifier unmuted and with no signal on the inputs. The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of the Offset Detector it is necessary to connect a pulldown kw resistor between HSD and ground. 4.5 Heatsink definition Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be deduced from Figure 18, which reports the simulated power dissipation when real music/speech programmes are played out. Noise with gaussian-distributed amplitude was employed for this simulation. Based on that, frequent clipping occurrence (worst-case) will cause P diss = 26 W. Assuming T amb = 70 C and T CHIP = 150 C as boundary conditions, the heatsink's thermal resistance should be approximately 2 C/W. This would avoid any thermal shutdown occurrence even after long-term and full-volume operation. 14/18

Package information 5 Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK packages. ECOPACK packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 4.45 4.50 4.65 0.175 0.177 0.183 B 1.80 1.90 2.00 0.070 0.074 0.079 C 1.40 0.055 D 0.75 0.90 1.05 0.029 0.035 0.041 E 0.37 0.39 0.42 0.014 0.015 0.016 F (1) 0.57 0.022 G 0.80 1.00 1.20 0.031 0.040 0.047 G1 23.75 24.00 24.25 0.935 0.945 0.955 H (2) 28.90 29.23 29.30 1.139 1.150 1.153 H1 17.00 0.669 H2 12.80 0.503 H3 0.80 0.031 L (2) 22.07 22.47 22.87 0.869 0.884 0.904 L1 18.57 18.97 19.37 0.731 0.747 0.762 L2 (2) 15.50 15.70 15.90 0.6 0.618 0.626 L3 7.70 7.85 7.95 0.303 0.309 0.313 L4 5 0.197 L5 3.5 0.138 M 3.70 4.00 4.30 0.145 0.157 0.169 M1 3.60 4.00 4.40 0.142 0.157 0.173 N 2.20 0.086 O 2 0.079 R 1.70 0.067 R1 0.5 0.02 R2 0.3 0.12 R3 1.25 0.049 R4 0.50 0.019 V 5 (T p.) V1 3 (Typ.) V2 20 (Typ.) V3 45 (Typ.) (1): dam-bar protusion not included (2): molding protusion included OUTLINE AND MECHANICAL DATA Flexiwatt25 (vertical) V C B V3 H3 H H1 H2 V A O R3 L2 L3 L4 N R4 V2 R R2 L L1 V1 V1 R2 R1 D Pin 1 G G1 F FLEX25ME L5 R1 R1 E M M1 7034862 15/18

Package information TDA7850 Figure 22. Flexiwatt25 (horizontal) mechanical data and package dimensions DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 4.45 4.50 4.65 0.175 0.177 0.183 B 1.80 1.90 2.00 0.070 0.074 0.079 C 1.40 0.055 D 2.00 0.079 E 0.37 0.39 0.42 0.014 0.015 0.016 F (1) 0.57 0.022 G 0.75 1.00 1.25 0.029 0.040 0.049 G1 23.70 24.00 24.30 0.933 0.945 0.957 H (2) 28.90 29.23 29.30 1.139 1.150 1.153 H1 17.00 0.669 H2 12.80 0.503 H3 0.80 0.031 L (2) 21.64 22.04 22.44 0.852 0.868 0.883 L1.15.5.85 0.40 0.413 0.427 L2 (2) 15.50 15.70 15.90 0.6 0.618 0.626 L3 7.70 7.85 7.95 0.303 0.309 0.313 L4 5 0.197 L5 5.15 5.45 5.85 0.203 0.214 0.23 L6 1.80 1.95 2. 0.070 0.077 0.083 M 2.75 3.00 3.50 0.8 0.118 0.138 M1 4.73 0.186 M2 5.61 0.220 N 2.20 0.086 P 3.20 3.50 3.80 0.126 0.138 0.15 R 1.70 0.067 R1 0.50 0.02 R2 0.30 0.12 R3 1.25 0.049 R4 0.50 0.02 V 5 (Typ.) V1 3 (Typ.) V2 20 (Typ.) V3 45 (Typ.) (1): dam-bar protusion not included; (2): molding protusion included OUTLINE AND MECHANICAL DATA Flexiwatt25 (Horizontal) 7399733 C 16/18

Revision history 6 Revision history Table 5. Document revision history Date Revision Changes 22-Nov-2006 1 Initial release. 27-Feb-2007 2 Added Chapter 3.4: Electrical characteristic curves. 09-Oct-2007 3 12-Sep-2008 4 07-Nov-2008 5 17-Sep-2013 6 Updated Disclaimer. Updated the values for the dv OS and I q1 parameters on the Table 4. Added Figure 20 on page 13. Updated Figure 2: Standard test and application circuit. Updated Section 4.4: DC offset detector and Section 4.3: Standby and muting. Updated the values of V OS and THD parameters on the Table 4. Modified max. values of the THD distortion in Table 4: Electrical characteristics on page 8. 17/18

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