FEATRES 5A Onboard Switch (LT74) Operates p to 6V Input khz Switching Frequency Greatly Improved Dynamic Behavior Available in Low Cost 5 and 7-Lead Packages Only 8.5mA Quiescent Current Programmable Current Limit Micropower Shutdown Mode APPLICATIO S Buck Converter with Output Voltage Range of.5v to 5V Tapped-Inductor Buck Converter with A Output at 5V Positive-to-Negative Converter Negative Boost Converter Multiple Output Buck Converter DESCRIPTIO The LT 74 is a 5A (LT76 is rated at A) monolithic bipolar switching regulator which requires only a few external parts for normal operation. The power switch, all oscillator and control circuitry, and all current limit com- LT74/LT76 Step-Down Switching Regulator ponents, are included on the chip. The topology is a classic positive buck configuration but several design innovations allow this device to be used as a positive-to-negative converter, a negative boost converter, and as a flyback converter. The switch output is specified to swing 4V below ground, allowing the LT74 to drive a tappedinductor in the buck mode with output currents up to A. The LT74 uses a true analog multiplier in the feedback loop. This makes the device respond nearly instantaneously to input voltage fluctuations and makes loop gain independent of input voltage. As a result, dynamic behavior of the regulator is significantly improved over previous designs. On-chip pulse by pulse current limiting makes the LT74 nearly bust-proof for output overloads or shorts. The input voltage range as a buck converter is 8V to 6V, but a selfboot feature allows input voltages as low as 5V in the inverting and boost configurations. The LT74 is available in low cost TO- or DD packages with frequency pre-set at khz and current limit at 6.5A (LT76 =.6A). A 7-pin TO- package is also available which allows current limit to be adjusted down to zero. In addition, full micropower shutdown can be programmed. See Application Note 44 for design details. A fixed 5V output, A version is also available. See LT76-5., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO Buck Converter Efficiency V TO 4V Basic Positive Buck Converter LT74 V SW MBR745* R.8k % R.k % C3 µf R3.7k C.µF L** 5µH (LT74) µh (LT76) 5V 5A C 5µF 5V * SE MBR34 FOR LT76 ** COILTRONICS #5--5 (LT74) #--5 (LT76) PLSE ENGINEERING, INC. #PE-94 (LT74) #PE-9 (LT76) HRRICANE #HL-AK47QQ (LT74) #HL-AGLL (LT76) RIPPLE CRRENT RATING I OT / LT74 TA EFFICIENCY (%) 9 8 7 6 5 LT74 V OT = V, = V V OT = 5V, = 5V L = 5µH TYPE 5 CORE DIODE = MBR735 3 4 OTPT LOAD CRRENT (A) 5 6 LT74 TPC7 sn74 74fds
LT74/LT76 ABSOLTE AXI RATI GS W W W Input Voltage LT74/ LT76... 45V LT74HV/LT76HV... 64V Switch Voltage with Respect to Input Voltage LT74/ LT76... 64V LT74HV/LT76HV... 75V Switch Voltage with Respect to Ground Pin (V SW Negative) LT74/LT76 (Note 7)... 35V LT74HV/LT76HV (Note 7)... 45V Feedback Pin Voltage... V, V Shutdown Pin Voltage (Not to Exceed )... 4V (Note ) I LIM Pin Voltage (Forced)... 5.5V Maximum Operating Ambient Temperature Range Commercial... C to 7 C Industrial... 4 C to 85 C Military (OBSOLETE)... 55 C to 5 C Maximum Operating Junction Temperature Range Commercial... C to 5 C Industrial... 4 C to 5 C Military (OBSOLETE)... 55 C to 5 C Maximum Storage Temperature... 65 C to 5 C Lead Temperature (Soldering, sec)... 3 C PACKAGE/ORDER I FOR W ATIO TAB IS TAB IS TAB IS FRONT VIEW 5 4 3 Q PACKAGE 5-LEAD PLASTIC DD LT76: θ JC = 4 C, θ JA = 3 C/W FRONT VIEW 7 6 5 4 3 R PACKAGE 7-LEAD PLASTIC DD LT76: θ JC = 4 C, θ JA = 3 C/W FRONT VIEW 7 6 5 4 3 T7 PACKAGE 7-LEAD PLASTIC TO- V SW /SENSE SHDN /SENSE I LIM V SW SHDN I LIM V SW ORDER PART NMBER LT76CQ LT76IQ LT76CR LT76IR LT76HVCR LT76HVIR LT74CT7 LT74HVCT7 LT74IT7 LT74HVIT7 LT76CT7 LT76HVCT7 TAB IS BOTTOM VIEW 4 K PACKAGE 4-LEAD TO-3 METAL CAN LT74: θ JC =.5 C, θ JA = 35 C/W LT76: θ JC = 4 C, θ JA = 35 C/W LT74: θ JC =.5 C, θ JA = 5 C/W LT76: θ JC = 4 C, θ JA = 5 C/W 3 FRONT VIEW 5 4 3 V SW OBSOLETE PACKAGE Consider the T5 Package for Alternate Source T PACKAGE 5-LEAD PLASTIC TO- LEADS ARE FORMED STANDARD FOR STRAIGHT LEADS, ORDER FLOW 6 CASE IS V SW ORDER PART NMBER LT74CK LT74HVCK LT74MK LT74HVMK LT76CK LT76HVCK LT76MK LT76HVMK LT74CT LT74HVCT LT74IT LT74HVIT LT76CT LT76HVCT LT76IT LT76HVIT LT74: θ JC =.5 C, θ JA = 5 C/W LT76: θ JC = 4 C, θ JA = 5 C/W *Assumes package is soldered to.5 IN of oz. copper over internal ground plane or over back side plane. Consult LTC Marketing for parts specified with wider operating temperature ranges. sn74 74fds
ELECTRICAL CHARACTERISTICS LT74/LT76 The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 5 C. T j = 5 C, = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX NITS Switch On Voltage (Note ) LT74 I SW = A, T j C.85 V I SW = A, T j < C. V I SW = 5A, T j C.3 V I SW = 5A, T j < C.5 V LT76 I SW =.5A. V I SW = A.7 V Switch Off Leakage LT74 5V, V SW = 5 3 µa = V MAX, V SW = (Note 8) 5 µa LT76 = 5V, V SW = 5 µa = V MAX, V SW = (Note 8) 5 µa Supply Current (Note 3) V =.5V, 4V 8.5 ma 4V < < 6V 9 ma V SHT =.V (Device Shutdown) (Note 9) 4 3 µa Minimum Supply Voltage Normal Mode 7.3 8 V Startup Mode (Note 4) 3.5 4.8 V Switch Current Limit (Note 5) LT74 I LIM Open 5.5 6.5 8.5 A R LIM = k (Note 6) 4.5 A R LIM = 7k (Note 6) 3 A LT76 I LIM Open.6 3. A R LIM = k (Note 6).8 A R LIM = 7k (Note 6). A Maximum Duty Cycle 85 9 % Switching Frequency 9 khz T j 5 C 85 khz T j > 5 C 85 5 khz V = V through kω (Note 5) khz Switching Frequency Line Regulation 8V V MAX (Note 8).3. %/V Error Amplifier Voltage Gain (Note 7) V 4V V/V Error Amplifier Transconductance 37 5 8 µmho Error Amplifier Source and Sink Current Source (V = V) 4 5 µa Sink (V =.5V).7.6 ma Feedback Pin Bias Current V = V REF.5 µa Reference Voltage = V.55..65 V Reference Voltage Tolerance V REF (Nominal) =.V ±.5 ±.5 % All Conditions of Input Voltage, Output ± ±.5 % Voltage, Temperature and Load Current Reference Voltage Line Regulation 8V V MAX (Note 8).5. %/V Voltage at % Duty Cycle.5 V Over Temperature 4 mv/ C Multiplier Reference Voltage 4 V Shutdown Pin Current V SH = 5V 5 µa V SH V THRESHOLD (.5V) 5 µa Shutdown Thresholds Switch Duty Cycle =..45.7 V Fully Shut Down..3.6 V Thermal Resistance Junction to Case LT74.5 C/W LT76 4. C/W sn74 74fds 3
LT74/LT76 ELECTRICAL CHARACTERISTICS Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : To calculate maximum switch on voltage at currents between low and high conditions, a linear interpolation may be used. Note 3: A feedback pin voltage (V ) of.5v forces the pin to its low clamp level and the switch duty cycle to zero. This approximates the zero load condition where duty cycle approaches zero. Note 4: Total voltage from pin to ground pin must be 8V after startup for proper regulation. BLOCK DIAGRA INPT SPPLY W Note 5: Switch frequency is internally scaled down when the feedback pin voltage is less than.3v to avoid extremely short switch on times. During testing, V is adjusted to give a minimum switch on time of µs. R Note 6: I LIM LIM k R (LT74), I LIM LIM k (LT76). k 5.5k Note 7: Switch to input voltage limitation must also be observed. Note 8: V MAX = 4V for the LT74/76 and 6V for the LT74HV/76HV. Note 9: Does not include switch leakage. LT74 µ A 3 µ A.3V 6V µ -POWER REGLATOR 6V TO ALL SHTDOWN AND BIAS CIRCITRY.35V CRRENT LIMIT SHTDOWN CRRENT LIMIT COMP C 5Ω 5Ω.4 SHTDOWN* I LIM* 4.5V k FREQ SHIFT SYNC khz OSCILLATOR 3V(p-p) R R/S S Q LATCH R G.V A ERROR AMP Z ANALOG X MLTIPLIER XY Z Y C PLSE WIDTH COMPARATOR 4 Ω 5Ω SWITCH OTPT (V SW) VC 4V (EQIVALENT) LT76.Ω *AVAILABLE ON PACKAGES WITH PIN CONTS GREATER THAN 5. Ω SWITCH OTPT (V SW) 4 LT74 BD sn74 74fds
LT74/LT76 BLOCK DIAGRA W DESCRIPTIO A switch cycle in the LT74 is initiated by the oscillator setting the R/S latch. The pulse that sets the latch also locks out the switch via gate G. The effective width of this pulse is approximately 7ns, which sets the maximum switch duty cycle to approximately 93% at khz switching frequency. The switch is turned off by comparator C, which resets the latch. C has a sawtooth waveform as one input and the output of an analog multiplier as the other input. The multiplier output is the product of an internal reference voltage, and the output of the error amplifier, A, divided by the regulator input voltage. In standard buck regulators, this means that the output voltage of A required to keep a constant regulated output is independent of regulator input voltage. This greatly improves line transient response, and makes loop gain independent of input voltage. The error amplifier is a transconductance type with a G M at null of approximately 5µmho. Slew current going positive is 4µA, while negative slew current is about.ma. This asymmetry helps prevent overshoot on start-up. Overall loop frequency compensation is accomplished with a series RC network from to ground. Switch current is continuously monitored by C, which resets the R/S latch to turn the switch off if an overcurrent condition occurs. The time required for detection and switch turn off is approximately 6ns. So minimum switch on time in current limit is 6ns. nder dead shorted output conditions, switch duty cycle may have to be as low as % to maintain control of output current. This would require switch on time of ns at khz switching frequency, so frequency is reduced at very low output voltages by feeding the signal into the oscillator and creating a linear frequency downshift when the signal drops below.3v. Current trip level is set by the voltage on the I LIM pin which is driven by an internal 3µA current source. When this pin is left open, it self-clamps at about 4.5V and sets current limit at 6.5A for the LT74 and.6a for the LT76. In the 7-pin package an external resistor can be connected from the I LIM pin to ground to set a lower current limit. A capacitor in parallel with this resistor will soft-start the current limit. A slight offset in C guarantees that when the I LIM pin is pulled to within mv of ground, C output will stay high and force switch duty cycle to zero. The Shutdown pin is used to force switch duty cycle to zero by pulling the I LIM pin low, or to completely shut down the regulator. Threshold for the former is approximately.35v, and for complete shutdown, approximately.3v. Total supply current in shutdown is about 5µA. A µa pull-up current forces the shutdown pin high when left open. A capacitor can be used to generate delayed startup. A resistor divider will program undervoltage lockout if the divider voltage is set at.35v when the input is at the desired trip point. The switch used in the LT74 is a Darlington NPN (single NPN for LT76) driven by a saturated PNP. Special patented circuitry is used to drive the PNP on and off very quickly even from the saturation state. This particular switch arrangement has no isolation tubs connected to the switch output, which can therefore swing to 4V below ground. sn74 74fds 5
LT74/LT76 TYPICAL PERFOR A CE CHARACTERISTICS W CRRENT (ma) 5 5 5 5 Pin Characteristics Pin Characteristics Feedback Pin Characteristics V ADJSTED FOR I C = AT = V SLOPE 4kΩ V V 3 4 VOLTAGE (V) 5 6 7 8 9 LT74 TPC CRRENT (ma)..5..5.5..5. V.5V 3 4 VOLTAGE (V) 5 6 7 8 9 LT74 TPC CRRENT (µa) 5 4 3 3 4 5 START OF FREQENCY SHIFTING 3 4 5 6 7 8 9 VOLTAGE (V) LT74 TPC3 CRRENT (µa) 4 3 3 4 Shutdown Pin Characteristics = 5V THIS POINT MOVES WITH DETAILS OF THIS AREA SHOWN IN OTHER GRAPH 3 4 5 6 7 8 VOLTAGE (V) LT74 TPC4 CRRENT (µa) 5 5 5 3 35 4 Shutdown Pin Characteristics T j = 5 C CRRENT FLOWS OT OF SHTDOWN PIN SHTDOWN THRESHOLD VOLTAGE (V) I LIM Pin Characteristics 4.5..5..5 3. 3.5 4. 3 4 5 6 7 8 LT74 PC5 CRRENT (µa) 5 5 5 5 3 35 T = 5 C j VOLTAGE (V) LT74 TPC6 INPT CRRENT (ma) Supply Current 8 6 4 DEVICE NOT SWITCHING = V 8 6 4 3 4 5 6 INPT VOLTAGE (V) LT74 TPC 6 sn74 74fds
LT74/LT76 TYPICAL PERFOR A CE CHARACTERISTICS W Supply Current (Shutdown) Reference Voltage vs Temperature Switch On Voltage 3.5 3. INPT CRRENT (µa) 5 5 5 VOLTAGE (V).4.3....9.8 ON VOLTAGE (V).5..5. LT76 LT74 T = 5 C j CHANGE IN REFERENCE VOLTAGE (mv) 3 4 5 6 7 8 3 4 5 6 INPT VOLTAGE (V) Reference Shift with Ripple Voltage SQARE WAVE TRI WAVE LT74 TPC3 4 6 8 4 6 8 (µmho) TRANSCONDCTANCE.7 5 5 5 5 8k 7k 6k 5k 4k 3k k k JNCTION TEMPERATRE ( C) Error Amplifier Phase and G M.5 75 5 5 G M LT74 TPC4 5 k k k M M θ 5 5 5 PHASE ( ) FREQENCY (khz) 5 5 95 9 85 8 5 3 SWITCH CRRENT (A) Switching Frequency vs Temperature 5 5 5 4 5 6 LT74 TPC8 75 5 5 PEAK-TO-PEAK RIPPLE AT PIN (mv) LT74 TPC6 FREQENCY (Hz) LT74 TPC7 JNCTION TEMPERATRE ( C) LT74 TPC8 6 Feedback Pin Frequency Shift 8 Current Limit vs Temperature* SWITCHING FREQENCY (khz) 4 8 6 4 5 C 55 C 5 C.5..5..5 3. OTPT CRRENT LIMIT (A) 7 6 5 4 3 I LIM PIN OPEN R LIM= 5kΩ R LIM = kω *MLTIPLY CRRENTS BY.4 FOR LT76 5 5 5 5 75 5 5 FEEDBACK PIN VOLTAGE (V) LT74 TPC9 JNCTION TEMPERATRE ( C) LT74 TPC sn74 74fds 7
LT74/LT76 PI DESCRIPTIO S PIN The pin is both the supply voltage for internal control circuitry and one end of the high current switch. It is important, especially at low input voltages, that this pin be bypassed with a low ESR, and low inductance capacitor to prevent transient steps or spikes from causing erratic operation. At full switch current of 5A, the switching transients at the regulator input can get very large as shown in Figure. Place the input capacitor very close to the regulator and connect it with wide traces to avoid extra inductance. se radial lead capacitors. V OT ( V )( V ) OT =. To ensure good load regulation, the ground pin must be connected directly to the proper output node, so that no high currents flow in this path. The output divider resistor should also be connected to this low current connection line as shown in Figure. LT74 dl ( ) ( L P ) dt R STEP = ESR ( I SW ) ( ) RAMP = T ON ( I SW ) ( ) C HIGH CRRENT RETRN PATH NEGATIVE OTPT NODE WHERE LOAD REGLATION WILL BE MEASRED LT74 PD LT74 PD Figure. Input Capacitor Ripple L P = Total inductance in input bypass connections and capacitor. Spike height (di/dt L P ) is approximately V per inch of lead length for LT74 and.8v per inch for LT76. Step for ESR =.5Ω and I SW = 5A is.5v. Ramp for C = µf, T ON = 5µs, and I SW = 5A, is.v. Input current on the Pin in shutdown mode is the sum of actual supply current ( 4µA, with a maximum of 3µA), and switch leakage current. Consult factory for special testing if shutdown mode input current is critical. GROND PIN It might seem unusual to describe a ground pin, but in the case of regulators, the ground pin must be connected properly to ensure good load regulation. The internal reference voltage is referenced to the ground pin; so any error in ground pin voltage will be multiplied at the output; Figure. Proper Ground Pin Connection FEEDBACK PIN The feedback pin is the inverting input of an error amplifier which controls the regulator output by adjusting duty cycle. The noninverting input is internally connected to a trimmed.v reference. Input bias current is typically.5µa when the error amplifier is balanced (I OT = ). The error amplifier has asymmetrical G M for large input signals to reduce startup overshoot. This makes the amplifier more sensitive to large ripple voltages at the feedback pin. mvp-p ripple at the feedback pin will create a 4mV offset in the amplifier, equivalent to a.7% output voltage shift. To avoid output errors, output ripple (P-P) should be less than 4% of DC output voltage at the point where the output divider is connected. See the Error Amplifier section for more details. Frequency Shifting at the Feedback Pin The error amplifier feedback pin () is used to downshift the oscillator frequency when the regulator output voltage is low. This is done to guarantee that output short-circuit 8 sn74 74fds
LT74/LT76 PI current is well controlled even when switch duty cycle must be extremely low. Theoretical switch on time for a buck converter in continuous mode is: t ON DESCRIPTIO S V = V OT IN VD f V D = Catch diode forward voltage (.5V) f = Switching frequency At f = khz, t ON must drop to.µs when = 5V and the output is shorted (V OT = V). In current limit, the LT74 can reduce t ON to a minimum value of.6µs, much too long to control current correctly for V OT =. To correct this problem, switching frequency is lowered from khz to khz as the pin drops from.3v to.5v. This is accomplished by the circuitry ERROR AMPLIFIER V.V Q R3 3k TO OSCILLATOR R R.k V OT EXTERNAL DIVIDER SHTDOWN PIN The shutdown pin is used for undervoltage lockout, micropower shutdown, soft-start, delayed start, or as a general purpose on/off control of the regulator output. It controls switching action by pulling the I LIM pin low, which forces the switch to a continuous off state. Full micropower shutdown is initiated when the shutdown pin drops below.3v. The V/I characteristics of the shutdown pin are shown in Figure 4. For voltages between.5v and, a current of µa flows out of the shutdown pin. This current increases to 5µA as the shutdown pin moves through the.35v threshold. The current increases further to 3µA at the.3v threshold, then drops to 5µA as the shutdown voltage fall below.3v. The µa current source is included to pull the shutdown pin to its high or default state when left open. It also provides a convenient pull-up for delayed start applications with a capacitor on the shutdown pin. When activated, the typical collector current of Q in Figure 5, is ma. A soft-start capacitor on the I LIM pin will delay regulator shutdown in response to C, by (5V)(C LIM )/ma. Soft-start after full micropower shutdown is ensured by coupling C to Q. Figure 3. Frequency Shifting LT74 PD3 shown in Figure 3. Q is off when the output is regulating (V =.V). As the output is pulled down by an overload, V will eventually reach.3v, turning on Q. As the output continues to drop, Q current increases proportionately and lowers the frequency of the oscillator. Frequency shifting starts when the output is 6% of normal value, and is down to its minimum value of khz when the output is % of normal value. The rate at which frequency is shifted is determined by both the internal 3k resistor R3 and the external divider resistors. For this reason, R should not be increased to more than 4kΩ, if the LT74 will be subjected to the simultaneous conditions of high input voltage and output short-circuit. CRRENT (µa) 5 5 5 3 35 4 T j = 5 C CRRENT FLOWS OT OF SHTDOWN PIN SHTDOWN THRESHOLD.5..5..5 3. 3.5 4. VOLTAGE (V) LT74 PC5 Figure 4. Shutdown Pin Characteristics sn74 74fds 9
LT74/LT76 PI SHTDOWN PIN DESCRIPTIO S µ A.3V.3V C C 3 µ A Q ILIM PIN 6V TO TOTAL REGLATOR SHTDOWN LT74 PD7 EXTERNAL C LIM Hysteresis in undervoltage lockout may be accomplished by connecting a resistor (R3) from the I LIM pin to the shutdown pin as shown in Figure 7. D prevents the shutdown divider from altering current limit. R R *N448 R3 D* VIN SHT LT74 I LIM OPTIONAL CRRENT LIMIT RESISTOR Figure 7. Adding Hysteresis LT74 PD9 Figure 5. Shutdown Circuitry ndervoltage Lockout ndervoltage lockout point is set by R and R in Figure 6. To avoid errors due to the µa shutdown pin current, R is usually set at 5k, and R is found from: ( SH) R R V TP = V V SH V TP = Desired undervoltage lockout voltage V SH = Threshold for lockout on the shutdown pin =.45V If quiescent supply current is critical, R may be increased up to 5kΩ, but the denominator in the formula for R should replace V SH with V SH (µa)(r). R R 5k VIN SHT LT74 Figure 6. ndervoltage Lockout LT74 PD8 R Trip Point = VTP = 35. V R If R3 is added, the lower trip point ( descending) will be the same. The upper trip point (V TP ) will be: V TP R R = V V R SH R R 8. 3 R3 If R and R are chosen, R3 is given by: ( VSH 8. V)( R) R3 = R VTP VSH R Example: An undervoltage lockout is required such that the output will not start until = V, but will continue to operate until drops to 5V. Let R =.3k. 5V 35V R= ( 34k) (. ). =. 5k 35. V ( 35. 8. )( 5. ) R3 = k 35 5 = 39... 3. sn74 74fds
LT74/LT76 PI DESCRIPTIO S I LIM PIN The I LIM pin is used to reduce current limit below the preset value of 6.5A. The equivalent circuit for this pin is shown in Figure 8. TO LIMIT CIRCIT Q R 8K I LIM D 3 µ A D D3 6V Figure 8. I LIM Pin Circuit 4.3V LT47 PD When I LIM is left open, the voltage at Q base clamps at 5V through D. Internal current limit is determined by the current through Q. If an external resistor is connected between I LIM and ground, the voltage at Q base can be reduced for lower current limit. The resistor will have a voltage across it equal to (3µA)(R), limited to 5V when clamped by D. Resistance required for a given current limit is: R LIM = I LIM (kω) kω (LT74) R LIM = I LIM (5.5kΩ) kω (LT76) As an example, a 3A current limit would require 3A(k) k = 7kΩ for the LT74. The accuracy of these formulas is ±5% for A I LIM 5A (LT74) and 7A I LIM.8A (LT76), so I LIM should be set at least 5% above the peak switch current required. Foldback current limiting can be easily implemented by adding a resistor from the output to the I LIM pin as shown in Figure 9. This allows full desired current limit (with or without R LIM ) when the output is regulating, but reduces current limit under short-circuit conditions. A typical value for R is 5kΩ, but this may be adjusted up or down to set the amount of foldback. D prevents the output voltage from forcing current back into the I LIM pin. To calculate a value for R, first calculate R LIM, the R : R ( ISC 44. *)( RL ) = 5. *( RL kω) I SC ( RL inkω) *Change.44 to.6, and.5 to.8 for LT76. Example: I LIM = 4A, ISC =.5A, R LIM = (4)(k) k = 9k R = ( 5. 44. )( 9kΩ ) kω 59. ( k k) 5. 38. LT74 I LIM R LIM N448 R D ( ) V OT LT74 PD3 Figure 9. Foldback Current Limit Error Amplifier The error amplifier in Figure is a single stage design with added inverters to allow the output to swing above and below the common mode input voltage. One side of the amplifier is tied to a trimmed internal reference voltage of.v. The other input is brought out as the (feedback) pin. This amplifier has a G M (voltage in to current out ) transfer function of 5µmho. Voltage gain is determined by multiplying G M times the total equivalent output loading, consisting of the output resistance of Q4 and Q6 in parallel with the series RC external frequency compensation network. At DC, the external RC is ignored, and with a parallel output impedance for Q4 and Q6 of 4kΩ, voltage gain is. At frequencies above a few hertz, voltage gain is determined by the external compensation, R C and C C. sn74 74fds
LT74/LT76 PI DESCRIPTIO S 5.8V Q4 9 µ A 9 µ A Q3 Q Q 5 µ A 5 µ A D VC 9 µ A EXTERNAL FREQENCY COMPENSATION.V X.8 4 µ A D Q6 R C 3Ω C C ALL CRRENTS SHOWN ARE AT NLL CONDITION LT74 PD Figure. Error Amplifier Gm AV = at mid frequencies π f CC A = G R at high frequencies V m C Phase shift from the pin to the pin is 9 at mid frequencies where the external C C is controlling gain, then drops back to (actually 8 since is an inverting input) when the reactance of C C is small compared to R C. The low frequency pole where the reactance of C C is equal to the output impedance of Q4 and Q6 (r O ), is: f POLE = r C r O 4 k Ω π O Although f POLE varies as much as 3: due to r O variations, mid-frequency gain is dependent only on G m, which is specified much tighter on the data sheet. The higher frequency zero is determined solely by R C and C C. The error amplifier has asymmetrical peak output current. Q3 and Q4 current mirrors are unity-gain, but the Q6 mirror has a gain of.8 at output null and a gain of 8 when the pin is high (Q current = ). This results in a maximum positive output current of 4µA and a maximum negative (sink) output current of.ma. The asymmetry is deliberate it results in much less regulator output overshoot during rapid start-up or following the release of an output overload. Amplifier offset is kept low by area scaling Q and Q at.8:. Amplifier swing is limited by the internal 5.8V supply for positive outputs and by D and D when the output goes low. Low clamp voltage is approximately one diode drop (.7V mv/ C). Note that both the pin and the pin have other internal connections. Refer to the frequency shifting and synchronizing discussions. f ZERO = π R C C C sn74 74fds
LT74/LT76 TYPICAL APPLICATIO S Tapped-Inductor Buck Converter V TO 35V C3 µf 5V LT74HV V SW R3 k C.µF D 35V 5W D3 N589 L* 3 D**.µF R.8k R.k L 5µH C 44µF ( EA µf, 6V) V OT 5V, A C4 39µF 6V * PLSE ENGINEERING #PE±658 ** MOTOROLA MBR3CTL IF INPT VOLTAGE IS BELOW V, MAXIMM OTPT CRRENT WILL BE REDCED. SEE AN44 LT74 TA Positive-to-Negative Converter with 5V Output VIN 4.5V to 4V C µf 5V L 5µH 5A LT74 VSW V C3.µF R** 5.k R** k D MBR745 C4**.µF R3*.74k R4.8k* C µf V OPTIONAL FILTER 5µH µf V 5V,A*** * = % FILM RESISTORS D = MOTOROLA-MBR745 C = NICHICON-PLCMRH6 C = NICHICON-PLAMRH6 L = COILTRONICS-CTX5-5-5 LOWER REVERSE VOLTAGE RATING MAY BE SED FOR LOWER INPT VOLTAGES. LOWER CRRENT RATING IS ALLOWED FOR LOWER OTPT CRRENT. SEE AN44. LOWER CRRENT RATING MAY BE SED FOR LOWER OTPT CRRENT. SEE AN44. ** R, R, AND C4 ARE SED FOR LOOP FREQENCY COMPENSATION WITH LOW INPT VOLTAGE, BT R AND R MST BE INCLDED IN THE CALCLATION FOR OTPT VOLTAGE DIVIDER VALES. FOR HIGHER OTPT VOLTAGES, INCREASE R, R, AND R3 PROPORTIONATELY. FOR INPT VOLTAGE > V, R, R, AND C4 CAN BE ELIMINATED, AND COMPENSATION IS DONE TOTALLY ON THE PIN. R3 = V OT.37 (KΩ) R = (R3) (.86) R = (R3) (3.65) ** MAXIMM OTPT CRRENT OF A IS DETERMINED BY MINIMM INPT VOLTAGE OF 4.5V. HIGHER MINIMM INPT VOLTAGE WILL ALLOW MCH HIGHER OTPT CRRENTS. SEE AN44. LT74 TA3 sn74 74fds 3
LT74/LT76 PACKAGE DESCRIPTIO K Package 4-Lead TO-3 Metal Can (Reference LTC DWG # 5-8-3).3.35 (8.3 8.89).76.775 (9.3 9.69).6.35 (.54 3.49).4.48 (.67.9).38.43 (.965.9).77.97 (9.9 3.4).47 TP P.C.D..655.675 (6.64 9.5).5.6 (3.84 4.9) DIA PLC.67.77 (4.4 4.49) R 8 7 OBSOLETE PACKAGE.49.5 (.45.95) R K4(TO-3) 98 Q Package 5-Lead Plastic DD Pak (Reference LTC DWG # 5-8-46).56 (6.5).6 (.54).6 (.54) TYP.39.45 (9.96.54) 5 TYP.65.8 (4.9 4.57).45.55 (.43.397).6 (.54).83 (4.648).33.37 (8.38 9.398).59 (.499) TYP.4.8.4 (..3. ).3 (7.6).75 (.95) BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK.43.. ( 3.63.35.58 ).67 (.7).8.38 BSC (.7.965).3.3 (.33.584).95.5 (.43.9).5 ±. (.7 ±.35) Q(DD5) 98 4 sn74 74fds
LT74/LT76 PACKAGE DESCRIPTIO R Package 7-Lead Plastic DD Pak (Reference LTC DWG # 5-8-46).56 (6.5).6 (.54).6 (.54) TYP.39.45 (9.96.54) 5 TYP.65.8 (4.9 4.57).45.55 (.43.397).6 (.54).83 (4.648).33.37 (8.38 9.398).59 (.499) TYP.4.8.4 (..3. ).3 (7.6).75 (.95) BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK.43.. ( 3.63.35.58 ).5 (.7).6.36 BSC (.66.94).3.3 (.33.584).95.5 (.43.9).5 ±. (.7 ±.35) R (DD7) 98 T Package 5-Lead Plastic TO- (Standard) (Reference LTC DWG # 5-8-4).39.45 (9.96.54).47.55 (3.734 3.937) DIA.65.8 (4.9 4.57).45.55 (.43.397).3.7 (5.84 6.858).46.5 (.684.7).33.37 (8.38 9.398).57.6 (4.478 5.748).6 (5.75) TYP.7.78 (7.78 8.49) SEATING PLANE.5. (3.86 5.3).6.3 (6.6 8.3).95.5 (.43.9).55.95* (3.937 4.953) BSC.67 (.7).8.38 (.7.965).35.65 (3.49 4.9).3.3 (.33.584) * MEASRED AT THE SEATING PLANE T5 (TO-) 399 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. sn74 74fds 5
LT74/LT76 TYPICAL APPLICATIO Negative Boost Converter V pf R.7k LT74 R.k C3 µf 5V V V SW C.µF 5V TO 5V * MBR735 ** I OT (MAX) = A TO 3A DEPENDING ON INPT VOLTAGE. SEE AN44 C nf R3 75Ω L 5µH D* µf C µf 5V V OT 5V** 5µH OPTIONAL OTPT FILTER LT74 TA4 PACKAGE DESCRIPTIO.39.45 (9.96.54) T7 Package 7-Lead Plastic TO- (Standard) (Reference LTC DWG # 5-8-4).47.55 (3.734 3.937) DIA.65.8 (4.9 4.57).45.55 (.43.397).3.7 (5.84 6.858).46.5 (.684.7).33.37 (8.38 9.398).57.6 (4.478 5.748).6 (5.75) TYP.7.78 (7.78 8.49) SEATING PLANE.5..6.3 (3.86 5.3) (6.64 8.8).95.5 (.43.9).55.95* (3.937 4.953).5 BSC (.7).6.36 (.66.94).35.65 (3.49 4.9).3.3 (.33.584) *MEASRED AT THE SEATING PLANE T7 (TO-) 399 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT375/LT376.5A, 5kHz Step-Down Switching Regulators p to 5V, I OT p to.5a, SO-8 LT374/LT374HV 4.5A, 5kHz Step-Down Switching Regulators p to 5V (3V for HV), I OT p to 4.5A, SO-8/DD LT37 6A, 5kHz High Efficiency Switching Regulator 6A/4V Internal Switch, 7-Lead DD/TO- LT676 Wide Input Range, High Efficiency Step-Down Regulator from 7.4V to 6V, I OT p to.5a, SO-8 LT339 High Power Synchronous DC/DC Controller p to 6V, I OT p to 5A, Current Mode LT765 3A,.5MHz, Step-Down Regulator = 3V to 5V, V µf =.V, TSSOP-6E, SO8 Package 6 sn74 74fds LT/CPI.5K REV D PRINTED IN SA Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA 9535-747 (48) 43-9 FAX: (48) 434-57 www.linear.com LINEAR TECHNOLOGY CORPORATION 994