AURIX, TriCore, XC2000, XE166, XC800 Families DAP Connector



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AURIX, TriCore, XC2000, XE166, XC800 Families DAP Connector Application Note V1.4, 2014-05 Microcontrollers

Edition 2014-05 Published by Infineon Technologies AG 81726 Munich, Germany 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMNS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com) Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Trademarks of Infineon Technologies AG AURIX, C166, CanPAK, CIPOS, CIPURSE, EconoPACK, CoolMOS, CoolSET, CORECONTROL, CROSSAVE, DAVE, DI-POL, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPIM, EconoPACK, EiceDRIVER, eupec, FCOS, HITFET, HybridPACK, I²RF, ISOFACE, IsoPACK, MIPAQ, ModSTACK, my-d, NovalithIC, OptiMOS, ORIGA, POWERCODE ; PRIMARION, PrimePACK, PrimeSTACK, PRO-SIL, PROFET, RASIC, ReverSave, SatRIC, SIEGET, SINDRION, SIPMOS, SmartLEWIS, SOLID FLASH, TEMPFET, thinq!, TRENCHSTOP, TriCore. Other Trademarks Advance Design System (ADS) of Agilent Technologies, AMBA, ARM, MULTI-ICE, KEIL, PRIMECELL, REALVIEW, THUMB, µvision of ARM Limited, UK. AUTOSAR is licensed by AUTOSAR development partnership. Bluetooth of Bluetooth SIG Inc. CAT-iq of DECT Forum. COLOSSUS, FirstGPS of Trimble Navigation Ltd. EMV of EMVCo, LLC (Visa Holdings Inc.). EPCOS of Epcos AG. FLEXGO of Microsoft Corporation. FlexRay is licensed by FlexRay Consortium. HYPERTERMINAL of Hilgraeve Incorporated. IEC of Commission Electrotechnique Internationale. IrDA of Infrared Data Association Corporation. ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB of MathWorks, Inc. MAXIM of Maxim Integrated Products, Inc. MICROTEC, NUCLEUS of Mentor Graphics Corporation. MIPI of MIPI Alliance, Inc. MIPS of MIPS Technologies, Inc., USA. murata of MURATA MANUFACTURING CO., MICROWAVE OFFICE (MWO) of Applied Wave Research Inc., OmniVision of OmniVision Technologies, Inc. Openwave Openwave Systems Inc. RED HAT Red Hat, Inc. RFMD RF Micro Devices, Inc. SIRIUS of Sirius Satellite Radio Inc. SOLARIS of Sun Microsystems, Inc. SPANSION of Spansion LLC Ltd. Symbian of Symbian Software Limited. TAIYO YUDEN of Taiyo Yuden Co. TEAKLITE of CEVA, Inc. TEKTRONIX of Tektronix Inc. TOKO of TOKO KABUSHIKI KAISHA TA. UNIX of X/Open Company Limited. VERILOG, PALLADIUM of Cadence Design Systems, Inc. VLYNQ of Texas Instruments Incorporated. VXWORKS, WIND RIVER of WIND RIVER SYSTEMS, INC. ZETEX of Diodes Zetex Limited. Last Trademarks Update 2011-11-11 Application Note 3 V1.4, 2014-05

Revision History Revision History DAP Revision History: V1.4 2014-05 Previous Version(s): V1.0, V1.1, V1.2, V1.3 Page Subjects (major changes since last revision) 12 FM modulation of DAP clock recommended for high-speed DAP 13 Table 6-1 added with DAP connector pinning for AURIX We Listen to Your Comments Is there any information in this document that you feel is wrong, unclear or missing? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com Application Note 4 V1.4, 2014-05

Table of Contents Table of Contents Revision History................................................................. 4 Table of Contents................................................................ 5 1 About this document............................................................. 6 1.1 Scope and purpose................................................................ 6 1.2 Intended audience................................................................ 6 1.3 Related documentation............................................................. 6 2 DAP Physical Connector.......................................................... 7 3 Pin Description.................................................................. 8 4 User Pins....................................................................... 9 5 DAP/SPD Enabling.............................................................. 10 5.1 DAP Enabling................................................................... 10 5.2 SPD Enabling................................................................... 10 5.3 SPD or DAP Enabling............................................................. 11 6 Target System Integration........................................................ 12 6.1 High Speed DAP................................................................. 12 6.2 AURIX / TriCore Family........................................................ 13 6.3 XC2000 / XE166 Families.......................................................... 14 6.4 XC800 Family................................................................... 14 Application Note 5 V1.4, 2014-05

About this document 1 About this document 1.1 Scope and purpose Infineon s DAP (Device Access Port) is a two-wire tool access port for microcontrollers and similar devices. It allows robust high speed connections over a long cable for automotive applications. SPD (Single Pin DAP) is a single wire DAP variant for low pin count devices. This document describes the connector, it s pins, how to enable DAP, and some guidelines on integration. 1.2 Intended audience This document is intended for PCB designers and tool vendors. 1.3 Related documentation For more detailed informations about DAP/SPD please refer to the DAP/SPD section in the target device documentation. Samtec FTSH series documentation (www.samtec.com) DAS Product Brief (www.infineon.com/das) Application Note 6 V1.4 2014-05

DAP Physical Connector 2 DAP Physical Connector On the target board the standard connector is a 0.05 inch double row, 10 pin micro terminal with keying shroud. There are many varieties of these, such as the Samtec FTSH-105-01-L-DV-K for example. It is offered as a standard dual row header 1.27 mm x 1.27 mm with 0.4 mm square pins. The figure below shows the DAP pinout top-view of the connector on the target board. The keying shroud is on the side with the uneven pin indexes. For mechanical protection of the connector pins it is recommended that this side is closer to the edge of the target board.. 2 4 6 8 10 1 3 5 7 9 Keying Shroud Cable Figure 2-1 DAP Connector The figure on the left, below, shows a DAP connector mounted as recommended at the edge of the PCB. The keying shroud enforces the right polarity and provides mechanical protection of the connector pins. To the left of the DAP connector is the much larger OCDS L1 connector (AP24001), with 0.1 inch pitch.. Figure 2-2 DAP Connector next to OCDS L1 Connector In the picture on the right, the DAP cable is plugged in. Please note that the cable plug (width approximately 10.5mm) is much wider than the DAP connector (width approximately 6.5mm) on the board. This means that for about 2.5 mm either side of the DAP connector, there can not be parts which are higher than 2 mm. Application Note 7 V1.4 2014-05

Pin Description 3 Pin Description Note that Direction in the following table is from the target system point of view. Table 3-1 DAPPins Pin Name Direction Description 1 VREF O Supply voltage from the target system. The voltage has to be strong enough to supply the target side of the level shifters within the tool hardware up to about 20 Mhz DAP operating frequency. The required supply current is in the range of 5 ma, mainly caused by signal switching. It can be reduced by lowering frequency and capacitance. Beyond 20 MHz the tool hardware has to supply the level shifter from another source and use this pin just as a voltage reference. 2 DAP1 IO DAP: Data pin. SPD IO SPD: Data pin. UART IO Single-wire UART. Serial communication interface (e.g. used for Bootstrap Loader BSL). 3 GND Recommended pin for signal return of DAP1 for high frequency impedance matching. 4 DAP0 I DAP: Clock. SUP I SPD: Optional user pin value for feedback into the target system. Otherwise reserved. 5 GND Recommended pin for signal return of DAP0 for high frequency impedance matching. 6 DAP2 IO DAP: Optional second data pin. USER0 IO/O Generic signal that can be used for non specified functions. 7 KEY (GND in cable) If the recommended connector with keying shroud is not used, this pin provides another option to enforce polarization. In that instance this pin is removed from the target connector and the associated jack in the cable connector closed with a plastic pin for example. 8 DAP3 IO DAP: Optional third data pin. USER1 IO/I Generic signal that can be used for non-specified functions. (DAPEN) I Optional indicator that the tool is connected. This can be used to enable the DAP interface of the device. 9 GND Supply ground. 10 RESET IO Target reset signal. Open drain active low signal. May be used bi-directionally to drive or sense the target reset signal. Usually driven by the tool to reset the target system. The target system is responsible for providing a pull-up to VREF on this signal to establish a logic one. The resistor shall not have a value less than 1 kohms. Application Note 8 V1.4 2014-05

User Pins 4 User Pins Support of user pins (USER0, USER1) is optional for a given tool. Please refer to the specific tool documentation about the availability of this feature and its control. If supported by the tool, these pins can be used to conveniently control target system specific features, such as selecting microcontroller boot options. Both signals can be bi-directional, depending on the tool hardware. If only a subset of pin directions is supported, the rule is that USER0 is Out (optional In) and USER1 is In (optional Out). Table 4-1 USER, DAP2, DAPEN Pin behavior Pin Name Direction Default Description 6 USER0 IO/O O Generic signal that can be used for non specified functions. From a DAS Client it can be accessed as user signal 0. DAP2 IO O DAP2 data signal 8 USER1 IO/I I H Generic signal that can be used for non specified functions. From a DAS Client it can be accessed as user signal 1. DAP3 IO I H DAP3 data signal. DAPEN I I H Some target devices have an explicit pin to enable DAP only when a tool is connected. This pin will have a weak pull down on the target system/chip side. Only when the tool hardware drives it high, DAP will be enabled. Note that depending on the target device this pin is evaluated at the de-activation of the reset (positive edge on RESET pin). Application Note 9 V1.4 2014-05

DAP/SPD Enabling 5 DAP/SPD Enabling There are three options for DAP/SPD enabling: 1. Always enabled. 2. Enabled with DAPEN pin. 3. Enabled with DAP1/SPD value (H) at RESET de-activation. The first option includes the case that the DAP/SPD interface is enabled with a setting in the Flash config sector evaluated during device startup. Specific devices can support one or several of these options to be flexible to the needs of different systems, so a tool has to support all options. 5.1 DAP Enabling The tool and device behavior is summarized in the following table:. Table 5-1 DAP Enabling with DAP1 or DAPEN Pin Name Tool Behavior Device Behavior 2 DAP1 Automatically pulled high (4.7-10 kohms) when RESET is activated, and for 5 ms afterwards, since the sample point for the DAP1 value can be delayed depending on the device type. 8 USER1 DAPEN Provisions for Tool Hot Attach If the device has a dedicated DAP interface which is always enabled, the hot attach of a tool is possible without restrictions. If not, the conditions for DAP1 or DAPEN (Table 5-1) have to also be satisfied when no tool is connected. For DAPEN this is easily achieved for instance with a pull-up resistor, or with hard-wiring. However, for devices where the enabling is controlled with DAP1, some circuitry is required, since the pull-up or driving of DAP1 needs to be disabled when the tool operates the DAP protocol. The condition for this disabling can be the level of the DAPEN pin at the tool connector, which is driven High when the tool is connected. 5.2 SPD Enabling In the initial tool hardware state this signal is driven high (VREF). It is under the responsibility and control of the user to change the pin state depending on the target system. The DAP1 pin value is latched at reset deactivation: L: DAP stays disabled H: DAP is enabled Will enable DAP if High at RESET release. Depending on the device type, it has to stay static High during operation. SPD is enabled by applying a High value to the SPD pin of the device at RESET de-activation. This means the tool behavior, described in Table 5-1 for DAP1, is applied to the SPD pin as well. Application Note 10 V1.4 2014-05

DAP/SPD Enabling 5.3 SPD or DAP Enabling SPD has a reduced performance compared to DAP, so some devices will support SPD and DAP. To distinguish between SPD and DAP within the device, the encoding listed in Table 5-2 is used. The values in the first two columns are the levels seen by the device at RESET release. Table 5-2 SPD/DAP Enabling with DAP0/1 DAP0 DAP1 Device Behavior H H DAP mode will be enabled. L H SPD mode will be enabled. H L Reserved (e.g. JTAG will be enabled). L L DAP and SPD disabled. SPD Only Option On the target board the availability of the SPD or DAP mode is configured with the connection between the DAP0 pin of the device and the DAP0 pin of the connector. When they are not connected it means that the tool is using SPD mode and the DAP0 pin is fully available for the application. Note: For such a target system, where only SPD is used, the circuitry on the target board for the user pin with the alternate DAP0 functionality has to make sure that this pin is not pulled or driven High during RESET deactivation. Application Note 11 V1.4 2014-05

Target System Integration 6 Target System Integration 6.1 High Speed DAP AURIX TriCore devices support DAP frequencies up to 160 MHz over the full automotive temperature range. The DAP connector and the associated flat ribbon cable are suited for this frequency with acceptable EMC behavior, if the following points are considered. Recommendations for PCB Design Very short direct connection between DAP connector and device pins Solid GND plane or GND traces below or beside all DAP signals Further connections to DAP signals need to be removable (e.g. 0R bridges) for high speed operation Keep trace length of DAP1 and DAP2 equal Termination Recommendations for Longer Signal Paths Use serial termination method on both ends for DAP1/DAP2 signals since they are bi-directional DAP0 can be terminated only at source (depending on the properties of the DAP0 driver) All terminations must match the line impedance (50 ohms recommended) Total trace length on board of less then 10 cm (the parasitic load of cable has to be considered as well) FM Modulated DAP0 Clock A frequency modulation (FM) of the clock drastically reduces the emissions of the DAP interface. For instance a 1.25 % FM modulation will reduce the emissions by 3 to 20 db below 1 GHz. Further Information Application Note AP24026 EMC Design Guidelines for Microcontroller Board Layout TC2xx PCB and High Speed Serial Interface Design Guideline Application Note Application Note 12 V1.4 2014-05

Target System Integration 6.2 AURIX / TriCore Family Table 6-1 DAP Connections on the Target Board for AURIX Pin Name Device Pin Remark 2 DAP1 DAP1 4 DAP0 DAP0 6 DAP2 DAP2/TGI3/TGO3 DAP or trigger pin (or user functionality) on P21.7 8 DAP3 DAP3/TGI2/TGO2 DAP or trigger pin (or user functionality) on P21.6 (DAPEN) TRST DAP will only be enabled if TRST is high during PORST de-activation. The recommendation is not to use this connector pin for this purpose since this can also be statically ensured in the board. 10 RESET PORST Table 6-2 DAP Connections on the Target Board for TriCore Pin Name Device Pin Remark 2 DAP1 DAP1 4 DAP0 DAP0 6 DAP2 DAP2 USER0 user defined If DAP2 is not needed, this pin can be connected to a user defined signal. AURIX devices for instance have DAP and trigger functionality overlaid to the same device pin (P21.7 DAP2/TGI3/TGO3). 8 DAPEN TRST DAP will only be enabled if the tool is connected and drives this pin high during PORST de-activation. USER1 user defined If DAP enabling is controlled elsewhere, this pin can be connected with a user defined signal. 10 RESET PORST Application Note 13 V1.4 2014-05

Target System Integration 6.3 XC2000 / XE166 Families Table 6-3 DAP, SPD and UART Connections on the Target Board for XC2000/XE166 Pin Name Device Pin Remark 2 DAP1 DAP1 SPD SPD/UART SPD and/or single-wire UART for Bootstrap Loader (BSL) 4 DAP0 DAP0 6 USER0 user defined Can be connected with a user defined signal. 8 DAPEN TRST DAP will only be enabled if the tool is connected and drives this pin high during PORST de-activation. USER1 user defined If DAP enabling is controlled elsewhere, this pin can be connected to a user defined signal. 10 RESET PORST 6.4 XC800 Family For XC800 devices the DAP, SPD and single-wire UART port availability differs across products. Table 6-4 DAP, SPD and UART Connections on the Target Board for XC800 Pin Name Device Pin Remark 2 SPD SPD/UART SPD and/or single-wire UART for Bootstrap Loader (BSL) DAP1 DAP1 If XC800 device supports 2-pin DAP. 4 DAP0 DAP0 6 USER0 user defined Can be connected with user defined signals. 8 USER1 user defined 10 RESET RESET Can be used to control the power supply if the XC800 device has no RESET pin. Application Note 14 V1.4 2014-05

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