EDUCATION. PCI Express, InfiniBand and Storage Ron Emerick, Sun Microsystems Paul Millard, Xyratex Corporation

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Transcription:

PCI Express, InfiniBand and Storage Ron Emerick, Sun Microsystems Paul Millard, Xyratex Corporation

SNIA Legal Notice The material contained in this tutorial is copyrighted by the SNIA. Member companies and individuals may use this material in presentations and literature under the following conditions: Any slide or slides used must be reproduced without modification The SNIA must be acknowledged as source of any material used in the body of any document containing material from these presentations. This presentation is a project of the SNIA Education Committee. 2007 Storage Networking Industry Association. All Rights Reserved. 2

Abstract PCI Express, InfiniBand and Storage System IO Architectures are changing to PCI Express, 10 GbE and InfiniBand. As multi-root IO Virtualization is being defined, shared IO infrastructures are on the horizon. This session discusses the impacts of all these changes on storage connectivity, storage transfer rates, as well as the implications to Storage Industry and Data Center Infrastructures. This tutorial will provide the attendee with: Basic knowledge of PCI Express and InfiniBand Technologies, System Root Complexes and IO Virtualization. Anticipated Impacts (benefits and exposures) of these Technologies on Storage Environments. IO Virtualization connectivity possibilities provided by PCI Express. 2007 Storage Networking Industry Association. All Rights Reserved. 3

Agenda Impact of Server Architectures on I/O Evolving PCI Architectures Current need to change New PCI Express based architectures Review of PCI Express I/O Evolving Beyond the Motherboard Serial Interfaces GbE & 10 GbE InfiniBand PCIe IO Virtualization Review of InfiniBand Review of PCI Express IO Virtualization Impact of PCI Express on Storage 2007 Storage Networking Industry Association. All Rights Reserved. 4

Yesterdays Architecture IO Architecture North Bridge (Root Complex) The portion of a computer chipset that connects between the CPU and the major interfaces on the computer including memory, AGP port and South Bridge. South Bridge Connects legacy I/O, USB and the PCI Bus 2007 Storage Networking Industry Association. All Rights Reserved. 5

Typical PCI Implementation 2007 Storage Networking Industry Association. All Rights Reserved. 6

Changing I/O Architecture PCI provides a solution to connect processor to I/O Standard interface for peripherals HBA, NIC etc Many man years of code developed based on PCI Would like to keep this software investment Performance keeps pushing PCI speed Moved from 32bit/33Mhz to 64bit/66Mhz, then PCI-X introduced to reduce layout challenges PCI-X 133Mhz well established Problems at PCI-X 266Mhz with load and trace lengths Parallel interfaces gradually being replaced ATA to SATA SCSI to SAS Move parallel PCI to serial PCI Express 2007 Storage Networking Industry Association. All Rights Reserved. 7

PCIe Physical Connection Higher Throughput on Fewer PINS X1 Link consists of 1 Lane or 1 Differential Pair in Each Direction Uses 4 signal Pins X16 Link or 16 Lanes consists of 16 Signal Pairs Uses 64 signal Pins (62.5 MB/pin/sec) PCIX 533 Mhz Uses 150 Pins (28.4 MB/pin/sec) PCIe - Point-to-Point Interconnect Switches provide expansion PCIe-to-PCIX Bridges provide legacy support 2007 Storage Networking Industry Association. All Rights Reserved. 8

PCI Express Overview(1 of 2) Uses PCI constructs Same Memory, I/O and Configuration Model Supports growth via speed increases Uses PCI Usage and Load/Store Model Protects software investment Simple Serial, Point-to-Point Interconnect Simplifies layout and reduces costs Chip-to-Chip and Board-to-Board I/O can exchange data System boards can exchange data 2007 Storage Networking Industry Association. All Rights Reserved. 9

PCI Express Overview(2 of 2) Receive and Transmit lanes Lane data rate Currently 2.5Gbits/sec (SDR) Lanes can be grouped 1x, 4x, 8x, 16x and 32x supported Performance roadmap Lane rates double (DDR) at Gen 2 Lane rates quadruple (QDR) proposed External expansion Cable and connector specified Geneseo enhancements to PCIe 2.0 (IDF 2006) Standard for co-processors, accelerators Encryption, visualization, mathematical modeling 2007 Storage Networking Industry Association. All Rights Reserved. 10

Sample PCIe Topology Double-click to add graphics 2007 Storage Networking Industry Association. All Rights Reserved. 11

Comparison of Freq & Slots Bus Type Clock Frequency Peak Bandwidth Number of Card Slots per Bus PCI 33 Mhz 266 MB/s @ 64 bit 4-5 PCI 66 Mhx 533 MB/s @ 64 bit 1-2 PCI-X 133 Mhz 1066 MB/s @ 64 bit 1-2 PCI-X (DDR) 266 Mhz 2131 MB/s @ 64 bit 1 PCI-X (QDR) 533 Mhz 4263 MB/s @ 64 bit 1 PCI-e x1 1 lane @ 2500 Mhz 250 MB/s FD (500 MB/s) 2500 Mbits/s @ 1 bit (8/10 bit encoding) Point to Point Switched PCI-e x8 8 lanes @ 2500 Mhz 2000 MB/s FD (4000 MB/s) 2500 Mbits/s/lane @ 1 bit (8/10 bit encoding) Point to Point Switched PCI-e x16 16 lanes @ 2500 Mhz 4000 MB/s FD (8000 MB/s) 2500 Mbits/s/lane @ 1 bit (8/10 bit encoding) Point to Point Switched 2007 Storage Networking Industry Association. All Rights Reserved. 12

Comparison of Freq & Slots Architecture Type Clock Frequency Peak Bandwidth Number of Card Slots per Bus PCI-X 133 Mhz 1066 MB/s @ 64 bit 1-2 PCI-X (DDR) 266 Mhz 2131 MB/s @ 64 bit 1 PCI-X (QDR) 533 Mhz 4263 MB/s @ 64 bit 1 PCIe 1.1 x8 Gen 1 8 lanes @ 2500 Mhz 2000 MB/s FD (4000 MB/s) 2500 Mbits/s/lane @ 1 bit (8/10 bit encoding) Point to Point Switched PCIe 2.0 x8 Gen 2 8 lanes @ 2500 Mhz 4000 MB/s FD (8000 MB/s) 5000 Mbits/s/lane @ 1 bit (8/10 bit encoding) Point to Point Switched 2007 Storage Networking Industry Association. All Rights Reserved. 13

Throughput Requirements Adapter Type Quad Gb Ethernet Expected Throughput 3.6+ Gb/s Theoretical Maximum Released Data Center Rollout 424 MB/s Now Now 10 GbE Port 9+ Gb/s FD 1275 MB/s Now 2006 10 Gb iscsi w/ TOE 9+ Gb/s FD 1275 MB/s 2006-7 2007-8 InfiniBand 4X-SDR 7 Gb/s 8 Gb/s Now 2005-6 (clustering) InfiniBand 4X-DDR 15 Gb/s 16 Gb/s Now Now SAS 2.0 Quad Port 21+ Gb/s 24 Gb/s 2007 2009 4 Gb FC Port 8 Gb FC Port 400 MB/s (800 MB/s FD) 800 MB/s (1600 MB/s FD) 425 MB/s (850 MB/s FD) 850 MB/s (1700 MB/s FD) 2005 2006 2008 2009 Maximum requirements met using PCI Express PCIe x8 (Gen 1), provides 2000 MB/s Full Duplex (4000 MB/s) PCIe x8 (Gen 2), provides 4000 MB/s Full Duplex (8000 MB/s) 2007 Storage Networking Industry Association. All Rights Reserved. 14

Benefits of PCI Express Lane expansion to match need x1 Low Cost Simple Connector x4 or x8 PCIe Adapter Cards x16 High Performance Graphics Point-to-Point Interconnect allows for: Extend PCIe via signal conditioners and repeaters Optical & Copper cabling to remote chassis External Graphics solutions External IO Expansion 2007 Storage Networking Industry Association. All Rights Reserved. 15

PCI Express 1.x In Industry First Release of Slots in 2005 x16 High Performance Graphics x1 Low Cost Simple Connector Desktop Systems Systems Currently Shipping Desktops with multiple x16 connectors Servers with multiple x8 connectors Cards Available x4, x8 cards 10 GbE, Dual/Quad GbE, 4 Gb FC, SAS, IB X16 High Performance Graphics @ 150 W 2007 Storage Networking Industry Association. All Rights Reserved. 16

PCI Express 1.x In Industry Infrastructure Built PCIe Switches Multi-ported Root complex based PCIe-to-PCIX Bridges Provides access for Legacy Devices PCIe 1.0 Components Switches Bridges Endpoints 2007 Storage Networking Industry Association. All Rights Reserved. 17

PCI Express Roadmap PCIe 1.0a/1.1 Shipping now PCIe 2.0 Spec is Approved First slots will ship in late 2007 PCIe 2.0 cards backward compatible PCIe IOV Spec Under Review Independent of 1.1 or 2.0 Architecture allows shared bandwidth 2007 Storage Networking Industry Association. All Rights Reserved. 18

Evolving I/O Architectures Processor speed increase slowing Multi core processors increasing Requires multi root complex architectures Requires high speed interface for interconnect Minimum 10G data rates Must support backplane distances Bladed systems Single box clustered processors Need backplane reach, cost effective interface to I/O Options Use an existing I/O interface like 10G/Infiniband Enhance PCI Express 2007 Storage Networking Industry Association. All Rights Reserved. 19

Existing Serial Interfaces Established external transport mechanisms exist Fibre channel Storage area network standard 10G Ethernet Provides a network based solution to SANs InfiniBand Choice for high speed process to processor links Supports wide and fast data channels SAS Serial version of SCSI offers low cost solution No need to add to these yet another solution PCI Express is not intended to replace these But backplane I/O must support these bandwidths 2007 Storage Networking Industry Association. All Rights Reserved. 20

Backplane Serial Interfaces Inside the box no clear solution today 10G Ethernet Provides a network based solution to SANs InfiniBand Choice for scalable, high speed, low latency processor to processor links Supports wide and fast data channels PCI Express Requires multi root complex support Will it be 10GbE, InfiniBand or PCIe IOV? 2007 Storage Networking Industry Association. All Rights Reserved. 21

10G Ethernet or InfiniBand? 10G Ethernet May seem like the obvious choice, but currently lacks QoS mechansims required Direct interface to root complex Low overhead stack Discussed in detail in separate SNIA tutorial InfiniBand Has established stack Has higher speed capability SDR,DDR and QDR data rates 4x to 12X widths 500 MB/s to 6 GB/s Requires closer examination 2007 Storage Networking Industry Association. All Rights Reserved. 22

InfiniBand HW Architecture Physical Layer (SDR) 2.5 Gb/s signaling rate Multiple Link Widths 1X, 4X, 12X (2.5, 10, 30 Gb/s) Distance Copper 15 M 4x SDR, 10 M 12x SDR Optical 150 M (12X) Topology Connection Orientated, Switched Fabric 64K Nodes per Sub-net Multiple subnets bridged w/router IPV6 addressing x-subnet DDR - Doubles the Signaling Rate 2007 Storage Networking Industry Association. All Rights Reserved. 23

InfiniBand Started As... 2007 Storage Networking Industry Association. All Rights Reserved. 24

InfiniBand As Rolling Out Application Clustering Inter-Tier & Inter-Processing Communications Gateways, Routers, Bridges & Switches 2007 Storage Networking Industry Association. All Rights Reserved. 25

InfiniBand Possibilities Blade Applications Inter-Tier Communications Switched Gateway to Storage Switched Gateway to Ethernet 2007 Storage Networking Industry Association. All Rights Reserved. 26

InfiniBand Implemented IB HCAs for Clustering IB Switches IB to Ethernet Gateways IB to FC Gateways IB Attached Storage Still Under Consideration Additional IB Gateways IB as Blade Backplanes 2007 Storage Networking Industry Association. All Rights Reserved. 27

Drivers for PCI Express IOV Interface speeds are increasing Ethernet moving from Gigabit to 10G and FC from dual 2 Gb to dual 4/8 Gb Single applications struggle to supply enough bandwidth to fill these links Processor speed growth is being replaced by multiple core processors Requires applications to share these links PCI Express IOV would allow this to happen High Availability Increasing in Importance Requires duplicated processors, IO modules and interconnect Use of shared virtual I/O simplifies and reduces costs and power Shared I/O support N+1 redundancy for I/O, power and cooling Remotely re-configurable solutions can help reduce operating cost Hot plug of cards and cables provide ease of maintenance PCI Express Modules with IOV enable this Growth in backplane connected blades and clusters Blade centres from multiple vendors Storage and server clusters Storage Bridge Bay hot plug processor module PCI Express IOV allows commodity I/O to be used 2007 Storage Networking Industry Association. All Rights Reserved. 28

How PCI Express IOV works Multiple root complexes share a single I/O Virtualization occurs in the PCIe switch and I/O card Device drivers remain almost unchanged Requires additional management Allows bandwidth allocation Supports hot plug Supports remote configuration PCI Express IOV Sig Initial specification 2007 PCIe Switch Server Server Server I/O Platform HCA NIC NIC NIC NIC HBA HBA HBA HBA HCA SAN LAN / WAN 2007 Storage Networking Industry Association. All Rights Reserved. 29

Virtualization in practice Applications Virtualization & Service Provisioning Layer 1U & Blade Servers Systems Storage Systems Storage IO Blades Scalable Interconnect Switch Shared Network IO Blades SAN LAN MAN WAN Hardware Accelerators 2007 Storage Networking Industry Association. All Rights Reserved. 30

Express Module (EM) Developed by the PCI-SIG (formally Server IO Modules) Fully compatible with latest PCI Express specification Designed to support future generations of PCI Express Adds the necessary hot plug hardware and software Commodity pricing model using standard PCI Express silicon and ½ size card PCIe EM Products available today providing: SAS internal/external FC External GbE External 10 GbE External IB External 2007 Storage Networking Industry Association. All Rights Reserved. 31

Impact / Benefit to Storage PCI Express provides Full Bandwidth Dual Ported 4 Gb FC Full Bandwidth SAS Legacy Support via PCIX IOV takes it one step further Ability for System Images to Share IO across OS Images Backplane for Bladed Environments Extension of PCIe Possible PCIe attached storage devices 2007 Storage Networking Industry Association. All Rights Reserved. 32

Future Storage Attach Model PCIe Slot Host System 100 M PCIe Optical Cable SCSI Command Set on Host Encapsulated for PCIe PCIe from Host Slot Over Card with Signal Conditioner Across 100 Meter Optical Cable Into PCIe Slot in Disk Subsystem Disk Controller PCIe ASIC PCIe Encapsulation is Stripped Off Raid Controller to Correct Protocol to Disk (Conceptual Only at this time) Disk Subsystem PCIe Slot Disk Controller ASIC PCIe to FC or SAS/Sata FC Drive SATA/ SAS Drive 2007 Storage Networking Industry Association. All Rights Reserved. 33

Glossary of Terms PCI Peripheral Component Interconnect. An open, versatile I/O technology. Speeds range from 33 Mhz to 266 Mhz, with pay loads of 32 and 64 bit. Theoretical data transfer rates from 133 MB/s to 2131 MB/s. PCI-SIG - Peripheral Component Interconnect Special Interest Group, organized in 1992 as a body of key industry players united in the goal of developing and promoting the PCI specification. IB InfiniBand, a specification defined by the InfiniBand Trade Association that describes a channel-based, switched fabric architecture. 2007 Storage Networking Industry Association. All Rights Reserved. 34

Glossary of Terms Root complex the head of the connection from the PCI Express I/O system to the CPU and memory. HBA Host Bus Adapter. IOV IO Virtualization Single root complex IOV Sharing an I/O resource between multiple operating systems on a HW Domain Multi root complex IOV Sharing an I/O resource between multiple operating systems on multiple HW Domains 2007 Storage Networking Industry Association. All Rights Reserved. 35

Q&A / Feedback Please send any questions or comments on this presentation to SNIA: tracknetworking@snia.org Many thanks to the following individuals for their contributions to this tutorial. SNIA Education Committee Walter Dey Ron Emerick Howard Goldstien Skip Jones Paul Millard Rob Peglar 2007 Storage Networking Industry Association. All Rights Reserved. 36