Integrating PCI Express into the PXI Backplane

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1 Integrating PCI Express into the PXI Backplane

2 PCI Express Overview Serial interconnect at 2.5 Gbits/s PCI transactions are packetized and then serialized Low-voltage differential signaling, point-to-point, 8B/10B encoded Multiple lanes can be grouped together to form links x1 (by 1) has bandwidth of 250 MBytes/s/direction x16 (by 16) has bandwidth of 4 GBytes/s/direction Uses same software model as PCI Ensures software compatibility Roadmap for longevity with Gen-2 clocking (5 Gbits/s)

3 Bandwidth vs. Latency Increasing (Improving) Bandwidth Max Bandwidth (MB/s) Good Better PCI Express (x4) 1000 PCI/PXI (32/33) Gigabit Ethernet 100 USB 2.0 IEEE 1394a Fast Ethernet VME/VXI 10 GPIB (HS 488) USB 1.1 GPIB (488.1) Approximate Latency (µs) Best Decreasing (Improving) Latency

4 Dedicated Bandwidth per Device

5 PCI Express Industry Adoption First PCI Express desktops shipped mid 2004 First ExpressCard laptops shipped early 2005 PCI and PCI Express are side-by-side in all Intel/Dell roadmaps Primary consumer drive is graphics processing (gamers, video editing) PCI Express x16 replacing AGP

6 PCI Express Advantages Software compatibility with PCI High bandwidth (up to > 4 GBytes/s) Scalable bandwidth Dedicated bandwidth per slot Low latency Peer-to-peer communication Long life (20+ years in mainstream market)

7 Integrating PCI Express into the PXI Backplane Backwards compatibility Complete software compatibility Hybrid slot definition - install modules with either PCI or PCI Express signaling in a single slot Up to 6 GBytes/s backplane and 2 GBytes/s slot bandwidth Enhanced synchronization capabilities 100 MHz differential clock, differential triggering

8 PXI and Hybrid Slots Ensure Compatibility

9 Compatibility of PXI and Hybrid Slots x8 PCIe (up to 2 GB/s) Differential Clk. 100 & Star Triggers Power Trigger Bus Star Trigger Clk /33 PCI (132 MB/s per system) Reserved Pins 64/66 PCI Local Bus (typically unused) Hybrid PXI

10 Creating a Hybrid Slot Compatible PXI Module J2 1. Start with a PXI peripheral module J1

11 Creating a Hybrid Slot Compatible PXI Module 1. Start with a PXI peripheral module 2. Depopulate J2 J1

12 Creating a Hybrid Slot Compatible PXI Module XJ4 J1 1. Start with a PXI peripheral module 2. Depopulate J2 3. Populate XJ4

13 Hybrid Slot Flexibility PXI Express Peripheral Module 32-bit CompactPCI Module Hybrid Slot Compatible PXI Module

14 Increased BW Enables New Applications PXI applications requiring PCI bandwidth General purpose automated test (DMMs, switching, baseband instruments, etc) General purpose data acquisition (AI, AO, DIO, etc) Bus interfaces (CAN, 1553, ARINC, etc) Motion control PXI applications requiring PCI Express bandwidth High frequency, resolution IF / RF systems High speed digital interfaces High channel count data acquisition High speed imaging

15 100 MHz Differential CLK PXI PXI Express Star Trigger SYNC MHz CLK PXIe System Controller PXIe System Timing Controller SYNC Control PXIe Peripheral Hybrid Peripheral PXI Peripheral Differential Star Triggers PXI Trigger Bus (8 TTL Triggers) PXI Express Timing & Synchronization Backplane

16 PXI Express Software Specification Retains software compatibility with PXI, CompactPCI, and other PCI-based devices Adds system-level management software extensions: System-level geographical addressing Slot type / capability identification Chassis monitoring (temperature, fan speed, etc)

17 PXI Specifications PXI-1 PXI-2 PXI-3 PXI-4 PXI-5 PXI-6 PXI Hardware Specification PXI Software Specification VISA for PXI Specification Module Description PXI Express Hardware Specification PXI Express Software Specification

18 Timeline and Organizations PCI Industrial Manufacturers Group (PICMG) January 2003: CompactPCI Express research began April 2004: CompactPCI Express specification development officially began June 2005: CompactPCI Express (EXP.0) specification passed February 2006: First chassis and controllers released PXI Systems Alliance (PXISA) May 2005: PXI Express specification development officially began June 2005: PXI-1 ECN for hybrid-slot-compatible PXI modules passed August 2005: PXI-5 PXI Express hardware specification passed September 2005: PXI-6 PXI Express software specification passed April 2006: First chassis and controllers released August 2006: First peripheral modules released PXI Express and CompactPCI Express product rollout throughout 2006/7

19 PXI Express Summary PXI Express integrates PCI Express into PXI Up to 6 GBytes/s backplane bandwidth Up to 2 GBytes/s slot bandwidth PXI Express maintains backwards compatibility with PXI Software compatibility Hardware compatibility with hybrid slots and hybrid systems PXI Express opens new applications to the PXI platform

20 Please Questions to

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