Productivity improvement for dry etch equipment through the application of simulation

Productivity improvement for dry etch equipment through the application of simulation Sandro Pampel Jörg Domaschke Harald Jetter Infineon Technologies Dresden Infineon Technologies Munich Infineon Technologies Munich Abstract The standards of the semi-conductor market with its specifications are leading to a basic demand for an increase in productivity. On a department level, this can be achieved above all through an increase in equipment throughput and/or in an increase in wafer starts at constant and/or less clean-room area used by the process group. Through simulation of Clustertools in various operation modes, possibilities were found to improve the operation of this equipment. In addition, Infineon Dresden was able to examine different hardware configurations in the dry etch sector. In concrete examples, discrete event simulation results of Clustertools showed possibilities for throughput increases and performance improvements of up to 20%, thus supporting the decisions for capacity developments and hardware alterations. The comparison with data from on-tool tests verified the simulation software and its results. Important general findings on the behaviour of Clustertools will be introduced. Index Terms: Clustertools, Simulation, Productivity Enhancement I. INTRODUCTION In the past, and indeed in the future as well, Clustertools were and will be an important part of production lines in wafer fabs. Nowadays in particular, it is necessary to control the risks of the semi-conductor market through a wider range of products and better productivity. High standards are therefore being demanded of the individual production divisions with regard to stability of the and flexibility in equipment allocation. Multi-chamber equipment is predominant in sectors with required individual wafer processing, which enables a parallel treatment of the wafers. Two different types of Clustertools are thus produced through two different methods of operation. Type 1 various operational stages pass through one after another from the wafer within the machine into different chambers, whereby exact wafer sequencing is prescribed. Redundant process modules can be in existence at each stage of the operation. The main feature of this Clustertool is the sequencing of several process stages on the wafer in different chambers, without the wafer leaving the equipment (traditional Clustertool operation modes, as in [6]). Type 2 An allocation of the chambers at the mainframe takes place at various process steps for reasons of economic utilization of the equipment at hand and for the establishment of backups on other mainframes to safeguard a minimum throughput if the equipment of the defined process step would fail. The processing of the lots takes place to a large extent in a parallel mode. The individual wafer does not experience any linear sequencing of the processing in the chambers as a result of process stages. Combinations of Type 1 and Type 2 are possible in individual cases, which, however, do not affect the core statements of this report. Up to now, throughput performance analyses were done on the basis of experience, throughput curves from the vendor or on-tool tests. However, throughput as a function of equipment configuration, control rules, individual wafer routing and recipe times were not considered. In this paper, we show that simulation of cluster tools is one possibility of getting a better understanding of cluster tool behavior and improving the accuracy of throughput calculations. A simulation study was conducted by the dry etch department to solve the following problems: evaluate an optimized process mix for a given number of process steps n and mainframes x with a maximum number of processed wafers per time at the bottleneck tool of the equipment group; determine the most effective wafer sequencing mode for a cluster tool with specified process mix; analyze the impact of recipe and hardware changes on throughput; optimize operator handling; cost benefit analysis for further hard- and software upgrades The aim of the simulations therefore consists in our case of the application of an existing simulation software in concrete individual cases on real, existing tools and the support of planning and optimizing functions in production [5]. Solution approaches to eliminate any occurring 1

transportation or processing conflicts, such as the implementation of additional redundant chambers or robots [2], or the programming of any kind of scheduler whatsoever for wafer sequencing supported by object-orientated modeling [4] were not tested. These approaches should be examined in the construction and equipment testing phase at the factory and/or integrated in the process of continuous improvement and require more global examinations. II. ANALYSIS/SOLUTIONS A) Modeling For simulation of the equipment, flexible standard simulation software can be applied, in which functions for the description and analysis of Clustertools were integrated. Further adaptations of the software were necessary to model real equipment. Basis components of the models are two in/output load locks to cushion the lots, each with 25 wafers, 3-4 individual process chambers and one wafer handler (robot). Robot configurations such as Single Blade und Dual Blade Robot were also examined. Hardware differences like an additional aligner chamber for wafer alignment or the variation of the On-the Fly-Centerfinding of the wafer without aligner chamber are part of the models. With the aid of the applied software and the discrete deterministic simulation models, all processing and access sequences given by the manufacturer (logic of the handler access on the lots in the load locks), including their priorities for serial and parallel processing of the lots, were able to be portrayed and examined. Fixed access ratios on parallel lots were therefore just as eligible for consideration as Push (loading the chamber has a higher priority than unloading the chamber) or Pull- (unloading the chamber has a higher priority than loading the chamber) prioritizing. B) Input Data To form the model, the following input data was recorded with a system accuracy of 1s: - Process times - Pump and vent times - Handler times with and without wafers - Chamber handling times All times provided by the equipment were allocated to the corresponding process or transportation time modules. These time components form the basis of handling the individual wafer and differ in functions running one after the other or parallel to each other. First comparisons of on-tool tests with simulations showed that a high degree of data accuracy is necessary. Even slight deviations in the individual chamber handling times from each other and/or from the simulation assumptions led, as in [3], to extreme influencing of the wafer throughputs. This circumstance was taken into account by separate consideration of the handler times of each chamber. Mainframe-related data such as pump and vent times varied from tool to tool, but were more or less constant in the individual tool. They therefore were defined as constants, as did the assumptions for operator handling (MoveIn, MoveOut). Variations in process times occurred in the on-tool test in degrees of ~2% within a lot. The influence of the individual chamber process times on the simulation result was minimized by forming an average value on the process times of all the wafers of a lot. Wafer throughputs simulated in this manner at different constant process times showed good conformity with the on-tool tests. Regression models suggested in [3] were therefore balanced out by the practice data being linked more closely. C) Simulation results Optimization of chamber occupancy for a discrete amount of equipment In a demonstration example, n=4 were accepted with recipe times of 30, 60, 120 and 180s. These were spread over an amount of x= 5 mainframes (MF) and 4 process modules () in such a manner that from a line point of view a maximum amount of wafers can pass the tool group per day. Premises were: - each process has a backup on another MF; - only one layer is processed at a time; - there are no differences in the hardware. On the basis of static equipment planning, which orientates itself on the ratio of the process times (30/60/120/180? 1:2:4:6), the following chamber ratio was determined, taking the backup into consideration: 180s 120s 9Ka 6Ka 3Ka 2Ka Subsequently, configurations (1) und (2), which had to be examined through simulation with regard to throughput/time unit, were able to be worked out by using the knowledge base as regards Clustertool throughput (Cap.1). The result was a maximum throughput of 1490 wf/day at the bottleneck operation n=3 (). A comparison of the variants thus showed that variant 2 was better than variant 1 by 8%. The example demonstrates the capability of simulations for the examination of planning operations in relatively limited and easily comprehensible areas of application. 2

configuration 1 configuration 2 MF 1 MF 1 180s 180s 180s 180s 180s 180s 180s 1 2 3 4 1 2 3 4 MF 2 MF 2 180s 180s 180s MF 3 120s 120s 120s MF 4 120s 120s MF 5 180s 180s 180s 120s MF = Mainframe = Process Module 120s 120s 120s MF 3 180s 180s 180s MF 4 120s 120s 120s MF 5 180s 180s Cap. 1. Process-mix at Clustertool for simulation Due to the throughput variance depending on the multitude of possible disturbance factors and through the required high degree of accuracy of the Input data, it is not possible to replace the static equipment planning. - Most effective sequencing mode/operator handling An existing Clustertool with 4 process chambers (Cap. 2), a single-blade robot and 2, which were each allocated to two chambers, had to be examined as regards optimization of the total tool throughput and/or optimized processing of one or the other recipe in the case of a bottleneck. C A -process module pr.1/2 -process1/2 LL-Loadlock pr.1 pr.1 LL A Cap. 2: Clustertool configuration pr.2 LL B B pr.2 D Alignerchamber r The recipes differ through a shorter and a longer processing time. Wafer handling sequences stipulated by the system software in parallel operation were split up through knowledge of the deposited logic into sensible and less sensible. As regards the sensible ones, the Parallel Mode with access on the lots with a fixed ratio (Mode 1) and the Mode with access on the lots depending on deposited fixed times (Mode 2) crystallized in the end. These Modes were examined with regard to throughput optimization. The results are shown in Cap. 3. The possibility of prioritizing recipe 1 or 2 in the case of a bottleneck while simultaneously processing the other recipe is clearly recognizable. TP (%) TP (%) TP (%) Recipe 1 Recipe 2 TOTAL Ratio short long 4:1 100% 82% 100% 3:1 87% 92% 93% Mode 1 5:1 88% 85% 92% 4:2 79% 100% 90% 2:1 80% 99% 90% Mode 2 79% 98% 89% Cap. 3: Simulation results to determine the most effective sequencing mode The comparison of the modes shows for Mode 2 with regard to the total equipment-throughput non optimal conditions ( caused by higher priority of the short recipe) with corresponding advantages for a more constant work off of both recipe steps. Visualisation of the simulation results by means of Gantt chart enabled a targeted instruction of operator staff in view of the usage of the optimal operator mode and optimized equipment loading. - impact of recipe and hardware changes on throughput Alterations in recipe time mean alterations to one of the main modules of the simulation input and can have a partially extreme influence on the system throughput. If the alteration in its size is foreseeable with any degree of certainty, the influence on the tool throughput can be determined straight away. As before, the aim is supporting the static planning with a few basic statements. The static tool planning can be controlled later by the possible variance of the recipe times and/or system settings and their significant influence on the throughput by means of on-tool tests. - hardware changes/ cost-benefit analysis The results of the simulations of a 4-chamber system with single-blade robot and different hardware configurations and/or priority allocations are portrayed in Cap. 4. All 4 equipment chambers were operated with the same recipe in a serial processing mode. The curves clearly show an area with almost horizontal curve path during very short recipe times. Here, according to its configuration, the system is in an absolute handler limit, i.e. the robot is constantly busy processing the outstanding jobs. The best results were achieved in the handler limit through a configuration with On-The-Fly- Centerfinding and the Pull principle. At first glance this may appear strange, but it is through a Push principle and task processing with FIFO (First In-First Out) that a loading of the chambers is furthered and empty chamber periods are reduced. The solution of the problem lies in non-parallel running indexer movements in the load lock, which leads to delays. At any rate, the prioritizing of the job processing (FIFO or LIFO) seems to have an important influence on throughput with very short 3

recipe times, since with LIFO (Last In First Out) some chambers were partially deadlocked (short recipe times area). throughput very short short Input of hardware- changes and changes of priorities on throughput at an 4- chamb.- Single Blade-robot- tool ( simulation results) long w/ Aligner + Pull w/ Aligner + Push w/otf +Pull w/otf +Push FIFO w/ OTF +Push LIFO process time Cap. 4: Input of hard and software changes on throughput for single-blade robot The advantage of an On-The-Fly configuration as opposed to an Aligner configuration at short to medium recipe times is obvious. Only through having to pass through certain points in the OTF (OTF bases) do Aligner configurations develop their slight advantage from a throughput point of view (max. 8%). Severe throughput fluctuation occurred depending on the recipe time, in particular in the Pull mode and with shorter recipe times, both in the simulation and the on-tool test. That led to throughput deviations of up to 15%. The reason for this is the discontinuity in the flow of wafer, brought about by occurring transportation problems. These originate primarily through the simultaneity of occurring events for the robot and destroy the periodicity and regularity of the wafer flow. The chambers are loaded as a more or less coincidental mix between Pull and Push, which roughly explains the sawtooth function of the curves. Validation of simulation results at 4- chamb.- Single Blade-robot- tool w/ OTF On- Tool-Test Single Blade with OTF + Push LIFO validation of the simulation results through on-tool tests. Additional examinations compared a 3-chamber system with double-blade robot and OTF with a similar kind of system with Aligner chamber and Pull mode. The following statements can be made generally on this point ( Cap. 6): - the handler limit of a system with double-blade robot and OTF is around 50% higher than with a system with Aligner chamber. - the advantage of the double-blade robot develops particularly in the practice-relevant area of very short and short recipe times and brings throughput gains of 6-50 %. - during long recipe times the equipment is in a state of throughput process limitation. A refitting with double-blade robot does not appear to be economically sensible. - due to the second blade, double-blade robots always run in Push-Mode. - the throughput behavior of a double-blade variant compared to an improved single-blade variant with Push Mode has to be assessed by continued investigations. On the other hand, these observations should be used as the basis for a cost benefit analysis, since a retrofitting of existing installations in particular can prove to be very cost-intensive. Throughput Input of hardware- changes on throughput at an 3- chamb.- Double Blade- robot- tool ( simulation results vs. On Tool- test ) very short recipe time short On-Tool-test w/ Aligner On-Tool-test w/otf Simulation w/aligner Simulation w/ OTF Simulation w/ OTF enhanc. Cap. 6: Input of hardware-changes on throughput for double-blade robot/validation of results Throughput very short short long process time w/ OTF +Push LIFO Cap. 5: Validation of simulation results The Push-Mode with a FIFO prioritizing, in particular in the practical relevant sector of short to medium recipe times, brought throughput gains of up to 15%! A cost benefit analysis carried out according to this principle on a commercial basis showed an economically significant Effect/Cost- Ratio of 11. Cap. 5 shows the implemented III. CONCLUSION/RECOMMENDATIONS The simulation results were verified to a very large extent by on-tool tests. The influence of hardware alterations and/or changes in the wafer-sequencing priorities was able to be detected. In the area of very short recipe times (handler limit), certain hardware changes bring quantizably positive effects on the system throughput. In our opinion, changes to the system software (priorities, job processing), or also implementing schedulers described in [2] und [4] have only a slight, hardly detectable influence due to the sensitivity of the hardware. Changes of this kind are far more important in the medium processing times sector, i.e. where the throughput is influenced by the handler. Here, throughput gains can be achieved through skilful 4

allocation of rules, priorities or a corresponding control of the wafer flow. In this sector, the future certainly belongs to the scheduler in charge of chamber wafer handling, as constant wafer flows can be achieved through this, regardless of delays, system errors, etc. Problem points with today's schedulers consist of a high degree of dependency on necessary system data and an often lacking "look ahead" strategy, which leads to delays in the wafer flow. New transportation concepts surely have to be developed by the system manufacturers for rising wafer throughputs, as the existing ones have reached the limits of their physical-mechanical possibilities. An application of simulations and the utilization of user experience in conceiving and developing new systems are of use to both sides. Among other things, equipment interfaces, which allow all necessary simulation inputs to be read quickly, filtered by means of evaluation software and converted into a format suitable for simulation- SW, should also be re-defined. The introduction of an extensively automated data transmission at this point is the basis for simulations on a wider basis for the examination of questioning on a work-floor level and is also the foundation of continuous equipment control and improvement activities. [4] Yong-Ho Shin/ Ja-Hee Kim: "Modelling and Implementation of a Real-Time Embedded Scheduler for CVD Clustertools" Manufacturing, Phoenix, Arizona 2000, p.78 [5] S.Brown/ J.Domaschke: "An Integrated Modelling Approach for Managing Semiconductor Manufacturing Operations" [6] M.Dümmler 1999: "Using Simulation and Genetic Algorithms to Improve Clustertool-Performance", Proceedings of the 1999 Winter Simulation Conference, p.875 IV. ACKNOWLEDGEMENTS We would like to express our grateful appreciation to all those who participated in this project, especially to the Department leaders of the ETCH and Operational Excellence dep., Mr. Stoschek, Mr. Rebitzer, Mr. Greenberg and Mr. Raul Martin, Santa Clara, Mr. Stolze and all the Applied Materials On-Site Team for their valuable suggestions and great support of this subject. V. REFERENCES [1] B. Lemmen/ E.J.J.van Campen 1999: "Clustertool optimization through scheduling rules" IEEE International Symposium on Semiconductor Manufacturing Conference Proceeding, Santa Clara, California p.89 [2] H. Oh 2000: "Conflict Resolving Algorithm to Improve Productivity in Single-Wafer Processing", Manufacturing, Phoenix, Arizona 2000, p.55 [3] D. Ruppert/ L. Schruben: "Meta Modelling of a Clustertool-Simulator" Manufacturing, Phoenix, Arizona 2000, p.67 5