High speed pattern streaming system based on AXIe s PCIe connectivity and synchronization mechanism

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High speed pattern streaming system based on AXIe s connectivity and synchronization mechanism By Hank Lin, Product Manager of ADLINK Technology, Inc. E-Beam (Electron Beam) lithography is a next-generation maskless semiconductor manufacturing process. Being maskless, it eliminates diffraction limitations found in current photolithography for 20nm or smaller processes. E-Beam lithography requires a data streaming system with very high throughput that simultaneously transfers massive amounts of pattern data from a data server, processes the data, while outputting to an E-Beam tool. The E-Beam tool itself interfaces through thousands of fiber optic channels and requires channel-to-channel skew less than 2ns. Based on the challenging density and performance requirements, ADLINK chose the AdvancedTCA Extensions for Instrumentation and Test (AXIe) architecture to implement E-beam streaming. This article describes how the AXIe platform was leveraged to achieve these demanding density and synchronization requirements. As noted above, E-Beam lithography eliminates diffraction limitations found in traditional photolithography. The concept is much like a printer, but at breathtaking speed. Instead of ink, thousands of parallel electron beamlets write a pattern directly onto surface of the wafer, itself covered with photoresist. The E-Beam system is controlled through 8,000 optical channels that control a MEMS blanker array, essentially turning an individual beam on or off. The resolution of the lithography demands that the channel to channel skew between the 8,000 optical channels not exceed 2ns. Manufacturing throughput demands 10 wafers to be processed per hour, or one every 6 minutes. Each mask file can have as much as 2.5TB, which must be transferred to the pattern streaming system in real time. This data is then processed by the system, which is turn drives the 8,000 optical channels controlling E-Beam system. To achieve these requirements, ADLINK created an FPGA-based AXIe system for data processing and storage.

Why AXIe? AXIe is an open standard that extends AdvancedTCA* (Advanced Telecom Computing Architecture) for high performance instrumentation. Particular aspects of AXIe that enabled ADLINK to meet these stringent requirements were: A large board size that provides sufficient space for high-density fiber optical channels. Designed for high-power applications of up to 200 Watts per slot, utilizing a single rail power supply. Good thermal performance with high performance air cooling system High-speed (PCI Express) data fabric Flexible scalability and rack-space efficiency. One AXIe chassis can contain one to 14 slots arranged vertically or horizontally, and multiple chassis can be configured to implement a high-channel-count synchronized system. Hardware platform management features, including Shelf Management Controller, Intelligent Platform Management Controller, and hot swap capability Synchronization and local bus features bring precision clocks to each slot Figure 1: AXIe Bus Distribution

Pattern Streaming Structure The Pattern streaming system comprises a computer module, switch module, multiple streamer modules, a 14-slot AXIe chassis, an external synchronizer, and a RAID box as shown in Figure 2. The computer module accesses the data file from the data center, and then loads the RAID box with the patterns for a specific wafer through the 6Gb SAS link, which it then accesses during the actual lithography. The switch module is a fabric switch placed in the hub slot. It routes the high-speed data coming from the computer module to the appropriate streamer module. Each of the 12 streamer modules can support 72 optical fiber output channels. The synchronizer is used to synchronize multiple chassis by using clock and trigger distribution. Most of the unique features of AXIe are utilized in the pattern streamer system, including PCB outline and assemblies, hardware platform management and monitoring mechanism, power distribution scheme, active cooling system, and data transfer interface. Horizontal and vertical alignment used in the E-Beam system requires more complicated synchronization, and deploys the AXIe STRIG and SYNC signals. This point to point trigger system allows very precise and low jitter synchronization to each slot. Channel-to-channel skew For the E-Beam system, a maximum 2ns channel-to-channel skew is guaranteed by the hardware design. Starting at the synchronizer, low skew clock fan-out buffers are used to distribute the clock and synchronization signals from the synchronizer to the switch module in each chassis. Besides being the hub point for the, the switch module is also the hub for the STRIG, SYNC, and associated clock signals. These distribute the timing signals to each slot where the streamer modules reside. On the streamer modules, care is taken to use equal trace lengths for all timing and data signals while utilizing low-skew buffers. Avago parallel-fiber-optic transmitters (AFBR-810BHZ-TX) are deployed for the final optical generation. After considering the skew effect of FPGA, optical fiber, connector and PCB trace, calculated maximum channel-to-channel skew is 1ns.

Figure 2: Streaming system architecture Figure 3: Single AXIe chassis fully loaded with 12 streamer modules

RAID SAS/ Data Center 10G Ethernet RAID SAS/ Computer Blade 10x Chassis Computer Blade Switch Board Switch Board AXIe Streamer 12 Pattern Streamers AXIe Streamer AXIe Streamer 12 Pattern Streamers AXIe Streamer 14-slot AXIe Chassis Trigger Reference Clock Clock & Trigger Distribution Amplifier 14-Slot AXIe Chassis Figure 4: System block diagram System Capacity: 10 Chassis, 10 RAID, 10G Ethernet to Data Center 120 pattern streamers 360 Stratix IV FPGAs 8640 optical transmitters High throughput of Pattern Streaming Besides the tight timing required across 10 chassis, the system also demands massive real time data flows to the optical channels. Four powerful FPGAs on each pattern streamer module include one at the interface, and three that drive 24 optical channels each, or 72 within a single slot. The pattern is first read out from the RAID storage to the computer blade memory. It is then transferred via DMA (Direct Memory Access) to the appropriate streamer module. The FPGA on the streamer module performs the receiving DMA and stores the data onto onboard flash buffers. It is then transferred to DDR3 DIMM storage associated with each pattern streaming FPGA. The pattern streaming FPGAs also perform custom decompression and control of the optical transmitters.. The block diagram is shown in Figure 5:

AXIe Clock AXIe Trigger Bus Buffer Buffer 72bits@400MHz 72bits@400MHz FPGA1 EP4SGX360KF40C2N GHz LVDS 72bits@400MHz 72bits@400MHz FPGA2 EP4SGX360KF40C2N GHz LVDS FPGA4 IF EP2AGX65DF29C5N Gen1 x4 PATA 16GBx6 Flash 72bits@400MHz 72bits@400MHz FPGA3 EP4SGX360KF40C2N GHz LVDS Memory Buffer Intelligent Platform Management Controller IPMB Figure 5: Pattern Streamer Board Block Diagram The DDR3 memory is portioned into two banks, which allows a ping-pong technique to optimize the read/write bandwidth. Each optical channel pattern size can be up to 300MB, or 260GB for a fully loaded chassis. Completion of the file transfer in 6 minutes requires an aggregate bandwidth of 725MB/s, which is supported through combined architecture of the computer module, switch

fabric, and pattern streaming modules. It should be noted that a pattern for a completely different wafer may be downloaded while the current pattern is driving the E-beam machine. This allows for high throughput manufacturing in a high mix environment. Summary ADLINK s FPGA-based AXIe pattern streaming system provides an extremely effective solution for pattern data processing and storage for maskless E-Beam applications, delivering less than 2ns overall channel-to-channel skew and production capable data transfer throughput. The AXIe system architecture was critical in delivering both high aggregate data rates along with tight timing synchronization across multiple chassis. AXIe also delivers the power, cooling and board area needed for the high speed electronics on each streaming module along with high reliability and scalability. *AdvancedTCA, Advanced Telecom Computing Architecture, and PICMG are all trademarks of the PCI Industrial Manufacturers Group Hank Lin is Data Acquisition Product Manager for ADLINK Technology s Measurement and Automation Products Segment. Hank received his Master s in Engineering Science and Ocean Engineering from the prestigious National Taiwan University in 1999, before joining ADLINK s Application Engineering team and then transferring to the Test And Measurement Product Center as Product Manager, developing our Pattern Streaming system shortly thereafter. Contact Info: ADLINK Technology, Inc./ AXIe Consortium hank.lin@adlinktech.com / www.axiestandard.org

About ADLINK ADLINK Technology provides a wide range of embedded computing products and services to the test & measurement, automation & process control, gaming, communications, medical, network security, and transportation industries. ADLINK products include PCI Express-based data acquisition and I/O; vision and motion control; and AdvancedTCA, CompactPCI, and computer-on-modules (COMs) for industrial computing. With the acquisition of Ampro Computers, Inc. and LiPPERT Embedded Computers GmbH, ADLINK also provides a wide range of rugged by design Extreme Rugged and Rugged product lines including single board computers, COMs and systems. ADLINK strives to minimize the total cost of ownership (TCO) of its customers by providing customization and system integration services, maintaining low manufacturing costs, and extending the lifecycle of its products. ADLINK is a global company with headquarters and manufacturing in Taiwan; R&D and integration in Taiwan, China, the US, and Germany; and an extensive network of worldwide sales and support offices. ADLINK is ISO-9001, ISO-14001, ISO-13485 and TL9000 certified, is an Associate Member of the Intel Intelligent System Alliance, an Executive Member of PICMG, a Sponsor Member of the PXI Systems Alliance, an Executive Member of PC/104 Consortium, and a Strategic Member of the AXIe Consortium. ADLINK is a publicly traded company listed on the TAIEX Taiwan Stock Exchange (stock code: 6166).