Verification by. Simulation. Verification by. Simulation. Verification by. Simulation / Model Check. Validation and Testing.

Transcription

1 Model-Based Software evelopment : Method Co- with contributions of Marcel Groothuis, Peter Visser, Bojan Orlic, usko Jovanovic, Gerald Hilderink Engineering, CTIT, Faculty EE-M-CS,, Enschede, Netherls [email protected], web: gcsp Course Overview Introduction & Context Setting the scene: embedded control systems software Showcase: Production Cell CSP gcsp Basics of the process algebra practical point of view gcsp the tool / techniques Exercises I gcsp, basics, simple control example Method & CTC++ method Underlying execution framework Linkdrivers, timers Exercises II a robot Wrap up Lunch break 1 Broenink et al of distributed embedded s gcsp 2 Broenink et al of distributed embedded s gcsp, method Overview 3 rd lecture: Method Layered Structure of lers recall Method & 4 steps revisited detailed Focus on Software -> exercise Techniques Co-simulation Hardware-in-the-Loop Cases On Co-simulation On Hardware-in-the-Loop Overview Timing Hard real time Safety, Loop lers, Sequence lers (set point generators) Soft real time Sequence lers, Supervisory ler, User Interface soft hard Computer 3 Broenink et al of distributed embedded s gcsp, method 4 Broenink et al of distributed embedded s gcsp, method 1

2 Model-Based Software evelopment pproach Integrated Models iscipline-specific models connected Total system (embedded + embedding!) Virtual Prototyping = Layered structure of controllers Continuous time & discrete event Stepwise Refinement s modeling law» Gradually enhance laws to code (software) Tools needed Extendable / updatable models & software Total system (embedded + embedding!) recall / pproach method for ECS (software) Stepwise Refinement» intrinsically iterative via» / Co-Sim. / X-in-the-Loop Sim. (hardware / software)» Formal verification: model checking on deadlocks Space Exploration» To support decisions on design choices Concurrent engineering / Mechatronic approach oing first time right -> as little test time on target machine as possible Stepwise Refinement s modeling law Software» Gradually enhance laws to code (software) / 5 Broenink et al of distributed embedded s gcsp, method 6 Broenink et al of distributed embedded s gcsp, method ECS implementation Trajectory Focus on ECS Software Model Based Stepwise Refinement recall 20-Sim 20-Sim Matlab gcsp FR POOSL CTC++ 4C / s / law s Goals of Competent Model» Underst dynamics recall» erive control laws» Test system Generate detailed model» Library blocks Verify model simulation» Model parts» Tests suitable for validation Validate measurements ler Simplified Model» Model reduction» Model linearization Verify Simplified Model» Compare to detailed model erive (s)» Use simplified model Verify (s)» Use detailed model Combine s / 7 Broenink et al of distributed embedded s gcsp, method 8 Broenink et al of distributed embedded s gcsp, method 2

3 Model-Based Software evelopment Software Stepwise refinement Gradually enhance laws to code Gradually add implementation / realization details Working order Integrate control laws / sequences» Loop control laws + Sequencers + Supervisors» Power up / power down sequences» Reaction to external comms» assumed ideal Safety, error & maintenance facilities» External events on safety (emergency stops)» Central or component wise Capture non-ideal components» Non-idealness added:» Relevant dynamic behavior» Signal processing: Estimators Non-idealness Computer hardware» HW + SW architecture, Timing aspects» Optimization, scheduling soft hard / Mix of Process Structures lgorithms Software Models & Method Steps Models ler (CSP) -> code on target (bond graphs) -> simulation Co-simulation iscrete Event & Continuous Time Steps in the method 1. s modeling 2. law 3. Software. Simulated Time B. Real Time 4. / 9 Broenink et al of distributed embedded s gcsp, method 10 Broenink et al of distributed embedded s gcsp, method Software Some etails -> Exercise! Step 3 in the method model OK; laws OK Gradually enhance laws to code» Integrate control laws / sequences» Safety, error & maintenance facilities» Capture non-ideal components Working Order 1. Internal checks 2. Formal Check process logic 3. Include (control) algorithms 4. Check target code 2 Formal Check FR2 CTC++ lib CSPm Step 3 ECS Structure 4 1 gcsp CTC++ Configure, Connect, Compile, Comm Step 1, 2 lgorithms 3 / Co- Co-Sim with gcsp / 20sim Formal checks via FR2 Using CTC++ => can be combined with other code Synchronization via separate timer channels / ddl calls Co-Sim with POOSL / 20sim (+TU/e EE) bstract Syntax, CCS-like SheSim as T simulator: good timing, but busy waiting 100% CPU Synchronization between tools via ddl calls Co-Sim with VM++ / 20sim (+RUN / Chess) istribution / load balancing can be checked nalysis of computer architectures Synchronization between tools via ddl calls Explicit simulation of the network Network via NWsim rendezvous channels 11 Broenink et al of distributed embedded s gcsp, method 12 Broenink et al of distributed embedded s gcsp, method 3

4 Model-Based Software evelopment Co-simulation gcsp 20sim I Test setup: plotter Software Experiments: Model based design Multiple Views» ynamic model» ler view» Mechanical model» Fault-tolerant parallel CSP based software Code generation» ler to CPU (RTI Linux)» ler to FPG Co-simulation gcsp 20sim II Software design co-simulation with 20-sim model HPGL file ler (20-sim) Bearing2 SP PI MV s ler1 model (20-sim) TimingBelt2 m Code generation FrictionRelative2 FixedWorld2 Plotter software (gcsp) 3 representation plots (20-sim) Mass2 13 Broenink et al of distributed embedded s gcsp, method 14 Broenink et al of distributed embedded s gcsp, method VM++ object-oriented formal model-based specification language concurrency through threads round-trip engineering UML formal analysis of static runtime (type) correctness model validation through prototyping & structured testing industrial grade tool support VICE extension * for real time, scheduling deployment Co- VM++ 20sim I * [ Verhoef, Larsen, Hooman, FM 2006, LNCS 4085, pp ] 15 Broenink et al of distributed embedded s gcsp, method Broenink et al of distributed embedded s gcsp, method 4

5 Model-Based Software evelopment Co- VM++ 20sim II Non-ideal Network: Simulate it CSP approach Remote Channels couple to Fieldbus Time increment via Timer Channel Packet Simulator based on TrueTime Towards real-time Remote channel & SimTimer -> Real versions Process Process Channel Channel Sim Channel Channel Sim Real Network Network Simulator SimTimer Real Timer 17 Broenink et al of distributed embedded s gcsp, method 18 Broenink et al of distributed embedded s gcsp, method Simulator OK compared with traditional Network parameters Influence behavior Optimal via simulation Network Simulator - Case Towards Stepwise refinement Software-In-the-Loop Hardware-In-the-Loop» Real-Time Working order Part wise towards realization» Others still simulated Treatment essential» Where, Grouping of functions Useful for Concurrent engineering» simulated SW in time, late» Code simulated SW in time, SIC late Test setup» simulated» For training purposes / 19 Broenink et al of distributed embedded s gcsp, method 20 Broenink et al of distributed embedded s gcsp, method 5

6 Model-Based Software evelopment X-in-the-Loop Overview 3 rd lecture: Method B MIL SIL PIL RHIL ler Co Co ler Z -1 elay1 PWM Z -1 elay1 PWM Sample1 Encoder Rapid Prototyping / Method & 4 steps revisited detailed Focus on Software -> exercise Techniques Co-simulation Hardware-in-the-Loop Cases On Co-simulation On Hardware-in-the-Loop Overview / 3B HIL Sample1 Encoder 4 21 Broenink et al of distributed embedded s gcsp, method 22 Broenink et al of distributed embedded s gcsp, method Case 1 HILS setup Our Test Set Up FPGs as programmable functionality as if it were software Easy prototyping Enables Concurrent Engineering Tool Chain Effectively download, run, control code RTOS Linux, uclibc, RTI 6 MB nything FPG board Seco PC/104+ CPU board CN board PC104 FPG PC Signal conditioning Electrical interface /, encoder, etc. Sensor simulation ler Model of the plant Output driver Electrical interface /, PWM, etc. ctuator simulation Hardware-In-the-Loop simulator 23 Broenink et al of distributed embedded s gcsp, method 24 Broenink et al of distributed embedded s gcsp, method 6

7 Model-Based Software evelopment 20-sim Experiments Sim Sim Comparison PI ler PWM Linix ler PC/104 HIL-Sim Code Generation ler Quantize Real RT-Sim Code Generation Real RT-Sim ler PC/104 FPG FPG HIL-Sim PC ler PC/104 FPG Real Real 25 Broenink et al of distributed embedded s gcsp, method 26 Broenink et al of distributed embedded s gcsp, method Conclusions Case 1 HILS setup Case Study 2 / converter Scara FPG as is really versatile 1 board: 4 functions: PWM out; Encoder in; PWM in; Encoder out HIL- supports Concurrent Engineering SetPoint ler IO Tests Check details Performance Refine trajectory Optimally benefit from flexibility of FPGs nalogue extension to the FPG board Refinement of / Essential behavior only» Time discretization Functional behavior» Quantization (real -> integer) dd non-linearities» Windowing» Nonlinear conversion dd conversion times» / conversion time considerable steerin ataout 1 1 ctuation Measurement See Paper CC Broenink et al of distributed embedded s gcsp, method 28 Broenink et al of distributed embedded s gcsp, method 7

8 Model-Based Software evelopment Case 3 Production Cell revisited gcsp + 20-sim Event driven discrete behavior modeled in gcsp + CT library 20-sim 6 lers & 12 Motion Profiles modeled & generated (c-code) Event based selection motion profiles lers run always Manual coding Hardware interfacing; c-code in gcsp code blocks Production Cell in gcsp Top level implementation in gcsp gcsp stress test 29 Broenink et al of distributed embedded s gcsp, method 30 Broenink et al of distributed embedded s gcsp, method Conclusions Case 3 Production Cell NIRICT Kick off Prototype tool chain functions rather smoothly Shortening design time not (yet) significant Continue working on the tools (Try to) combine benefits of all three T-CT combinations Use larger cases in cooperation with Industry MovieMinOCW MoviePOOSL 31 Broenink et al of distributed embedded s gcsp, method 32 Broenink et al of distributed embedded s gcsp, method 8

9 Model-Based Software evelopment Production Cell with POOSL software Overview 3 rd lecture: Method Method & 4 steps revisited detailed Focus on Software -> exercise Techniques Co-simulation Hardware-in-the-Loop Cases On Co-simulation On Hardware-in-the-Loop Overview / 33 Broenink et al of distributed embedded s gcsp, method 34 Broenink et al of distributed embedded s gcsp, method Overview Method & Techniques Use the structured design process: 4 steps» Stepwise refinement Intrinsically Iterative» Space Exploration» oing first time right -> as little test time on target machine as possible» Supports Concurrent Engineering Use integrated models» Port-based parts, based on bond graphs CSP Use as verification means» Co-simulation» Hardware-in-the-Loop Cases On Co-simulation On Hardware-in-the-Loop / Topics ECS part Use the structured design process Use integrated models Port-based parts, based on bond graphs CSP Use as verification means Use CSP / gcsp to design Software pply tools methods on real setup Experiment yourself 35 Broenink et al of distributed embedded s gcsp, method 36 Broenink et al of distributed embedded s gcsp, method 9