Design and Analysis of Amplifiers for Protective Relay Testing

Transcription

1 Omar A. C. Vilcanqui, Antonio C. de C. ima uiza..dealmeida,2 Univeridade Federal da Bahia (), Univeridade Federal do ABC (2) Deign and Analyi of Amplifier for Protective Teting Abtract. Thi paper preent the analyi and deign of voltage and current amplifier for ue in protective relay teting for frequencie up to the 2th harmonic. A typical topology of DC/AC 5/6Hz converter wa ued to achieve the nominal and peak value produced by conventional current and voltage tranformer. The tability analyi i devied conidering different requirement of load and frequency repone for relay input when compared to that of a typical inglefrequency power converter. The temporal repone to ignal with abrupt change and multiple decaying harmonic i alo invetigated. Proper tet ignal are tored in a PC microcomputer and playedback uing the analog audio output, which i conditioned to the propoed amplifier input. The amplifier controller wa implemented uing a DSP with PWM and an IGBT Hbridge. Simulation and experimental reult are preented for typical fault and multiharmonic ignal. Strezczenie. W artykule zaprezentowano projekt i analize wzmacniacza używanego do tetowania przekaźników zabezpieczających w zerokim zakreie czętotliwości, do 2 harmonicznej. Układ umożliwia także badania przy zybkich zanikach ygnału orazprzyzanikajacych harmonicznych. Sterownik wzmacniacza wykorzytuje układ DSP z PWM i motkiem typu H w technologii IGBT. (Projekt i analiza wzmacniacza do tetowania przekaźników zabezpieczajacych) Keyword: Tet, Univeral Power Supply, Inverter, Protective Słowa kluczowe: przekaźnik, wzmacniacz, tetowanie doi:.295/pe Introduction The equipment for teting protective relay currently found on the market i expenive. A relay teter ue current and voltage amplifier to reproduce compatible ignal with the requirement impoed by the relay. Thi entail the generation of arbitrary ignal, uually in the range of DC to the twentieth harmonic with current and voltage up to 2A and 6V repectively. Procedure for relay teting, which include a dynamic tet and tranient imulation tet, are preented in []. An intereting example found in the literature and intended for ue in the educational environment wa developed in [2]. However, uch an environment ha been decribed in a ytemic way without the detailed deign and analyi of the current and voltage amplifier. To our knowledge, the deign and analyi of uch amplifier have not yet been preented in the literature. However, commercial proprietary amplifier are available, which are alo ued in RTDS (Real Time Digital Simulator) [3] [4]. A natural choice wa to develop the propoed amplifier uing the cla D topology that i ued in many application, including power inverter, Univeral Power Supply (UPS) [5], programmable power ource [6], voltage and current control ource [7], controller for multilevel inverter [8], etc. In thee application, the cla D amplifier or inverter i ued eentially to provide electric power, with a fixedamplitude inuoidal voltage ource of 5Hz or 6Hz, which doe not meet requirement for teting protective relay. inear amplifier [9] would atify thee requirement, but the cla D topology commonly ued in the inverter cot le, i maller and i more efficient []. The ignal produced by a traditional inverter, a aid before, i inuoidal 5/6Hz, and generally thi i achieved uing a pule width modulation (PWM) and MOSFET or IGBT witche, followed by a econd order C filter to remove the harmonic produced by the witching frequency. Thee inverter are normally ubjected to varying load, which require the ue of different claical technique of control [] a well a other more advanced technique uch a liding mode controller [2], Deadbeat [3] and pace vector PWM (SVPWM) [4]. To meet the tet ignal feature of a relay tet, an alternative would be to ue a typical Audio Cla D amplifier topology [5]. Where in audio application, the ignal frequencie vary between 2Hz to 2kHz, but thee amplifier have voltage and current rating which limit their uage in relay teting. In addition, the wide bandwidth require that audio amplifier operate at high witching frequencie, but without necearily uing feedback on their project. The requirement for audio amplifier do not require the ue of controller or witching device capable of handling high current and voltage. A a reult, the topology of a typical cla D audio amplifier i not uitable for ue in a relay tet. In thi paper, we preent the tability analyi of a controller to enure that the cla D amplifier meet the requirement of relay tet. Thi analyi i applied to the topologie for generating the proper current and voltage amplifier. Simulation and experimental reult are preented for typical tranient ignal of an electric power ytem, and it reproducibility i validated. The Topology of Voltage and Current Amplifier Fig. how the block diagram of the propoed amplifier. The reference ignal i generated by a computer and uing the audio output it i ent to a digital ignal proceor (DSP). The analogtodigital converter of the DSP receive thi reference ignal V r (t) to be ampled and ued a input of the amplifier. Unlike a conventional inverter deigned to operate at 5/6Hz, the propoed amplifier mut reproduce ignal of the type () V r (t) = N A n e αnt co(ω n t φ n ), n= where, A n are the amplitude of the inuoid, α n the attenuation factor, ω n and φ n the frequencie and phae of the harmonic component of the reference ignal. N i the number of harmonic, including the DC exponential decay ω n =. The reference ignal i ued to control an Hbridge compoed of IGBT witche, through PWM. To eliminate undeired harmonic ignal from of thi modulation, a paive lowpa filter i ued. The cutoff frequency and maximum fluctuation of current in inductor are of fundamental importance in the deign of thee filter. The feedback ignal for the controller i obtained at the output of the filter. The current and voltage amplifier are hown in Fig.2, and have a imilar topology to thoe preented in [6]. In the cae of the current amplifier, the lowpa filter i an inductor. The PRZEGAD EEKTROTECHNICZNY, ISSN 33297, R. 9 NR 3/24 9

2 Vr(t) A/D A/D DSP CONTROER Amplifier HBridge ow Pa Filter V DC RC Vc(t) i ic C RA A R oad Voltage i R V Fig.. Model of the propoed relay ytem tet. voltage amplifier ha the ame tructure but with an output C filter. Analyi of Stability Procedure project The deign of paive filter inductor depend on certain factor uch a the voltage applied on the Hbridge, the ize of the croectional area of the core, the flux denity and the maximum fluctuation of the inductor current, which decreae with increaing inductance [7]. Thi level of fluctuation occur when the PWM ignal i 5% of the duty cycle [6] [7]. In addition, the core material mut be able to withtand the involved current without aturating for the witching frequency [6]. The following equation wa ued to obtain the inductance = V DC /(2f w Δi ),where,f w i the witching frequency, V DC i the upply voltage on the H bridge and Δi the maximum fluctuation of current in the inductor. VDC VDC S S3 S S3 a a HBridge S4 S4 S2 b S2 b Voltage Filter C Current Filter Fig. 2. Model of voltage and current amplifier for The propoed relay ytem tet in a monofaic configuration. Open oop Voltage Analyi The topology hown at the top part of Fig. 2 wa choen to implement the voltage amplifier. The modulated ignal at the bridge output pae through a lowpa C filter. Thi filter would lead to intability for high impedance load becaue of the reonance peak at the cutoff frequency. In thi work, we added a reitance R a Fig. 3 with a low value compared to the input impedance of the relay R. In common inverter application, thi reonance i attenuated by a very low impedance load. However, the R value i kept a low a poible, but limited to a till high value becaue of the maximum diipated power at the output. To reduce the reonance peak to a uitable value, while maintaining the R value, we propoe the inertion of a R A A C A trap filter tuned at the cutoff frequency and a compenation reitor R C in erie with the inductor, a hown in Fig 3. An important feature of the trap filter i that it power conumption only occur at the cutoff frequency, reulting in negligible power amplifier lo. The tranfer function of the voltage acro the load R E A Y Fig. 3. Propoed Model for the Voltage Amplifier. impedance and the IGBT bridge output i given by (2) conidering A =, C A = C, R R A and R R. Thi lat conideration take into account that commercial relay may preent input impedance value of over hundred of kω. (2) F vc () = V () V c () = CA RC 2 R A RC R b 4 4 b 3 3 b 2 2 b b, Where: b 4 = R 2 C 2, b 3 = C( RC(R A R C )), b 2 = C((3R R A R C ) R A R C RC), b = C(R C (2R R A )RR A ), b = R R C The ignal V c (t) in Fig. 3 depend on the reference voltage V r (t), the upply voltage V DC and the bridge witching frequency. A controller mut enure that the amplifier output follow the reference ignal with minimum error. The propoed controller i deigned to act on the Hbridge in order to obtain flat unit gain in the deired frequency range and a linear phae correponding to a mall contant time delay. In addition, the amplifier hould repond quickly to abrupt tranient input. Open oop Current Analyi The topology of the current amplifierihowninfig. 4. It output filter conit of an inductor and a burden load reitance R B correpond to the input impedance of the relay. The tranfer function relating the IGBT bridge output voltage and the load current i given by. (3) F i () = i RB() V c () =, R B V DC V c(t) i R B oad Current Fig. 4. Topology of the current output filter amplifier. The analyi of the tranfer function decribed by equation (3) how that for commercial burden R B varying between. Ω caue undeired large variation in magnitude and phae repone. Thu, it i neceary to inert a current amplifier controller to enure the deired repone. Cloed oop Voltage Amplifier Analyi The propoed controller for the voltage amplifier i preented in Fig. 5. It i a parallel combination of the cloed loop controller C v () with a feedforward controller H (),thiwith tranfer function of a low pa filter with cutoff of 3kHz. The i RB 2 PRZEGAD EEKTROTECHNICZNY,ISSN 33297, R. 9 NR 3/24

3 large difference between the ampling rate (2kHz) and the maximum ignal frequency (.2kHz) make the amplifier repone enitive to the zero order hold (ZOH), which repreent the PWM digitaltoanalog converter at the DSP output. The function that decribe the ZOH i the term that multiplie F vc () in the equation (6) and F vc () i the mathematical repreentation of the low pa filter decribed by the equation (2). The computational delay effect decribed and dicued in [8] [9] [2] i neglected becaue we ue a highpeed DSP with interrupt management at ampling time. V r(t) Controller H () C v() ZOH HBridge Fvc() Fig. 5. Block diagram of the of the voltage amplifier controller. REAY The tranfer function of the complete controller, hown in Fig. 5, i given by V () (4) V r () = F vc()zoh()[h ()C v ()]V DC, C v ()ZOH()F vc () The controller C v () complement the control action of H (), uing a block proportionalintegral with a cacaded phae lead compenator, given by (5) C v () =( 2 2π3 )( 2π3 ), The zeroorder hold i incorporated into the output analog filter a (6) F v () = e T F vc (), T A the controller are embedded in a DSP, the tability ytem analyi ha to be carried out in dicrete time. Therefore, the filter F v () and the controller C v () are mapped to the Z domain a expreed by equation (7) and (8) repectively. (7) F v (z) =Z[F v ()] = ( z )Z[ F vc() ], (8) C v (z) =C v () = 2 T z, z The tability analyi of the propoed ytem can be performed uing traditional technique uch, phae and gain margin analyi and the Rootocu method (GR) [2][22]. In the preent work, the tability of the ytem for different input reitance or load in the amplifier output mut be guaranteed. Thu, we choe the GR method for our analyi becaue the other method only allow u to verify if the ytem i marginally table. It hould be noted that the GR technique ued here doe not ue the gain variation, a in the traditional method. Alternatively, the open loop gain of the ytem (4) i regarded a unitary, and the load reitance R varie within a range of interet. Fig. 6 how the tability of ytem for variation in the load reitance from Ω to kω. However, it i important to remember that low value of load reitance reult in exceive and unneceary power diipation. Therefore, thi limitation hould be taken into conideration during the deign of the amplifier. Fig. 7 how the frequency repone of the cloedloop voltage amplifier V ()/V r () for a load reitance of kω. Thereulting repone i flat in magnitude in the deired band, with R=kΩ R=Ω R=Ω R=kΩ R=Ω Fig. 6. GR of the controller C v(z)f v(z) with an load reitance R variable in the range of Ω to kω. low harmonic ditortion in the ignal to be amplified. However, thi controller doe not provide a flat phae repone at high frequencie. Depite thi, you can playback mot typical fault ignal of an electrical ytem without relevant lo for a relay tet. Magnitude (db) (Hz) 2 Frequency 3 4 Phae (deg) Bode Diagram Fig. 7. Frequency repone of the cloedloop voltage amplifier for R=kΩ. Cloedoop Current Amplifier Analyi The current amplifier i deigned uing a imilar procedure to that of the voltage amplifier. The modeling of thi amplifier i repreented by (9) with F i () provided by the equation (3). (9) F i () = e T F i (), To enure a flat magnitude repone, with minimal phae lag, we deigned a proportionalintegralcontroller in cacade with a compenator a decribed in (). () C i () =( )( 2π35 2π32 ), The tability analyi of the current amplifier i made in the dicrete domain. Thu, F i () and C i () mut be mapped to thi domain, a hown in the equation () and (2). () F i (z) =Z[F i ()] = ( z )Z[ F i() ], (2) C i (z) =C i () = 2 T z, z Fig. 8 how the GR analyi of the ytem C i (z)f i (z) for typical relay burden commercial value [3]. It can be oberved that the tability i maintained for the entire range of load reitance. The cloedloop frequency repone for PRZEGAD EEKTROTECHNICZNY, ISSN 33297, R. 9 NR 3/24 2

4 6 Reference Output R=.Ω R=Ω R=Ω R=.Ω Fig. 8. GR of the controller C i (z)f i (z) with a load reitence R B variable in the range of. Ω. R B =Ωcan be oberved in Fig. 9. In thi cae, the magnitude i flat with a variation of le than.5 db at a range of Hz to.2khz. The phae repone behave imilar to that of the voltage amplifier, with imilar implication in the reproduction of fault ignal. Magnitude (db) Phae (deg) Bode Diagram 8 2 Frequency (Hz) 3 4 Fig. 9. Frequency repone of the cloed loop C i (z)f i (z) current amplifier for R B of Ω. Reult Simulation Reult Tranient ignal repreenting typical electrical ytem fault are generated by imulation and played back in an experimental prototype to tet the performance of the amplifier. Thee ignal contain pectral component a decribed in equation (). Table I how the component value and parameter ued in the imulation and experimental reult. Table. Value of Component and Parameter of the Amplifier Decription Symbol Value Filter Capacitance C 2.8μF Filter Inductance Voltage mh Filter Inductance Current 5μH Switching Frequency f w 2kHz Network Frequency f DC 2 a harmonic Supply voltage V DC 2V Damping Reitor R D Ω Filter Reitor R A 2Ω The imulation hown in Fig. illutrate the effect of an overcurrent fault in the feeder voltage, which immediately decreae during the occurrence. The reference ignal ent to the voltage amplifier wa imulated for a ingle phae network. It can be noted that the controller i capable of reproducing the reference (ee detail) in le than m. Fig. Amplitude (V) Time () Fig.. The reference ignal and it correponding voltage repone at the amplifier output for an overcurrent condition. how the imulation of a tranient current for a fundamental of 6Hz and an exponentially decaying DC component with a harmonic of.2 khz. The amplifier follow the reference ignal introducing a phae delay in the twentieth harmonic, according to the frequency repone hown in Fig. 9. Amplitude (A) Time ().2 khz Reference Output Fig.. Simulation of a tranient current ignal with exponentially decaying DC component and increaing harmonic of.2 khz. Experimental Reult The experimental prototype i hown in Fig. 2. It i ue an IGBT Hbridge threephae model IRAMX2UP6A, which upport maximum voltage of 6V and current up to 2A. The maximum witching frequency of the bridge i 2kHz and thi i ued a the ampling frequency of the control algorithm. The C filter i built with a ferrite core and multiwire winding, and it repond to the twentieth harmonic with negligible loe. The current enor ued i the EM A55P and the voltage enor i the V2P. The digital controller are embedded in a Texa DSP TMS32F The program MATAB i ued to generate electrical fault and the analog audio output of the computer i ued to generate the reference, thi output i conditioned to the propoed cla Damplifier input. Fig. 3 and 4 how the experimental re Fig. 2. Experimental prototype. ult correponding to the imulation preented in Fig. and, repectively. 22 PRZEGAD EEKTROTECHNICZNY,ISSN 33297, R. 9 NR 3/24

5 Fig. 3. Experimental reult voltage repone at the amplifier output for an overcurrent condition. Fig. 4. Experimental reult of a tranient current ignal with exponentially decaying DC component and increaing harmonic of.2 khz. Concluion The deign of current and voltage amplifier for ue in protective relay tet ha been decribed. The analyi of a feedback tability of the amplifier wa preented decribing curve for load variation where the amplifier can be untable. The control method ued to guarantee the tability analyi wa the root locu, where the entire amplifier model were mapped in the Z domain. In addition, the procedure to calculate the paive element of the power amplifier uch a inductance and capacitance of the filter wa decribed. A frequency analyi of thee amplifier wa performed to enure a flat magnitude repone and minimal phae delay. The amplifier were imulated and teted experimentally for ome type of tranient ignal, compoed of harmonic, abrupt change and exponential decay. The good performance obtained in imulation wa verified experimentally, in both frequency and time domain. The reult how that the propoed amplifier may be ued for relay teting in the range of DC to.2 khz. REFERENCES [] De Oliveira W. A., Sato F.: A Evolução no Procedimento para o Enaio de Deempenho de Relé de Proteção, International Conference on Indutry Application 9th IEEE/IAS, INDUSCON 2. [2] Pire V.F., Martin S., Amaral T.G., Rodrigue R., Criotomo M.M.: Ditanceearning PowerSytem Protection Baed on Teting Protective, IEEE Tranaction on Indutrial Electronic, 55(6), June 22. [3] OMICRON, Tet [web page] tet, [Acceed on 3 Sep. 23.]. [4] Yoon J.Y., Kim J.H.,Yang B., ee B.: Protective Tet of Hybrid SFC in a Korean Ditribution Power Sytem Uing RTDS, IEEE Tranaction on Applied Superconductivity, 34(5), Jun. 2. [5] AbdelRahim N. M., Quaicoe J. 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[2] Abuara M.A., Sharkh S.M.: Deign and Control of a Grid Connected Interleaved Inverter, IEEE Tranaction on Power Electronic, 28, pp February 23. [22] Ito Y., Kawauchi S.: MicroproceorBaed Robut Digital Control for UPS with Threephae PWM Inverter, IEEE Tranaction on Power Electronic, (2), March 995. Author: Omar Vilcanqui, Univeridade Federal da Bahia, Department of Indutrial Engineering, Rua Aritidi Novi Nro. 2, 4263, SalvadorBABrazil, [email protected]. Antonio Cezar de Catro ima, Univeridade Federal da Bahia, Department of Electrical Engineering, Rua Aritidi Novi Nro. 2, 4263, SalvadorBABrazil, [email protected]. uiz Alberto uz de Almeida, Univeridade Federal do ABC, Department of Intrumentation, Automation and Robotic, Av. do Etado 5. Santo André SPBrazil, Bairro Bangu, 9258, [email protected]. PRZEGAD EEKTROTECHNICZNY, ISSN 33297, R. 9 NR 3/24 23