Data and Control Plane Interconnect solutions for SDN & NFV Networks Raghu Kondapalli August 2014

Transcription

1 Data and Control Plane Interconnect solutions for SDN & NFV Networks Raghu Kondapalli August 2014

2 Title & Abstract Title: Data & Control Plane Interconnect for SDN & NFV networks Abstract: Software defined and functionally disaggregated network elements rely heavily on deterministic and secure data & control plane communication within and across the network elements. In these environments scalability, reliability and performance of the whole network relies heavily on the deterministic behavior of this interconnect. In this presentation, Raghu Kondapalli will discuss various aspects of this data & control plane interconnect including its functional requirements and solution components suitable for SDN/NFV environments Page 2

3 Agenda State of current network solutions and emerging trends Challenges with existing interconnect solutions mapped to SDN & NFV networks Solution proposals for data and control plane interconnect Conclusions Page 3

4 Chief Officer s views Why does interconnecting my servers and storage takes more than 30% of my budget? I want dynamic cloud scale orchestration for my network elements I want to transition from purpose built network elements to scalable multipurpose blades I want my network to adapt to my business needs not the other way around Increasing Network agility and lowering costs are driving disruptions in the industry Page 4

5 Network Architect s view Building practices Deployment practices New service rollout practices Operational practices Base Station Router Appliance Switch disaggregate virtualize interconnect automate Network Layers (L1, L2, L3+ etc.) into functions network functions onto multi-purpose elements functions into complete network elements orchestration & management of network elements Page 5

6 Solution Centric view Type 1 Type 2 Define Multi - use server x86 Compute x86 Server Type 3 Network Offload SoC Data Plane Offload Card ARM SoC ARM SoC Interconnect ARM SoC ARM SoC Control Plane Offload Card Vertically aggregated Horizontally dis-aggregated Define build architecture Define Orchestration & Management Resource Mgmt Cloud Mgmt / OSS / EMS Hypervisor / OS SDN Controller Page 6

7 SDN Deployment Challenges Resource Orchestration Overlay Before SDN deployment After SDN deployment Controllers Virtual Network Overlay Management Physical Network Topology 1 Functional pooling increases node-to-node traffic 3 Significant Control Plane Complexities due to latencies & new traffic types 2 Coordination between multiple controllers & resource orchestration 4 Scale poses many challenges in state management and traffic engineering Functional Coordination and Control Plane Acceleration are key to SDN Deployments Page 7

8 NFV/SDN Backbone Components view Resource Orchestration Overlay Network Across network elements NFV/SDN Distributor NFV/SDN Distributor : Software Function HF: Hardware Function Deterministic interconnect Within a network element NFVSDN Coordinator NFV/SDN Coordinator NFV/SDN Coordinator Note: Colors indicate various virtual network functions HF HF HF HF HF Page 8

9 Disaggregated Architectures Passive Backplane L4+ Network Element L3 L2 L2 L1 L1 L1 L1 Active Switch Fabric Local Functional Interconnect Switch Fabric Interface RDMA VoQ Traffic manager Load balancer Page 9

10 Interconnect Types Passive Backplane SDN Controller(s) 1 Inter-network function interconnect Active Switch Fabric 2 Intra-network function interconnect 3 backplane interconnect 4 Chassis to chassis interconnect Page 10

11 Interconnect Requirements Data Plane function Control Plane function Bandwidth High Low to Med Bandwidth latency security Latency sensitivity High Med Security Low to Med High protocol Reliability Traffic management physical Traffic Management Reliability Physical Programmable & Hierarchical Preferably loss less w re-transmissions Ethernet (IEEE802.3) Programmable Preferably loss less w retransmissions Ethernet (IEEE802.3) Protocol Ethernet Ethernet Varying Data and Control Plane Interconnect requires Scalability, Programmability and Functional flexibility Page 11

12 Axxia 5516: Industry Leading Innovation Coherent Memory Interconnect Shared L2 Cache Shared L2 Cache Shared L2 Cache Shared L2 Cache First High-End 16 Core ARM Multicore Communication Processor First Fully Cache Coherent ARM CCN-504 Network Interconnect Network Compute Adapter Memory Management Engine Page 12 EIOA + PCX Intelligent Pkt Switch DPI Engine Timer Manager Security Processor Pkt Integrity Check Market Leading Acceleration Engines and Packet Processing First Integrated Ethernet Switch with 16 10Gb Ethernet links Sec Sys SPI/I2C 1588/SynE USB srrio Interfaces & Peripherals DDR3 Controllers PCIe Stripe 7 Stripe 6 Stripe 5 Stripe 4 Stripe 3 Stripe 2 Stripe 1 Stripe 0 L3 Cache 1/10G Eth PIC Semap. Engine PQM Hash Engine State Engine PPE PPE PPE PPE Stream Editor PPE PPE PPE PPE Modular Traffic Manager Modular Packet Processor Pkt Assembly Block Virtual Pipeline Task Ring Samples Delivered on Schedule with customer Linux bring-up in 2 days

13 Axxia SoC for SDN/NFV Backbone Pre-processing CPU CPU CPU Intra-processing Examples Stateful Classification Rate shaping Crypto (eg, IPsec / Kasumi) IP de-fragmentation CPU CPU CPU Adapter CPU Examples One or more of: RegEX Offload Crypto Offload Scheduler/shaping Fast Path Processing Examples Ethernet Switching Protocol Interworking Wireless transport DDR DDR Input/Output Adapter Input/Output Adapter L3 Cache Virtu al Pipel ine Packet Eng Packet Editor Pkt Assembly Pkt Integrity Traffic Mgr Crypto Eng RegEx Eng Timer Mgr Post-processing Examples Traffic Management Crypto Offload Scheduler/shaping Checksum/CRC generation Deterministic Bandwidth Hierarchical Traffic Management Autonomous pipeline processing Scalable Performance Programmable Accelerators Page 13

14 Conclusions Software defined and functionally disaggregated network elements rely heavily on deterministic and secure data & control plane communication within and across the network elements Intelligent and programmable interconnect plays a crucial role for data and control plane functions to scale Axxia multi-core SoC w various programmable functional accelerators offers a scalable data and control plane solution Page 14

15