1 Serdar Taşıran Koç University, Dept. of Computer Engineering Rumeli Feneri Yolu, Sarıyer Istanbul, Turkey +90 (212) EDUCATION Doctor of Philosophy University of California, Berkeley Department of Electrical Engineering and Computer Sciences Dissertation title: Compositional and Hierarchical Techniques for the Formal Verification of Real-Time Systems Primary area: Formal Verification, Logic Synthesis Minors: Mathematical Logic; Algorithms and Computer Science Theory Master of Science University of California, Berkeley Department of Electrical Engineering and Computer Sciences Thesis title: Language Containment Using Non-deterministic Omega-automata Bachelor of Science Bilkent University, Ankara, Turkey Department of Electrical and Electronics Engineering Department Valedictorian, University Salutatorian December 1998 May 1995 June 1991 HONORS AND AWARDS Elected member of the IFIP WG2.3 Working Group: Programming Methodology. Present and past members of this group include six Turing Award winners. Appointed member of the HiPEAC European Network of Excellence on High Performance and Embedded Architecture and Compilation. Appointed member of the Association for Computing Machinery (ACM) Europe Council. Received one of 18 Microsoft Research Europe PhD Scholarship awards. Distinguished Young Scientist Award, Turkish Academy of Sciences (TUBA-GEBIP). Research gifts from the Software Productivity Tools and Software Reliability Research Groups, Microsoft Research, Redmond. The TUBITAK (The Turkish Council for Scientific and Technical Research) Young Investigator (KARIYER) Award in the form of research funding for five years. Funding for graduate study from the Semiconductor Research Corporation. Eugene C. Gee and Mona Fay Gee Scholarship for graduate study at UC Berkeley. One of the four NATO Honorary Doctoral Scholars in Electrical Engineering selected by the Scientific and Technical Research Council of Turkey. Ranked first in the graduating class of the Department of Electrical and Electronics Engineering at Bilkent University. Represented Turkey as a member of a team of six in the 29 th Intl. Mathematics Olympiad. Ranked first out of approximately one million high school seniors in the National University Entrance Examination in Turkey (OSS). Ranked first out of ~150,000 students in the Science High School entrance examination. RESEARCH INTERESTS Verification, programming languages, and systems: Verifiable systems programming, static proof and dynamic verification tools for multi-threaded and distributed software, multi-processor hardware. Design automation tools for hardware and software systems: Synthesis, verification, performance analysis and optimization.
2 PROFESSIONAL EXPERIENCE College of Engineering, Koç University, Istanbul, Turkey Associate Professor of Computer Engineering Research Center for Multicore Software Engineering: A Collaboration with Barcelona Supercomputing Center and Microsoft Research LIP6, Université Pierre et Marie Curie and French National Center for Scientific Research (CNRS) (Sabbatical Leave) Visiting Professor with Dr. Marc Shapiro Microsoft Research, Cambridge, UK (Sabbatical Leave) Visiting Researcher Programming Principles and Tools Group Microsoft Research, Redmond, WA (Sabbatical Leave) Visiting Researcher Research in Software Engineering Group Laboratoire d'informatique Algorithmique: Fondements et Applications, CNRS, Université Paris Diderot - Paris 7 Visiting Professor with Prof. Ahmed Bouajjani Microsoft Research Visiting researcher appointments at and several yearly visits to Research in Software Engineering Group, Redmond (three months) Programming Principles and Tools Microsoft Research, Cambridge, UK, Rigorous Software Engineering Group, Bangalore, India (one month) Jan present Jul.-Sep Mar. Jun Aug Mar June 2012 Jan present Massachusetts Institute of Technology Research Laboratory of Electronics Visiting Researcher with the Computational Prototyping Group Systems Research Center, Hewlett-Packard Laboratories (formerly Compaq and Digital Equipment Corp.) Palo Alto, CA Research Scientist Formal specification and verification of the Alpha multiprocessor architecture, verification of concurrent systems software, information visualization in bioinformatics. Gigascale System Research Center (www.gigascale.org) Research Scientist The GSRC was a fourteen-university and multi-company research consortium aimed at addressing the challenges electronic design was expected to face in the next 8-12 years. Faculty advisor: Prof. Kurt Keutzer, University of California at Berkeley University of California, Berkeley, Computer-Aided Design Research Group Graduate Student Researcher, Computer-Aided Design Group Aug Oct Jan Dec Oct Aug Dec Bell Laboratories, Lucent Technologies, Murray Hill, NJ Summer intern. Supervisors: Robert P. Kurshan, Rajeev Alur Compositional verification of refinement for real-time systems University of Illinois, Urbana-Champaign, Coordinated Science Laboratories Research Assistant, Optoelectronics and High Speed Devices Group Jun.- Aug. 1995, Jun Aug May 1992
4 12. Hassan Salehe Matar, Ismail Kuru, Serdar Tasiran, Roman Dementiev Accelerating Precise Race Detection Using Commercially-Available Hardware Transactional Memory Support Workshop on Determinism and Correctness in Parallel Programming (WoDet 2014) (co-located with ASPLOS 14). Salt Lake City, USA, March 2, Ismail Kuru, Hassan Salehe Matar, Adrián Cristal, Gokcen Kestor and Osman Unsal PaRV: Parallelizing Runtime Detection and Prevention of Concurrency Errors Intl. Conference on Runtime Verification, LNCS Istanbul, Turkey, Serdar Tasiran, Shaz Qadeer Runtime Verification of Concurrency-Specific Correctness Criteria International Journal on Software Tools for Technology Transfer (STTT), 14(3), Serdar Tasiran, M. Erkan Keremoglu, Kivanc Muslu Location Pairs: A Test Coverage Metric for Shared-Memory Concurrent Programs Empirical Software Engineering Journal, 17(3), Omer Subasi, Tayfun Elmas, Serdar Tasiran On Justifying and Verifying Relaxed Detection of Conflicts in Concurrent Programs WoDet 3: Third Workshop on Determinism and Correctness in Parallel Programming Co-located with ASPLOS 12, 17th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems. London, England, UK, March 3-7, Umit Can Bekar, Tayfun Elmas, Semih Okur, Serdar Tasiran KUDA: GPU Accelerated Split Race Checker WoDet 3: Third Workshop on Determinism and Correctness in Parallel Programming Co-located with ASPLOS 12, 17th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems. London, England, UK, March 3-7, Ali Sezgin, Serdar Tasiran, Kıvanc Muslu, Shaz Qadeer Run-Time Verification of Optimistic Concurrency Intl. Conference on Runtime Verification, LNCS Malta, November 1-4, Tayfun Elmas, Shaz Qadeer, Serdar Tasiran Goldilocks: A Race- Aware Runtime Communications of the Association for Computing Machinery (CACM) Research Highlights Section, 53(11):55-92, Ali Sezgin, Serdar Tasiran, Shaz Qadeer Tressa: Claiming the Future. Verified Software: Theories, Tools and Experiments (VSTTE 2010). Edinburgh, Scotland. August 16-19, Tayfun Elmas, Shaz Qadeer, Ali Sezgin, Ömer Subası, Serdar Tasıran Simplifying Linearizability Proofs with Reduction and Abstraction In Intl. Conf. on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2010). Paphos, Cyprus. March 20-28, Alp Arslan Bayrakci, Alper Demir, Serdar Tasiran Fast Monte Carlo Estimation of Timing Yield With Importance Sampling and Transistor-Level Circuit Simulation IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29(9): , 2010.
5 23. Tayfun Elmas, Shaz Qadeer, Ali Sezgin, Serdar Tasiran An Annotation Assistant for Interactive Debugging of Programs with Common Synchronization Idioms. ACM 2009 Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging (PADTAD 09). Chicago, Illinois, USA, July 19-20, Tayfun Elmas, Shaz Qadeer, Serdar Tasiran A Calculus of Atomic Actions ACM SIGPLAN-SIGACT 2009 Symposium on Principles of Programming Languages (POPL 09) Savannah, Georgia, USA, January 21-23, Soner Yaldiz, Alper Demir, Serdar Tasiran Stochastic Modeling and Optimization for Energy Management in Multi-Core Systems: A Video Decoding Case Study IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(7): , Nesra Yannier, Cagatay Basdogan, Serdar Tasiran, Omer Lutfi Sen Using Haptics to Convey Cause and Effect Relations in Climate Visualization IEEE Transactions on Haptics, 1(2): , Tayfun Elmas, Shaz Qadeer, Serdar Tasiran Goldilocks: A Race- and Transaction-Aware Java Runtime ACM SIGPLAN 2007 Conf. on Programming Language Design and Implementation, PLDI '07. June 10-13, Also in ACM SIGPLAN Notices, 42(6), June Serdar Tasiran, Tayfun Elmas Rollback Atomicity 7 th Workshop on Runtime Verification (RV 2007). Vancouver, BC, Canada, March Tayfun Elmas, Shaz Qadeer, Serdar Tasiran Goldilocks: Efficiently computing the happens-before relation using locksets Workshop on Formal Approaches to Testing and Runtime Verification (FATES/RV 2006) Seattle, WA, August Serdar Tasiran, Alper Demir Smart Monte Carlo for Yield Estimation ACM/IEEE Int l Workshop on Timing Issues in the Specification and Synthesis of Digital Systems. San Jose, CA, February Alper Demir, Serdar Tasiran, Stochastic Logical Effort: Designing for Timing Yield on the Back of an Envelope ACM/IEEE Int l Workshop on Timing Issues in the Specification and Synthesis of Digital Systems. San Jose, CA, February Soner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in Multi-Core Systems Proc. IEEE 3 rd Workshop on Embedded Systems for Real-Time Multimedia: ESTIMedia New York, September 22-23, Tayfun Elmas, Serdar Tasiran VyrdMC: Driving Runtime Refinement Checking with Model Checkers 5 th Workshop on Runtime Verification. Edinburgh, Scotland, UK. July 12, 2005.
6 34. Serdar Tasiran, Tayfun Elmas, Guven Bolukbasi, M. Erkan Keremoglu A Novel Test Coverage Metric for Concurrently-Accessed Software Components 5 th International Workshop on Formal Approaches to Testing of Software (FATES 2005). Edinburgh, Scotland, UK, July 11, Tayfun Elmas, Serdar Tasiran, Shaz Qadeer VYRD: VerifYing Concurrent Programs by Runtime Refinement-Violation Detection ACM SIGPLAN 2005 Conf. on Programming Language Design and Implementation, PLDI '05. June 12-15, Also in ACM SIGPLAN Notices, (40)6, June Serdar Tasiran, Yuan Yu, Brannon Batson Linking Simulation with Formal Verification at a Higher Level IEEE Design and Test of Computers, Special Issue on Exploring Synergies for Design Verification. 21(6): , Serdar Tasiran, Shaz Qadeer Runtime Refinement Checking of Concurrent Data Structures RV'04 - Fourth Workshop on Runtime Verification. Barcelona, Spain, April 3, The European Joint Conferences on Theory and Practice of Software (ETAPS '04). 38. Serdar Tasiran, Brannon Batson, Yuan Yu Using a Formal Specification and a Model Checker to Monitor and Direct Simulation: Verifying the Multiprocessing Hardware of the Alpha Microprocessor. IEEE 40th Design Automation Conference, DAC '03. Anaheim, USA, June (Invited talk, International Solid State Circuits Conference, ISSCC 2004, Highlights of DAC ). 39. Rajeev Joshi, Leslie Lamport, John Matthews, Serdar Tasiran, Mark Tuttle, and Yuan Yu. Checking Cache Coherence Protocols with TLA+ Journal of Formal Methods in System Design. 22(2): , Tamara Munzner, Francois Guimbretiere, Serdar Tasiran, Li Zhang, and Yunhong Zhou TreeJuxtaposer: Scalable Tree Comparison using Focus+Context with Guaranteed Visibility ACM Transactions on Graphics. 22(3): , Thomas A. Henzinger, Shaz Qadeer, Sriram Rajamani, Serdar Tasiran An Assume-Guarantee Rule for Checking Simulation ACM Transactions on Programming Languages and Systems (TOPLAS). 24(1): 51-64, Serdar Tasiran, Yuan Yu, Rajeev Joshi, Brannon Batson, Scott Kreider Using Formal Specifications to Monitor and Guide Simulation: Verifying the Cache Coherence Engine of the Alpha Microprocessor IEEE Workshop on Microprocessor Test and Verification, MTV '02. Austin, TX, Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer A Functional Validation Technique: Biased Random Simulation Guided By Observability-Based Coverage IEEE Intl Conf. on Computer Design: VLSI in Computers and Processors, ICCD 01. September Serdar Tasiran, Kurt Keutzer Coverage Metrics For Functional Validation Of Hardware Designs IEEE Design and Test of Computers. 18(4), 2001.
7 45. Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer Coverage-Directed Generation Of Biased Random Vectors For Functional Validation Of Sequential Circuits. IEEE/ACM Workshop on Logic and Synthesis, IWLS 01. June Thomas. A. Henzinger, Shaz Qadeer, Sriram Rajamani, Serdar Tasiran An Assume-Guarantee Rule for Checking Simulation Intl. Conf. on Formal Methods in Computer-Aided Design, FMCAD '98. LNCS Palo Alto, USA, Serdar Tasiran, Sergio Yovine, Robert K. Brayton A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk Intl. Conf. on Formal Methods in Computer-Aided Design, FMCAD '98, LNCS Palo Alto, USA, Rajeev Alur, Thomas A. Henzinger, Fred Y.C. Mang, Shaz Qadeer, Sriram Rajamani, Serdar Tasiran MOCHA: Modularity in Model Checking Intl. Conf. on Computer-Aided Verification, CAV '98. LNCS Vancouver, Canada, Serdar Tasiran, Yuji Kukimoto, Robert K. Brayton Computing Delay with Coupling Using Timed Automata IEEE/ACM Intl. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, TAU '97. Austin, TX, Serdar Tasiran, Robert K. Brayton STARI: A Case Study in Compositional and Hierarchical Timing Verification Intl. Conf. on Computer-Aided Verification, CAV '97, LNCS Haifa, Israel, Serdar Tasiran, Rajeev Alur, Robert P. Kurshan, Robert K. Brayton Verifying Abstractions of Timed Systems Intl. Conference on Concurrency Theory, CONCUR '96, LNCS Pisa, Italy, Serdar Tasiran, Robert K. Brayton On Iterative Verification with Timed Automata ACM Intl. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, TAU '95. Seattle, WA, Serdar Tasiran, Ramin Hojati, Robert K. Brayton Language Containment Using Non-deterministic Omega-Automata Advanced Research Working Conference on Correct Hardware Design and Verification Methods, CHARME'95, LNCS 987. Frankfurt, Germany, Adnan Aziz, Serdar Tasiran, Robert K. Brayton BDD Variable Ordering for Interacting Finite State Machines ACM/IEEE Design Automation Conference, DAC 94. San Diego, USA, Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram Krishnan, Rajeev Ranjan, Thomas Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto Sangiovanni-Vincentelli HSIS: A BDD-Based Environment for Formal Verification ACM/IEEE Design Automation Conference, DAC 94. San Diego, USA, 1994.
8 56. Adnan Aziz, Serdar Tasiran, Robert K. Brayton A Communication Complexity Based Approach to BDD Variable Ordering for Systems of Interacting Finite State Machines ACM/IEEE Intl. Workshop on Logic Synthesis, IWLS 93. Tahoe City, USA, M. Selim Unlu, Samuel Strite, A. Levent Demirel, Serdar Tasiran, Arlindo Salvador, Hadis Morkoc Wavelength Selective Optical Logic and Interconnects IEEE Journal on Quantum Electronics, 29(2), M. Selim Unlu, A. Levent Demirel, Samuel Strite, Serdar Tasiran, Arlindo Salvador, and Hadis Morkoc Wavelength Demultiplexing Optical Switch Applied Physics Letters, 60(15), TECHNICAL REPORTS 59. Tayfun Elmas, Semih Okur, Serdar Tasiran Rethinking Runtime Verification for Hundreds of Cores: Challenges and Opportunities EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS , June Tayfun Elmas, Shaz Qadeer, Serdar Tasiran A Calculus of Atomic Actions Microsoft Research Technical Report, MSR-TR , July 18, Serdar Tasiran A Compositional Method for Verifying Software Transactional Memory Implementations Microsoft Research Technical Report, MSR-TR , April 10, Tayfun Elmas, Shaz Qadeer, Serdar Tasiran Precise race detection and efficient model checking using locksets Microsoft Research Technical Report, MSR-TR , March Serdar Tasiran, Andrej Bogdanov, Minwen Ji Detecting concurrency errors in file systems by runtime refinement checking Hewlett-Packard Laboratories, Technical Report, HPL , INVITED PRESENTATIONS Verifiable Concurrent Systems Programming: A Garbage Collector Case Study EC2: CAV 2014 Workshop on Exploiting Concurrency Efficiently and Correctly Simplifying Concurrent Programs Using Reduction and Abstraction: The QED Approach Tool demo: Static proof system for programs running on the total-store order memory model. - Workshop of Concurrent Software - Microsoft Research, Cambridge, UK June Dagstuhl Seminar on the Formal Verification of Distributed Algorithms Schloss Dagstuhl, Germany, April 1-5, Verifying Concurrent Programs with Relaxed Conflict Detection - University of Paris 7, 22 June University of Paris 6, 15 June Fifth Workshop on the Theory of Transactional Memory October 14, 2013, Jerusalem, Israel - in conjunction with DISC IFIP WG 2.3 Working Group on Programming Methodology, Kirkland, WA, 17 July 2012 Microsoft Research Cambridge, UK, 17 August 2012
9 Generalizing Reduction and Abstraction to Simplify Concurrent Programs: The QED Approach - COST Action Meeting: Rich Model Toolkits, Tallinn, Estonia, 31 March, The Chemistry of Concurrent and Distributed Programming Workshop Mysore Park Series. Mysore, India February, Dagstuhl Seminar on Runtime Verification, Diagnosis, Planning and Control for Autonomous Systems Schloss Dagstuhl, Germany. 7 November, 2010 Location Pairs: A Test Coverage Metric for Concurrent Programs Microsoft Research, Redmond, WA, July 2011 Reduction, abstraction, and atomicity: How much can we prove about concurrent programs using them? IFIP WG 2.3: Working Group on Programming Methodology Mtg. 50, Lachen, Switzerland, March 2010 Verifying Optimistic Concurrency: Prophecy Variables and Backwards Reasoning Dagstuhl Seminar on the Design and Validation of Concurrent Systems Schloss Dagstuhl, Germany. 2 September 2, 2009 Computer-Aided Verification for Multi-Core / Concurrent Programming Panel at the CAV 2008 Workshop on Exploiting Concurrency Efficiently and Correctly Princeton, NJ, 8 July, 2008 Verifying Software Transactional Memory Implementations Microsoft Research, Redmond, WA. August 2007, April 2008 Microsoft Research, Bangalore, India, June 2008 Goldilocks: A Race- and Transaction-Aware Runtime for Java Dagstuhl Seminar on Runtime Verification Schloss Dagstuhl, Germany. 3 January, 2007 Using a Formal Specification and a Model Checker to Monitor and Direct Simulation: Verifying the Multiprocessing Hardware of the Alpha Microprocessor International Solid State Circuits Conference, ISSCC 2004, Highlights of DAC Session, San Francisco, CA, January 2004 Simulation Meets Formal Verification Embedded tutorial in the IEEE Intl Conf. on Computer-Aided Design, ICCAD 1999, San Jose, CA, 1999 PROFESSIONAL ACTIVITIES Member of the ACM Europe Council (http://europe.acm.org) Member of the Committee on European Computing Education (http://www.uni-muenster.de/cece/ Member of the IFIP WG2.3: Working Group on Programming Methodology (http://research.microsoft.com/en-us/um/people/leino/ifip-wg2.3/) Guest Editor, Special Issue of the Journal of Logic and Computation (Oxford Journals) on Runtime Verification Program Committee Co-chair, LNCS Volume Editor for Runtime Verification 2007 and 2012 Member of the Technical Program Committees for ASPLOS 2015: Architectural Support for Programming Languages and Operating Systems EuroSys 2015: The European Conference on Computer Systems SEFM 2014: 12 th Intl. Conference on Software Engineering and Formal Methods ftfjp 2013: 13th Workshop on Formal Techniques for Java-like Programs TACAS 2012: Tools and Algorithms for the Construction and Analysis of Systems VSTTE 2010: Verified Software: Theories, Tools and Experiments TRANSACT 2009: 4 th ACM SIGPLAN Workshop on Transactional Computing CAV 2009, CAV 2011: Intl. Conference on Computer-Aided Verification ICCD : IEEE Intl. Conference on Computer Design
11 M. Erkan Keremoglu (degree awarded Fall 2007) Thesis title: The Location-Pairs Coverage Metric for Testing Concurrent Programs Later positions: PhD at Simon Fraser University, now at Microsoft, Redmond Nesra Yannier (degree awarded Fall 2007) Thesis title: Using Haptics to Convey Cause and Effect Relations in Climate Visualization Current position: PhD student at Stanford University Omer Subasi (degree awarded Summer 2012) Thesis title: Techniques for Verifying Transactional Programs and Linearizability Current position: PhD student at Barcelona Supercomputing Center Umit Can Bekar (degree awarded Fall 2013) Thesis title: KUDA: A GPU-CPU Split Race Checker Framework Current position: Yapi Kredi Technologies Ismail Kuru (degree awarded Fall 2015) Thesis title: Static Methods for Checking Correctness of Programs on Relaxed Memory Systems Research internships: Microsoft Research, Cambridge, UK, and University of Washington, Seattle Later positions: PhD student at Georgia Institute of Technology COURSES TAUGHT Graduate courses: COMP 489/589: Software Reliability: Specification, Testing and Verification COMP 456/556: Algorithms and Computational Complexity ECOE 560: Design Methodologies and Tools for Software/Hardware Systems Undergraduate courses: ENGR 100: Introduction to Computer Engineering COMP 131/241: Object-Oriented Programming with Java COMP 132: Advanced Programming COMP 302: Software Engineering EXTERNAL FUNDING FOR RESEARCH EU ITEA3 industry-academia collaboration project (approved for EU funding in ßMarch 2015) ASSUME: Affordable Safe and Secure Mobility Evolution 540,000 Euros for three years, EU Project SyncFree: Large-scale computation without synchronization 90,000 Euros for three years, Koc-Microsoft Research Center for Multicore Software Engineering $250,000 for three years, Sept Sept Turk Telekom Project on Software Engineering Tools for Cloud Computing $120,000 for three years, Sept Sept Intel Project on Power Management for Mobile Platforms $40,000 per year, year-long research internships, pre-release equipment donations COST Action Project Funded by TUBITAK 259,758 TL for three years, Sept Sept TUBA-GEBIP Outstanding Young Researcher Grant 60,000 TL for three years, Microsoft Research unrestricted research gifts, support for visits, travel, internships Over $150,000 since 2003 KARIYER Project funded by TUBITAK Approx. 150,000 TL, ended in 2010
Oğuz Ergin TOBB University of Economics and Technology, Department of Computer Engineering, Söğütözü Cad. No: 43, Söğütözü, Ankara / Turkey e-mail: firstname.lastname@example.org Tel: +90 312 292 4059 (work) Url: http://oergin.etu.edu.tr
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