Energy-Efficient Scheduling for Real-Time Systems on Dynamic Voltage Scaling (DVS) Platforms

Transcription

1 Energy-Efficient Scheduling for Real-Time Systems on Dynamic Voltage Scaling (DVS) Platforms Jian-Jia Chen Department of Computer Science and Information Engineering National Taiwan University, Taiwan Chin-Fu Kuo Department of Computer Science and Information Engineering National University of Kaohsiung, Taiwan Abstract Energy-efficient designs have played import roles for hardware and software implementations for a decade. With the advanced technology of VLSI circuit designs, energy-efficiency can be achieved by adopting the dynamic voltage scaling (DVS) technique. In this paper, we survey the studies for energy-efficient scheduling in real-time systems on DVS platforms to cover both theoretical and practical issues. Keywords: Real-Time Systems, DVS, Dynamic Voltage Scaling, Energy-Efficient Scheduling 1 Introduction Power-aware and energy-efficient designs play an important role for modern hardware and software implementations to prolong battery lifetime or cut power bills for maintenance. With the advanced technology of VLSI circuit designs, a modern processor might operate at different supply voltages by adopting the dynamic voltage scaling (DVS) technique [59], and, hence, the frequency (speed) of the processor can change dynamically. With strong demands of energy-efficiency, DVS CPUs and power-aware subsystems are now adopted in many modern computer systems. Well-known processors for example in embedded systems are Intel StrongARM SA1100 processor [67] and the Intel XScale [68]. Technologies, such as Intel SpeedStep R and AMD PowerNOW! TM, provide DVS for laptop systems to prolong the battery life. For I/O devices, the flash-memory chip by Intel Corp. [35] supports several voltage levels for operations. Generally, different supply voltages lead to different processing speeds. The slower the speed, the less the dynamic power consumption is. In many applications, (average or worst-case) task response This research was supported in part by the National Science Council under grant E Jian-Jia Chen has started his compulsory service in the Fisheries Agency, Council of Agriculture, Executive Yuan, Taiwan, since Dec time is an important non-functional requirement of the system. For example, embedded real-time systems must complete the tasks before their deadlines to maintain the system stability. Energy-efficient scheduling for hard real-time tasks on DVS processors is to minimize the energy consumption, while all the real-time tasks are done in time. Thus far, and in our subsequent discussion, we use the terms task and job as they are commonly used in real-time systems literature [51]. A job is an instance of signal processing, computation, or data retrieval, and so on. A task is a sequence of jobs that have identical or similar characteristics and timing requirements. A periodic task [51] is an infinite sequence of task instances, referred to as jobs, where each job of a task comes in a regular period. In the past decade, energy-efficient task scheduling with different deadline constraints has received a lot of attention. To minimize the energy consumption of a task for a specified system, we could optimize the execution path of the task to reduce the effective switch capacitance [48] or slow down the execution speeds of the task, e.g., [10, 37, 82]. The former optimization could be done during the compilation of the task in the off-line fashion. The latter optimization, surveyed in this paper, is done by the task scheduler and dispatcher. This paper summarizes the state-of-art research results of energy-efficient scheduling for real-time systems on DVS platforms, including uniprocessor and multiprocessor systems. We categorize the related research results into eight categories in different dimensions: The first one is given by aperiodic real-time jobs, while the second one is for periodic realtime tasks. The third one considers tasks with critical sections. The fourth one explores systems exploiting shutdown or sleep operations when the static (leakage) power consumption is non-negligible. The fifth one reduces energy consumption by exploiting the slack time due to the early completion of jobs/tasks. The sixth one minimizes the expected energy consumption for tasks with probability density functions of their workload information. The seventh one explores the energy/powereffectfromi/o subsystems to minimize the system energy consumption. The last one pursues performance maxi-

2 mization under a given energy constraint. The rest of this paper is organized as follows: Section 2 provides summary of DVS systems. Section 3 summarizes research results for uniprocessor energy-efficient scheduling, following by multiprocessor systems in Section 4. Section 5 provides research summary and draws some open issues. 2 DVSModel The power consumption function P (s) of processor speed s on a DVS processor can have two parts: P d (s) and P ind, in which P d (s) is dependent (P ind is independent, respectively) upon speed s [92]. Leakage power consumption mainly contributes to P ind, while the short-circuit power consumption and the dynamic power consumption resulting from the charging and discharging of gates on a CMOS DVS processor contribute to P d (s). The dynamic power consumption can be modeled as a convex function of the processor speed. For example, in CMOS processors [63], the dynamic power consumption P switch (s) due to gate switching at speed s is P switch (s) =C ef V 2 dds, (1) where s = κ (V dd V t) 2 V dd,andc ef,v t,v dd,andκ denote the effective switch capacitance, the threshold voltage, the supply voltage, and a hardware-design-specific constant, respectively (V dd V t 0, κ>0,andc ef > 0). The short-circuit power consumption is proportional to the supply voltage. As a result, the speed-dependent power consumption function P d (s) is a convex and increasing function of the adopted speed. If the leakage power consumption is related to the processor speeds, the leakage power is divided into two parts contributed to P d (s) and P ind. For micro-meter chips, the dynamic power dominates the power consumption, while the leakage power becomes comparable for nanometer scales. We can treat P d (s) as a polynomial function of s with exponents between 0 and 3, i.e.,p d (s) = i b is χi for any b i > 0 and 3 χ i > 0. Throughout the survey, the dynamic energy consumption P d (s)/s to execute a CPU cycle at speed s is assumed to be an increasing function of s in the available speed range, e.g., P d (s) =s χ with χ>1. For example, the power consumption function of Intel XScale can be approximately modeled as a constant plus a cubic function (or at least a quadratic function) of the speed [78, 92]. The number of CPU cycles executed in a time interval is linear in the processor speed. That is, the number of CPU cycles completed in time interval (t 1,t 2 ] is t 2 t 1 s(t)dt, wheres(t) is the processor speed at time t, and the energy consumption is t 2 t 1 P (s(t))dt. The processors considered in the literature have two types: ideal and non-ideal. An ideal processor can operate at any speed in the range of [S min,s max ],wheres min (S max,respectively) is the minimum (maximum,respectively) available speed. A non-ideal processor have only discrete speeds with negligible or non-negligible speed transition overheads. 3 Uniprocessor Energy-Efficient Scheduling Aperiodic Real-Time Jobs Theoretical exploration of DVS systems for real-time jobs was first given by Yao, Demers, and Shenker [82] by considering a set of aperiodic jobs on an ideal processor, in which each job is characterized by its release time, deadline, and execution CPU cycles, and all the jobs are with the same power consumption function P (s) s α. An off-line scheduling algorithm (referred to YDS algorithm in this paper) was proposed to minimize the energy consumption of task executions [82]. The YDS algorithm is a greedy algorithm that first finds the interval [t 1,t 2 ] with the greatest intensity (w(t 1,t 2 )/(t 2 t 1 )), where w(t 1,t 2 ) denotes the work, i.e., CPU cycles, that has release time no earlier than t 1 and has deadline no later than t 2. The processor will run at speed w(t 1,t 2 )/(t 2 t 1 ) during interval (t 1,t 2 ]. Then, the instance is modified as if the time interval (t 1,t 2 ] does not exist. That is, tasks with deadlines greater than t 1 are reduced to max(t 1,d i (t 2 t 1 )) and tasks with release times greater than t 1 are reduced to max(t 1,r i (t 2 t 1 )), and the process is repeated, where r i and d i denote the release time and deadline of job j i, respectively. The greedy algorithm was shown to be optimal for energy minimization to satisfy the timing constraints of all the jobs. Moreover, an on-line competitive algorithm was also proposed in [82] with a constant competitive ratio, while Bansal, Kimbrel, and Pruhs [10] provided tighter analysis to improve the competitive ratio of the algorithm. Ishihara and Yasuura [38] proposed an optimal off-line scheduling algorithm for scheduling frame-based real-time tasks on a non-ideal processor with negligible speed transition overheads., in which all the jobs arrive at time 0 and share a common deadline. They showed that an energy-efficient schedule would use at most two consecutive speeds, in which one is slower than the speed to fully utilize the processor and another is not slower, such that the processor is fully utilized. The result is widely adopted, e.g., [17, 34, 47, 78]. For the job model considered by Yao et al. [82] on non-ideal processors with negligible speed transition overheads, Kwon and Kim [47] derived an optimal solution by fist applying the algorithm for ideal processors in [82] and then using two consecutive speeds to execute jobs. Li and Yao [50] later gave a more efficient algorithm which constructs a schedule with the minimum energy without using the algorithm for ideal processors in [82] as the base. When a job is restricted to execute at one speed only, Chen, Kuo, and Lu [20] proposed a fully polynomialtime approximation scheme (which is a (1+ɛ)-approximation algorithm for any positive ɛ greater than 0 [76]) with (1+ɛ)- approximation for ɛ 1 for the NP-hard problem. Note that, the algorithms in [20, 47, 50, 82] adopted the earliest-deadline-first (EDF) scheduling policy for task scheduling. Although the earliest-deadline-first strategy was an optimal scheduling strategy, the overheadsare much greater than the fixed-priority strategy by specifying a fixed priority for each job. By adopting the fixed-priority scheduling strat-

3 egy, researchers in [60, 61, 70, 85] proposed heuristic energyefficient scheduling algorithms for scheduling tasks/jobs on a DVS processor. Shin and Choi [70] used a run-time checking mechanism: the processor can either be shut down (if there is no current active job) or adopt the speed such that the current active job finishes at its deadline or the release time of the next job. Guan and Hu [60] proposed another heuristic algorithm for fixed-priority real-time jobs. They first calculated the minimum constant speed for a job set in a critical interval to complete in time and then scheduled the job set in the critical interval at the minimum constant speed. All the jobs scheduled after the critical intervals were then considered one after one. In success, Guan and Hu [61] proposed an optimal algorithm with exponential complexity. Yun and Kim [85] proved that the energy-efficient fixed-priority scheduling is NP-hard and developed a fully polynomial-time approximation scheme. Periodic Real-Time Tasks For periodic real-time tasks on an ideal processor, Aydin, Melhem, Mossé, and Mejía-Alvarez [8] showed that an optimal schedule would execute all the tasks at a common speed to fully utilize the processor when all the tasks have the same power consumption function with convex and increasing P (s)/s. Task sets in which different tasks might have different power consumption functions, i.e., different effective switch capacitance, were explored in [7], in which an optimal algorithm was proposed by adopting the Kuhn-Tucker optimization condition. For scheduling periodic real-time tasks on a processor with a finite number of processor speeds, if a job could be executed at more than one processor speed, the algorithm proposed for Problem (P2) by Mejía- Alvarez,Levner,and Mossé in [54] implicitly solves this problem; otherwise, it is a NP-hard problem. A 2-approximation algorithm when the objective is to maximize the energy savings compared to task executions at the highest available speed was proposed in [54]. Chen, Kuo, and Shih [21] proposed a fully polynomial-time approximation scheme to minimize the energy consumption. Note that, the algorithms in [7, 8, 21, 54] applied the earliest-deadline-first scheduling policy for task scheduling, in which tasks are with dynamic priority. For periodic real-time tasks with fixed priorities, Shin, Choi, and Takayasu [71] proposed an off-line algorithm to determine the lowest speed to execute a periodic real-time task set on a DVS processor. Saewong and Rajkumar [66] considered rate-monotonic [51] task scheduling by finding the minimum constant speed for all the tasks to satisfy the schedulability condition of rate-monotonic scheduling. Bini, Buttazzo, and Lipari [12] then developed a speed modulation technique to cope with fixed-priority tasks on non-ideal processors with non-negligible speed transition overheads. Non-preemptible Real-Time Jobs/Tasks For periodic realtime tasks with critical sections, Jejurikar and Gupta [39] proposed an algorithm to calculate the minimum slow down factor to execute jobs in preemptible sections at the slower speed by power 0 0 P (s) (a) P (s) s energy 0 0 P (s)/s s (b) P (s)/s Figure 1. An illustrative example for P (s) and P (s)/s,where s is the critical speed assuming that jobs in non-preemption sections are executed at the highest available speeds. The dual mode algorithm in [42] first derives two speeds for each task, in which one is for the conservative prediction when it is blocked and the other is for the optimistic prediction when it is not blocked. When a job of the task is once blocked by a lower priority task, the remaining executions of the job is executed at the conservative speed. Otherwise, the job is executed at the optimistic speed. Zhang and Chanson [88, 89] proposed a dual-mode heuristic algorithm for systems adopting the EDF scheduling policy with two speeds for executions. For the scheduling of non-preemptible real-time jobs with energy-efficiency, Hong et al. [32] proposed a heuristic algorithm with comparison to the algorithm developed by Yao et al. [82]. Chen, Yang, and Kuo [25] extended the Priority Ceiling Protocol (PCP) by restricting speed adjustments to reduce the overhead on speed switching and the energy consumption. DVSwithPower-DownStrategy For systems with nonnegligible leakage power, i.e., the leakage power plays an important role for power consumption when the supply voltage is close to the threshold voltage. Although the power consumption function P () is a convex and increasing function, the energy consumption function P (s) s to execute a cycle at speed s is merely a convex function. Hence, there exists a critical speed, in which executing any task at any speed less than the critical speed would consume more energy than that at the critical speed. Figure 1 shows an example when P (s) is s 3 + β, where β is a constant. This motivates a combined slowdown and shutdown approach for energy minimization. Irani, Shukla, and Gupta [37] considered the combined problem of DVS and shutdown to schedule a given set of real-time jobs. They proposed a 3-approximation off-line algorithm for ideal processors. Their proposed algorithm first applies the YDS algorithm [82]. Then, those jobs that are executed at speeds higher than the critical speed in the YDS algorithm are executed at their derived speeds, while the other jobs are executed at the critical speed. To schedule the jobs on the fly, once there is no job ready for executions, the algorithm calculates the longest tolerable duration that the processor could be idle so that the remaining jobs would not miss their timing constraints. If the duration is long enough, the processor is turned into the sleep s

4 mode to save energy. The energy consumption is, hence, reduced. Moreover, when there are more than one shutdown state, such as idle, standby, and sleep, they also proposed online competitive algorithms in [36]. For fixed-priority jobs, the research results in [62] provide a scheduling technique that can reduce the overall energy consumption for hard real-time systems scheduled according to a fixed priority scheme. Lee, Reddy, and Krishna [49] addressed procrastination scheduling in periodic real-time systems with dynamic prioritized systems and proposed two scheduling algorithms. Procrastination by a component refers to its choice to enter or remain in a shutdown mode even when there are pending tasks. Their proposed algorithms were extended by Jejurikar and Gupta [40] and Chen and Kuo [19] for fixed-priority systems and Jejurikar, Pereira, and Gupta [44] and Niu and Quan [57] for dynamic-priority systems with periodic real-time tasks. For non-dvs systems with dormant states, Baptiste [11] proposed an algorithm based on dynamic programming to determine moments to turn on/off the processor when aperiodic real-time jobs with the same execution time are considered. When there are multiple states, Augustine et al. [5] determined the state that the processor should enter for aperiodic real-time jobs and proposed a competitive algorithm for on-line usage. Slack Reclamation For reclaiming the slacks resulting from the early completion times of tasks, different strategies were proposed for different system models. Slack reclamation was studied to reduce energy consumption in an on-line fashion by using the slack left by some completed task instances, e.g., [8, 41, 58]. The idea behind the slack reclamation for the reducing of energy consumption is to exploit the slack time to slowdown the execution speeds of the remaining jobs [8, 58] or shutdown the processor to prevent from the energy consumption resulting from the leakage power consumption (the static power consumption) [41]. Expected Energy Consumption In contrast to slack reclamation, we can have better energy-efficient strategies if the information the workload distribution of a task can be obtained by profiling. With the probability distribution of workload, researchers in [29, 31, 52, 78, 84, 91] provide DVS scheduling strategies to reduce the expected energy consumption for ideal processors. Lorch and Smith [52] derived an accelerating frequency scheduling by executing a task at a lower frequency at the beginning and at higher frequencies for the rest, while concurrent tasks were treated as joint workload. Gruian [29] considered the scheduling of multiple tasks and allocated execution time to tasks based on their worst-case execution cycles. Yuan and Nahrstedt [84] exploited the accelerating scheduling strategy for soft real-time multimedia tasks. Xu et al. [78] and Zhang et al. [91] explored inter-task scheduling for framebased real-time tasks, in which all the tasks share a common deadline and arrive at the same time. Gruian and Kuchcinski [31] presented heuristics for task ordering to reduce the expected energy consumption. For non-ideal processors, Xian and Lu [77] and Xu et al. [78] extended the accelerating scheduling by applying the result in [38] to use two adjacent frequencies for execution. System-Wide Energy-Efficient Scheduling The energyefficient task scheduling problems are complicated with the considerations of non-dvs peripheral devices. The stretching of the execution time of a task might lead to more energy consumption on devices although some energy saving is obtained because of DVS scheduling over the processor. Energyefficient task scheduling should consider the energy consumption of both the processor and devices! In this direction, Swaminathan et al. [74, 75] explored dynamic power management of real-time tasks in shutting down system devices for energy efficiency without DVS considerations. Cheng and Goddard [26] explored on-line I/O subsystem schedules without DVS capability in the system, while extensions are made for task sets with non-preemptible sections in [27]. Jejurikar et al. [43] proposed a heuristic algorithm to determine the execution speeds of periodic real-time tasks in a system with discrete available speeds to minimize the energy consumption. Zhuo and Chakrabarti [94] developed an algorithm which consists of an off-line phase to determine the minimum speed for the execution of a task and an on-line phase for dynamic scheduling to reclaim the unused time when tasks might finish its execution earlier than the worst-case estimation. Aydin, Devadas, and Zhu [6] extended the algorithm in [7] for tasks with different power consumption functions to derive a static schedule with I/O considerations. Mochocki et al. [56] provided algorithms which consider energy consumption minimization of the processor and an associated networking interface at the same time. Kim et al. [45] developed an algorithm which minimizes the number of preemption in a dynamic schedule. Preemption control was improved by Yang, Chen, and Kuo [81] by considering the tolerable blocking time of higher-priority task instances. Energy-Constrained Scheduling For some systems, the minimization of the energy consumption might not be the objective, but the maximization of the system performance under given energy and timing constraints is pursued, such as researches in [2, 22, 64, 65, 86, 87]. Reward-based energyconstrained scheduling of real-time tasks has been explored in the literature to maximize the total reward under a given energy constraint. When frame-based real-time tasks are considered, the first known heuristic algorithms were proposed by Rusu, Melhem, and Mossé [64]. Alenawy and Aydin [1] later proposed heuristic algorithms for rewardbased energy-constrained scheduling of periodic real-time tasks in both off-line and on-line fashions. Meanwhile, Chen, Kuo, and Yang [22] proposed a 2-approximation al-

5 gorithm and a fully polynomial-time approximation scheme for reward-based energy-constrained scheduling of framebased real-time tasks with the same power consumption function when voltage scaling could be done at arbitrary time points. Researchers have started exploring reward-based energy-constrained scheduling of real-time tasks with multiple execution versions. In particular, Rusu et al. [65] extended their previous work on energy-constrained scheduling of realtime tasks with different reward values for different execution versions. In many of the related results, e.g., [22, 64, 65], the system receives some rewards only when the corresponding task execution completes in time. Some study considers partial rewards for partial execution of a task, e.g., [86, 87]. AlEnawy and Aydin [3] proposed a framework to minimize the number of dynamic failures (in terms of (m,k)-firm deadline constraints) without violating the energy constraint. 4 Multiprocessor Energy-Efficient Scheduling Multiprocessor implementations of real-time systems could be more energy-efficient than uniprocessor implementations, due to the convex power consumption functions. Unfortunately, multiprocessor energy-efficient scheduling is often NP-hard under various application constraints. 4.1 Homogeneous Multiprocessor Systems Frame-based Real-Time Tasks Gruian [28] proposed a simulated annealing (SA) approach in multiprocessor energyefficient scheduling for tasks with precedence constraints. In [30], a power-aware scheduling algorithm based on a list heuristics with a dynamic priority assignment was proposed to determine the amount of time allocated to each task. Zhang et al. [90] proposed a heuristic algorithm in which each task was first assigned to a proper processor, and the processor speed in executing each task was then chosen without violating the precedence and timing constraints. Mishra et al. [55] explored scheduling issues on the communication delay of tasks. The first known approximation algorithm for multiprocessor energy-efficient scheduling was proposed by Chen et al. [13] by considering a set of frame-based real-time tasks with the same power consumption function on homogeneous multiprocessor systems. The developed algorithm partitions tasks onto processor with the smallest execution cycles by the largest-execution-cycle first strategy in a greedy manner. After task partition is done, each processor executes the assigned tasks with the minimum energy consumption independently by applying the algorithm in [7]. Theoretical analysis shows that the energy consumption of the scheduled derived from their algorithm is at most 1.13 times of the minimum energy consumption when P (s) s α with 2 α 3. For frame-based real-time tasks with different power consumption functions, Chen and Kuo [16] proposed a approximationalgorithm based on a Kuhn-Tucker optimality condition. When all the cores (processors) in the system must be operated at the same speed at any time instant, Yang, Chen, and Kuo [80] proposed a approximation algorithm. Chen et al. [13], also showed that deriving a feasible schedule when the number of speeds is finite is a NP-complete problem regardless of energy minimization is pursued or not. Their proposed largest-task-first strategy can bound the violation on processor speeds by a constant factor. For systems with the possibility on task rejection, Chen et al. provided hardness analysis and heuristic algorithms [23]. Periodic Real-Time Tasks Heuristic algorithms for periodic tasks in multiprocessor environments were proposed in [2, 9] by exploiting the well known bin-packing algorithms for task partition and scheduling tasks in a processor individually. For periodic real-time tasks, Chen et al. [14] proved that Algorithm Largest-Task-First is a 1.13-approximation algorithm for periodic real-time tasks with the same power consumption characteristics. For periodic real-time tasks with different power consumption characteristics, a approximation algorithm was proposed [15]. In addition to the considerations of energy-efficient scheduling, Anderson and Sanjoy [4] explored the tradeoff between the total energy consumption of task executions and the number of required processors, where tasks in the proposed solutions run at the same speed. Moreover, Suh et al. [72, 73] considered real-time systems with homogeneous and heterogeneous rechargeable processors. Leakage-Aware Energy-Efficient Scheduling Xu et al. [79] considered multiprocessor leakage-aware scheduling to determine the number of activated processors. In [79], the power consumption resulting from the leakage current is assumed to be a constant β, and the power consumption function P() is modelled as P (s) =s 3 + β, wheres is the execution speed [37, 82]. Chen et al. [14] proposed a polynomialtime approximation algorithm for the minimization of energy consumption and the satisfaction of task timing constraints, when the overheads in turning on/off a processor are negligible, and there is no upper bound on the processor speeds. When the overheads are non-negligible, optimal solutions might require more than one processor for energy minimization, and the minimum available speed is 0, a polynomialtime approximation algorithm is proposed to partition tasks on processors in an off-line manner and to determine the activation/dormant time in an on-line fashion [14]. When the minimum available speed is more than 0, the proposed algorithm has a 2 approximation bound [14]. Slack Reclamation Zhu et al. [93] proposed an algorithm in which a global queue of ready tasks is used for the selection of a candidate such that the slack time, due to the early completion of another task, is used to slow down the execution speed of the selected task. The algorithm is for a set of independent/dependent frame-based tasks in multiprocessor envi-

6 ronments. For frame-based real-time tasks, Chen, Yang, and Kuo [24] proposed a slack reclamation scheme to reduce the energy consumption in the run time. The scheme consists of two phases: the task remapping phase and the slack reclaiming phase, where tasks are independent and have the same arrival time and share a common deadline. Tasks are reassigned to processors dynamically, and the slack time is reclaimed to slow down the execution speeds of the remaining tasks for energy efficiency. 4.2 Heterogeneous Multiprocessor Systems Periodic Real-Time Tasks Among the work for heterogeneous multiprocessor systems, Yu and Prasanna [83] considered the minimization of energy consumption for systems. The proposed algorithm is based on integer linear programming without guarantees on the schedulability of a derived solution [83]. Luo and Jha [69] proposed list-scheduling-based heuristics for the scheduling of real-time tasks with precedence constraints in heterogeneous distributed systems. Genetic listscheduling algorithms were developed in [53]. Hung, Chen, and Kuo [34] explored energy-efficient scheduling of periodic real-time tasks in a heterogeneous system with two processing elements, in which one is a processor with the DVS capability and another is a PE without the DVS capability. A series of approximation algorithms was proposed to minimize the energy consumption or maximize the energy saving, compared to the executions of tasks on the DVS processor. Allocation Cost Minimization under Energy Constraints The synthesis problem for energy-efficient task scheduling of periodic hard real-time tasks under a given processor cost constraint was first explored in [46], where processors might have different costs. In addition to the energy-efficient real-time task scheduling, energy-constrained designs in the minimization of the of allocation cost was also explored in the literature. Hsu, Chen, and Kuo [33] showed that the problem is NP-hard in a strong sense. Besides, they also proved that there does not exist any polynomial-time approximation algorithm with a constant approximation ratio by providing an L-reduction. Hsu et al. [33] then developed polynomial-time approximation algorithms based on a rounding technique by applying a parametric relaxation on an integer linear programming formula. Chen and Kuo [18] proposed a 1.5-approximation algorithm with constant violations and a 2-approximation algorithm when there is only one processor type with continuously available speeds and provided extensions to ideal and non-ideal processor types with multiple processor types. 5 Summary Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. This paper summarizes the state-of-art research results for energy-efficient algorithms of real-time tasks in DVS systems. Although DVSrelated issues have been explored for a decade and many excellent researches have be done, there are still many open problems. For example, how to efficiently derive an optimal solution to minimize the expected energy consumption for periodic tasks or aperiodic jobs is still open, since now we can only have solutions for frame-based real-time tasks [78, 91] with heuristics for task execution order [31]. Moreover, energy-efficient scheduling for tasks with precedence constraints with theoretical analysis is still missed in multiprocessor systems. Another issue is on the heterogeneity of components, because heterogeneous computing systems will become even more popular in the near future, especially when chip makers start to provide chip multiprocessor systems, such as Intel and AMD Dual Core processors. It is also important for embedded systems since most embedded systems consists of a general-purpose microprocessor and several digital signal processing (DSP) units. Heterogeneity is also introduced in systems-on-a-chip (SoCs) since reconfigurable devices have been widely adopted. Only few results have been proposed for heterogeneous multiprocessor systems, and, hence, it is important for future study to have both theoretical and practical research results for such systems. Some other issues such as energy-efficient scheduling for resource competition, task procrastination, and I/O subsystems, and so on still need more efforts. Yet another issue is temperature-aware or temperatureconstrained scheduling to reduce the system failure and to improve the system reliability. Temperature and energy are physical entities with different properties. Since heat dissipation is proportional to the power consumption, dynamic voltage scaling is again an effective way to minimize the temperature by slowing down the speed. How to minimize the energy consumption under temperature constraints and timing constraints will become important in the near future. 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