Parametric Variation Analysis of SEPIC Converter for Constant Voltage Applications

Transcription

1 Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) Parametric Variation Analysis of SEPIC Converter for Constant Voltage Applications Kanchan Pal 1, Rheesabh Dwivedi 1 M.Tech Scholar, Department of Electrical Engineering, Baddi University of Emerging Sciences & Technology, Solan (H.P) India Assistant Professor, Department of Electrical Engineering, Teerthanker Mahaveer University, Moradabad (U.P) India Abstract This paper aims at designing of an optimized controller for non-isolated DC-DC Single-Ended Primary- Inductance converter (SEPIC) for constant voltage applications. The SEPIC converter can both step up and step down the input voltage, while maintaining the same polarity and the same ground reference for the input and output. MOSFETs are used as a switching device in low power and high frequency switching applications. It may be noted that, as the turn-on and turn-off time of MOSFETs are lower as compared to other switching devices, which reduces the switching losses. High frequency operation of MOSFET reduced size of filters components. These converters are now being used for various applications, such as Switched Mode Power Supply (SMPS) etc. The paper attempts to present parametric variation analysis of SEPIC converters for constant voltage output Keywords Non-Inverting SEPIC Converter, PI Controller, Duty cycle, PWM. I. INTRODUCTION With the use of power electronics devices, high efficiency conversion of energy may be accomplished. One area where these devices are used is in dc-dc converters. These converters act as DC transformers due to their ability to change a dc voltage from one level to another with high efficiency. The SEPIC converter allows for dc voltage at one level to be either raised or lower, depending on the switch duty cycle. The output filter consisting of an inductor and a capacitor is an important part of the DC-DC converter, its size is important. The inductor characteristics affect output ripple as well as circuit stability. The inductor s important parameters include its value, saturation current, and core material. It is widely used in electrical power system communication, instruments and meters etc. This paper discusses all these parametric variation analysis for the design of an optimized controller and a buck-boost DC-DC converter, while presenting the result of analysis. II. OPERATION CIRCUIT MODEL FOR SEPIC CONVERTER The converter circuit is divided into two parts. During mode 1, When switch S is closed then current increases and the current also increases in the negative direction. Since S is a short while closed then instantaneous voltage is approximately and the voltage is approximately. Therefore, the capacitor supplies the energy to increase the magnitude of the current in and thus increase the energy stored in. During Mode, When switch S is open then current which flows in the capacitor i.e becomes the same as the current. The current will continue in the negative direction. It can be seen from the diagram that a negative will add to the current to increase the current delivered to the load. Then S is off, power is delivered to the load from both and. however is being charged by during this off cycle, and will in turn recharge during the on cycle. S Figure 1. Mode:1 when switch is closed D 1 R 478

2 i Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) D 1 Pulse Generator i + - Li Ci + - D S R AC A B + - g m D S Lo Co R + - v Scope Universal Bridge + - Figure. Mode: When switch is open CONTROLLER Figure 3. DC-DC Closed loop SEPIC converter In Figure 3. a DC-DC SEPIC converter is shown. The switching period is T and the duty cycle is D. The average output voltage can be calculated in term of the switch duty cycle. D = on time duration of switch/ total switching time period. Duty cycle = Output voltage ( ) = [ ] Control schematic of SEPIC converter output voltage is assumed to be 4V. A simple SEPIC converter model realize in MATLAB Simulink is shown in figure 4. S D 1 R Figure 4. Simulink model of open loop non- isolated SEPIC converter A. Design parameter and equations for non-isolated SEPIC converter: = = = Where, = switching frequency = peak to peak ripple current (assuming 1% of ) = peak to peak ripple current (assuming 1% of ) = voltage ripple (assuming 5% of ) D = duty cycle Calculated value of design variables are Duty cycle (D) = 56.5%, Boost inductor ( ) = mh, Ripple filter inductor ( = 7 mh, Boost capacitance ( ) = 1.15 µf, Ripple filter capacitance ( ) = 1.15 µf Figure 5. Open loop response of non-isolated SEPIC converter 479

3 g i Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) The results of open loop SEPIC converter is shown in figure 5, which depicts peak to peak ripple voltage ( Vo) is 53 Volt and maximum o v e r s h o o t of 1%. Since the design equations assume constant input voltage and constant load under steady state conditions, the variation of input voltage shall result in fluctuation in output Therefore, a closed loop controller is required with optimized parameters to suit the constant voltage output as per requirement of load. B. Controller for closed loop SEPIC converter give design equations: The Simulink Schematic of SEPIC converter with analog PI controller is shown in figure Time (Secs) 1 i + - Li Ci + - D.5 AC A + B - Universal Bridge m D S Lo Co R + - v Time (Secs) Constant PI PI Controller Out 1 In1 Out PWM Scope 1.5 Figure 6. Closed loop SEPIC converter realize in Simulink The output voltage is sensed V out and compared with the input voltage V ref.an error signal is produced which is processed through PI controller to generate a control voltage. The control voltage is used to feed to the PWM generator for control of switch. The PI controller has two parameters namely K P and K I. PI controller has transfer function: C(s) = + Where, =Proportional gain and = Integral gain Time (Secs) Figure 7. Closed loop response of non-isolated SEPIC The results of closed loop SEPIC converter is shown in fig.7 which has maximum overshoot of 3.%, settling time.116 sec and rise time.17 sec. 48

4 % Over Shoot Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) III. EFFECT DUE TO VARIATION OF PARAMETERS ON OUTPUT VOLTAGE AND INDUCTOR CURRENT Table-I Results of boost inductor (L i) variation Voltage(Vo) Current (Li) Current (Lo) Li (mh) O.S Settling Rise O.S Settling Rise O.S Settling Rise (%) Time Time (%) Time Time (%) Time Time (mh) (mh) (mh) Fig.8.1 Effect on overshoot due to Fig.8. Effect on settling time due to Fig.8.3 Effect on rise time due to Figure 8. Effect on output voltage (V O) due to When the value of boost inductor ( increases up to two times of the designed value then output voltage ( overshoot and rise time remains constant however settling time increases. If the value of boost inductor ( decreases from its designed value then output voltage ( overshoot, settling time and rise time continuously decreases (mh) (mh) (mh) Fig.9.1 Effect on overshoot due to Fig.9. Effect on settling time due to.1 Figure 9. Effect on inductor current (IL i) due to Fig.9.3 Effect on rise time due to 481

5 Settling Time (Secs) % Over Shoot Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) When the value of boost inductor ( increases up to two times of the designed value then boost inductor current ( overshoot continuously decreases, settling time and rise time remains constant. 6 4 If the value of boost inductor ( decreases from its designed value then boost inductor current ( overshoot continuously decreases, settling time remains constant and rise time increases (mh) (mh) (mh) Fig.1.1 Effect on overshoot due to Fig.1. Effect on settling time due to Figure 1. Effect on inductor current (IL o) due to Fig.1.3 Effect on rise time due to When the value of boost inductor ( increases up to two times of the designed value then filter inductor current ( overshoot and rise time remains constant however settling time continuously increases. If the value of boost inductor ( decreases from its designed value then filter inductor current ( overshoot and rise time continuously decreases however settling time remains constant. Table-II Results of filter inductor (L o) variation Voltage ) Current ( ) Current ( ) Lo (mh) O.S Settling Rise O.S Settling Rise O.S Settling Rise (%) Time Time (%) Time Time (%) Time Time Fig.11.1 Effect on overshoot due to Fig. 11. Effect on settling time due to Fig Effect on rise time due to variation in filter inductor ( ) Figure 11. Effect on output voltage (V O) due to 48

6 % Over Shoot Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) When the values of ripple filter inductor ( increases up to two and half times of the designed value then output voltage ( overshoot, settling time and rise time continuously increases If the values of ripple filter inductor ( decreases up to seven times from its designed value then output voltage ( overshoot remains constant, settling time and rise time continuously decreases Fig.1.1 Effect on overshoot due to When the value of ripple filter inductor ( increases up to two and half times of the designed value then boost inductor current ( overshoot increases, settling time and rise time remains constant. Fig. 1. Effect on settling time due to Figure 1. Effect on inductor current (IL i) due to Fig. 1.3 Effect on rise time due to variation in filter inductor ( ) If the values of ripple filter inductor ( decreases up to seven times from its designed value then boost inductor current ( overshoot, settling time and rise time remains constant Fig.13.1 Effect on overshoot due to Fig. 13. Effect on settling time due to Fig Effect on rise time due to variation in filter inductor ( ) When the value of ripple filter inductor ( increases up to two times of the designed value then filter inductor current ( overshoot remains constant, settling time increases, rise time increases and finally its become constant. Figure 13. Effect on inductor current (IL O) due to If the values of ripple filter inductor ( decreases up to seven times from its designed value then filter inductor current ( increases, settling time and rise time continuously decreases. 483

7 % Over Shoot Settling Time (Secs) Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) (µf) O.S (%) Table-III Results of boost capacitor (C i) variation Voltage( ) Current ( ) Current ( ) Settling Rise O.S Settling Rise O.S Settling Time Time (%) Time Time (%) Time Rise Time Fig Effect on over shoot due to Fig. 14. Effect on settling time due to Fig Effect on rise time due to When the value of boost capacitor ( increases up to nine times of the designed value then output voltage ( overshoot increases, settling time remain constant, rise time increases and finally become constant Figure 14. Effect on output voltage (V O) due to If the values of boost capacitor ( decreases from the designed value then output voltage ( overshoot and rise time decreases however settling time remains constant Fig Effect on over shoot due to Fig. 15. Effect on settling time due to Fig Effect on rise time due to Figure 15. Effect on inductor current (IL i) due to 484

8 Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) When the value of boost capacitor ( increases up to nine times of the designed value then boost inductor current ( overshoot and settling time increases however rise time remains constant. If the values of boost capacitor ( decreases from the designed value then boost inductor current ( overshoot decreases however settling time and rise time remains constant Fig Effect on over shoot due to Fig. 16. Effect on settling time due to Fig Effect on rise time due to Figure 16. Effect on inductor current (IL O) due to When the value of boost capacitor ( increases up to If the values of boost capacitor ( decreases from the nine times of the designed value then filter inductor current designed value then filter inductor current ( overshoot, ( overshoot, settling time and rise time are continuously settling time and rise time are continuously decreases. increases. Table-IV Results of filter capacitor (Co) variation Voltage( ) Current ( ) Current ( ) (µf) O.S Settling Rise O.S Settling Rise O.S Settling Rise (%) Time Time (%) Time Time (%) Time Time

9 % Over shoot % Over Shoot Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) Fig Effect on over shoot due to Fig. 17. Effect on settling time due to Fig Effect on rise time due to When the value of filter capacitor ( increases up to six times of the designed value then output voltage ( overshoot increases, settling time initially decreases and again its start increases however rise time continuously decreases. Figure 17. Effect on output voltage (V O) due to variation in filter capacitor ( ) If the values of filter capacitor ( decreases up to ten times from the designed value then output voltage ( overshoot decreases, settling time and rise time are increased Figure 18. Effect on inductor current (IL i) due to variation in filter capacitor ( ) When the value of filter capacitor ( increases up to six times of the designed value then boost inductor current ( overshoot and settling time continuously increases however rise time remains constant value. 3 1 Fig Effect on over shoot due to 5 1 Fig Effect on over shoot due to Fig. 18. Effect on settling time due to Fig. 19. Effect on settling time due to If the values of filter capacitor ( decreases up to ten times from the designed value then boost inductor current ( overshoot decreases, settling time and rise time increases Figure 19. Effect on inductor current (IL O) due to.1 Fig Effect on rise time due to Fig Effect on rise time due to 486

10 Website: (ISSN 5-459, ISO 91:8 Certified Journal, Volume 4, Issue 5, May 14) When the value of filter capacitor ( increases up to six times of the designed value then output filter inductor current ( overshoot increases, settling time initially decreases and again its start increases however rise time continuously decreases. If the values of filter capacitor ( decreases up to ten times from the designed value then filter inductor current ( overshoot decreases, settling time and rise time increases. IV. CONCLUSION The parametric variation analysis of non-isolated SEPIC converters has been carried out for constant voltage applications considering inductor and capacitor as performance parameters. Non-isolated SEPIC converter has been designed to deliver 4 volts DC to a 4 watt load. Performance and applicability of this converter is presented on the basis of simulation in MATLAB SIMULINK. The design concepts are validated through simulation and results obtained show that a closed loop system using SEPIC converter will be highly stable with high efficiency. SEPIC converter can be used for universal input voltage and wide output power range. Better efficiency due to: moderate duty cycles, lower voltage MOSFETs and rectifiers, and reduced switching losses due to reduced peak-to-peak voltage swing. If the parameter of SEPIC converter is varied in wide range then the output response does not much vary much. The closed loop SEPIC converter has an efficiency of 96.43%. REFERENCES [1] Sanjeev Singh and Bhim Singh, Power quality improved PMBLDCM drive for adjustable speed application with reduced sensor buck-boost PFC converter in proc. IEEE 11th ICETET, 11, pp [] Sanjeev Singh and Bhim Singh, Comprehensive study of singlephase AC-DC power factor corrected converters with highfrequency isolation IEEE Trans. on Industrial Informatics, vol. 7, no. 4, Nov. 11,, pp [3] Boopathy.K and Dr.Bhoopathy Bagan.K, Buck Boost converter with improved transient response for low power applications in Proc. IEEE SIEA, Sep 11, pp [4] Altamir Ronsani and Ivo Barbi, Three-phase single stage AC-DC buck-boost converter operating in buck and boost modes in Proc. IEEE, 11, pp [5] Sanjeev Singh and Bhim Singh, An adjustable speed PMBLDCM drive for air conditioner using PFC Zeta converter, Int. J. Power Electron. (IJPElec), vol. 3, no., pp , Apr. 11. [6] Sanjeev Singh and Bhim Singh, Power Electronics, Drives and Energy Systems (PEDES), in Proc. IEEE PEDES 1. [7] Sanjeev Singh and Bhim Singh, Single-phase power factor controller topologies for permanent magnet brushless DC motor drives, in IET Power Electron., 1, Vol. 3, Iss., pp [8] Sanjeev Singh and Bhim Singh, A voltage controlled adjustable speed PMBLDCM drive using a single-stage PFC half-bridge converter, in Proc. IEEE APEC 1, 1, pp [9] Marcos Orellana, Stephane Petibon and Bruno Estibals, Four switch buck-boost converter for photovoltaic DC-DC ower applications in proc. IEEE, ISGE, 1, pp [1] Bor-Ren Lin and Chun-Chi Chen, Soft switching isolated Sepicconverter with the Buck-Boost type of active clamp in proc. IEEE ICIEA, 3-5 May 7, pp