Datasheet. Embedded. Storage. Solutions. Embedded. SATAIII CFast Card. CFS3FSeries CFXXXXXR6-XX13XXXX

Transcription

1 Embedded Storage Embedded SATAIII CFast Card Solutions CFS3FSeries CFXXXXXR6-XX13XXXX V1.5 1

2 Table of Contents 1. Description Features Interface Description Card pin Assignment Card Block Diagram ATA Command Error Detection and Correction Wear-Leveling Bad Blocks Management Physical Outline CFS3F CFast Card Overlook CFS3F CFast Card Dimensions Ordering Information Contact Information V1.5 2

3 Revision History Revision Date Description Remark V Added Micron MLC 20nm Wide-Temp part number. V Added Toshiba MLC A19nm part numbers. Remove Micron MLC wide-temp part numbers. V Added Toshiba 15nm part number. Remove Micron 20nm part number. V Added Toshiba 15nm MLC 8GB part number. V Added Toshiba 15nm MLC 128GB part number. V1.5 3

4 1. Description CFS3F series is all new industrial SATA 3.0 (6Gb/s) high-speed transmission interface CFast 2.0 memory card. This card Compliant with CFA CFast 2.0 specifications, and designed with new generation controller that easily exceed the performance limit for CompactFlash, and providing more high speed and more stable data transmission efficiency. This card build in Global wear-leveling algorithm technology eliminates excessive write operation and extends product life, and 66-bit/1KB ECC (Error Correction Code) functionality ensures highly reliable of data transfer and data integrity. 2. Features CFast Specification Version 2.0 Compliant Fully compatible with devices and OS that support the SATA 6Gb/s standard Memory Capacities SLC: 4GB / 8GB / 16GB / 32GB MLC: 8GB / 16GB/ 32GB / 64GB / 128GB High performance and reliability Operating voltage only 3.3V operation Operating as Boot Disk Code Storage Device for Embedded Operating System Built-in 66bit/1KB ECC (Error Correction Code) functionality ensures highly reliable of data transfer. Global wear-leveling algorithm eliminates excessive write operation and extends product life. Support S.M.A.R.T (Self-defined) Support Security Command Operation Temperature range: Normal Temp: 0 to 70. Wide-Temp:-40 to 85. Storage Temperature range: -55 to 90. Humidity (Non condensation): 0% to 95% SLC Read: Up to MB/sec(Max.), Write: Up to MB/sec(Max.) MLC Read: Up to MB/sec(Max.), Write: Up to MB/sec(Max.) Noiseless and stable installation to system Fully Compliant with RoHS & REACH CE and FCC Compatibility Warranty: SLC 5Year / MLC 3Year V1.5 4

5 3. Interface Description 3.1. Card pin Assignment Table 1: CFS3F CFast Card pin Assignment 3.2. Card Block Diagram CFS3F is designed to operate and work as Data or Code Storage device by NAND Flash Memory and its Controller through Serial ATA Standard Interface to Host Systems. Figure 1: CFS3F CFast Block Diagram V1.5 5

6 3.3 ATA Command Command Code Protocol General Feature Set Execute Device Diagnostic 90h Execute device diagnostic Flush Cache E7h Non-data Identify Device ECh PIO data-in Initialize Drive Parameters 91h Non-data Read DMA C8h DMA Read Log Ext 2Fh PIO data-in Read Multiple C4h PIO data-in Read Sector(s) 20h PIO data-in Read Verify Sector(s) 40h or 41h Non-data Set Feature EFh Non-data Set Multiple Mode C6h Non-data Write DMA CAh DMA Write Multiple C5h PIO data-out Write Sector(s) 30h PIO data-out NOP 00h Non-data Read Buffer E4h PIO data-in Write Buffer E8h PIO data-out Power Management Feature Set Check Power Mode E5h or 98h Non-data Idle E3h or 97h Non-data Idle Immediate E1h or 95h Non-data Sleep E6h or 99h Non-data Standby E2h or 96h Non-data Standby Immediate E0h or 94h Non-data Security Mode Feature Set Security Set Password F1h PIO data-out Security Unlock F2h PIO data-out Security Erase Prepare F3h Non-data Security Erase Unit F4h PIO data-out Security Freeze Lock F5h Non-data Security Disable Password F6h PIO data-out V1.5 6

7 Command Code Protocol SMART Feature Set SMART Disable Operations B0h Non-data SMART Enable/Disable Autosave B0h Non-data SMART Enable Operations B0h Non-data SMART Execute OFF-LINE Immediate B0h Non-data SMART Read Log B0h PIO data-in SMART Read Data B0h PIO data-in SMART Read Threshold B0h PIO data-in SMART Return Status B0h Non-data SMART Save Attribute Values B0h Non-data SMART Write Log B0h PIO data-out Host Protected Area Feature Set Read Native Max Address F8h Non-data Set Max Address F9h Non-data Set Max Set Password F9h PIO data-out Set Max Lock F9h Non-data Set Max Freeze Lock F9h Non-data Set Max Unlock F9h PIO data-out 48-bit Address Feature Set Flush Cache Ext EAh Non-data Read Sector(s) Ext 24h PIO data-in Read DMA Ext 25h DMA Read Multiple Ext 29h PIO data-in Read Native Max Address Ext 27h Non-data Read Verify Sector(s) Ext 42h Non-data Set Max Address Ext 37h Non-data Write DMA Ext 35h DMA Write Multiple Ext 39h PIO data-out Write Sector(s) Ext 34h PIO data-out NCQ Feature Set Read FPDMA Queued 60h DMA Queued Write FPDMA Queued 61h DMA Queued Others Data Set Management 06h DMA Seek 70h Non-data Table 2: ATA Command V1.5 7

8 3.4 Error Detection and Correction Highly sophisticated Error Correction Code algorithms are implemented. The ECC unit consists of the Parity Unit (parity-byte generation) and the Syndrome Unit (syndrome-byte computation). This unit implements an algorithm that can correct 66 bits per 1024 bytes in an ECC block. Code-byte generation during write operations, as well as error detection during read operation, is implemented on the fly without any speed penalties. 3.5 Wear-Leveling Flash memory can be erased within a limited number of times. This number is called the erase cycle limit or write endurance limit and is defined by the flash array vendor. The erase cycle limit applies to each individual erase block in the flash device. CFast uses a static wear-leveling algorithm to ensure that consecutive writes of a specific sector are not written physically to the same page/block in the flash. This spreads flash media usage evenly across all pages, thereby extending flash lifetime. 3.6 Bad Blocks Management Bad Blocks are blocks that contain one or more invalid bits whose reliability are not guaranteed. The Bad Blocks may be presented while the SSD is shipped, or may generate during the life time of the SSD. When the Bad Blocks is detected, it will be flagged, and not be used anymore. The SSD implement Bad Blocks management and replacement, Error Correct Code to avoid data error occurred. The functions will be enabled automatically to transfer data from Bad Blocks to spare blocks, and correct error bit. After the reserved block less than 10 of each channel, the SSD will be locked, and cannot be read and written anymore. Host can send a vendor ATA command to unlock the SSD for backup data or system from SSD. V1.5 8

9 4. Physical Outline 4.1 CFS3F CFast Card Overlook Figure 2: CFS3F CFast Overlook 4.2 CFS3F CFast Card Dimensions Parameter Length Width Thickness Specifications /- 0.15mm /- 0.1mm 3.30 mm Table 3 : CFS3F CFast Card Physical Dimension V1.5 9

10 5. Ordering Information P/N Capacity Flash Type Temp CFC004GR6-F513A006 4GB CFC008GR6-F613A006 8GB CFC016GR6-F613A006 16GB Normal Temp CFC032GR6-F613A006 32GB CFI004GR6-F513A006 4GB Toshiba 24nm SLC CFI008GR6-F613A006 8GB CFI016GR6-F613A006 16GB Wide Temp CFI032GR6-F613A006 32GB CFC008GR6-G613A00C 8GB CFC016GR6-G613A00C 16GB CFC032GR6-G613A00C 32GB Toshiba 15nm MLC Normal Temp CFC064GR6-G713A00C 64GB CFC128GR6-G813A00C 128GB 6. Contact Information ACPI, a storage business company, specializes in the design and marketing of SSD, EDM, and Industry CF / CFast Card products. For further information, please reach us at the following contact information: ACPI Digital Co., Ltd. TEL: FAX: sales@acpidigital.com Address: 11F.-3, No.186, Jian 1st Rd., Zhonghe Dist., New Taipei City 235, Taiwan (R.O.C.) V1.5 10