dspic33f Family Data Sheet

Transcription

1 Family Data Sheet High-Performance, 16-bit Digital Signal Controllers 2005 Microchip Technology Inc. Advance Information DS70165A

2 Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dspic, KEELOQ, microid, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfpic, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dspicdem, dspicdem.net, dspicworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzylab, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rflab, rfpicdem, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October The Company s quality system processes and procedures are for its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS70165A-page ii Advance Information 2005 Microchip Technology Inc.

3 High-Performance, 16-bit Digital Signal Controllers Operating Range DC 40 MIPS ( V, -40 C to +85 C) Industrial temperature range (-40 C to +85 C) High-Performance DSC CPU Modified Harvard architecture C compiler optimized instruction set 16-bit wide data path 24-bit wide instructions Linear program memory addressing up to 4M instruction words Linear data memory addressing up to 64 Kbytes 84 base instructions: mostly 1 word/1 cycle Sixteen 16-bit General Purpose Registers Two 40-bit accumulators: - With rounding and saturation options Flexible and powerful addressing modes: - Indirect, Modulo and Bit-Reversed Software stack 16 x 16 fractional/integer multiply operations 32/16 and 16/16 divide operations Single-cycle multiply and accumulate: - Accumulator write back for DSP operations - Dual data fetch Up to ±16-bit shifts for up to 40-bit data Direct Memory Access (DMA) 8-channel hardware DMA: - 6-channel hardware DMA in devices marked PS 2 Kbytes dual ported DMA buffer area (DMA RAM) to store data transferred via DMA: - Allows data transfer between RAM and a peripheral while CPU is executing code (no cycle stealing) - 1 Kbyte DMA RAM in devices marked PS Most peripherals support DMA Interrupt Controller 5-cycle latency 118 interrupt vectors Up to 67 available interrupt sources: - Up to 63 available interrupt sources in devices marked PS Up to 5 external interrupts 7 programmable priority levels 5 processor exceptions Digital I/O Up to 85 programmable digital I/O pins Wake-up/Interrupt-on-Change on up to 24 pins Output pins can drive from 3.0V to 3.6V All digital input pins are 5V tolerant 4 ma sink on all I/O pins On-Chip Flash and SRAM Flash program memory, up to 256 Kbytes Data SRAM, up to 30 Kbytes (includes 2 Kbytes of DMA RAM): - Up to 33 Kbytes on devices marked PS (includes 1 Kbyte of DMA RAM) System Management Flexible clock options: - External, crystal, resonator, internal RC - Fully integrated PLL - Extremely low jitter PLL Power-up Timer Oscillator Start-up Timer/Stabilizer Watchdog Timer with its own RC oscillator Fail-Safe Clock Monitor Reset by multiple sources Power Management On-chip 2.5V voltage regulator Switch between clock sources in real time Idle, Sleep and Doze modes with fast wake-up Timers/Capture/Compare/PWM Timer/Counters, up to nine 16-bit timers: - Can pair up to make four 32-bit timers - 1 timer runs as Real-Time Clock with external khz oscillator - Programmable prescaler Input Capture (up to 8 channels): - Capture on up, down or both edges - 16-bit capture input functions - 4-deep FIFO on each capture Output Compare (up to 8 channels): - Single or Dual 16-Bit Compare mode - 16-bit Glitchless PWM mode 2005 Microchip Technology Inc. Advance Information DS70165A-page 1

4 Communication Modules 3-wire SPI (up to 2 modules): - Framing supports I/O interface to simple codecs - Supports 8-bit and 16-bit data - Supports all serial clock formats and sampling modes I 2 C (up to 2 modules): - Full Multi-Master Slave mode support - 7-bit and 10-bit addressing - Bus collision detection and arbitration - Integrated signal conditioning - Slave address masking UART (up to 2 modules): - Interrupt on address bit detect - Wake-up on Start bit from Sleep mode - 4-character TX and RX FIFO buffers - LIN bus support - IrDA encoding and decoding in hardware - High-Speed Baud mode Data Converter Interface (DCI) module: - Codec interface - Supports I 2 S and AC 97 protocols - Up to 16-bit data words, up to 16 words per frame - 4-word deep TX and RX buffers Enhanced CAN (ECAN ) 2.0B active (up to 2 modules): - Up to 8 transmit and up to 32 receive buffers - 16 receive filters and 3 masks - Loopback, Listen Only and Listen All Messages modes for diagnostics and bus monitoring - Wake-up on CAN message - Automatic processing of Remote Transmission Requests - FIFO mode using DMA - Not present in devices marked PS CAN 2.0B active (up to 2 modules) in devices marked PS : - 3 transmit and 2 receive buffers - 6 receive filters and 2 masks - Loopback, Listen Only and Listen All Messages modes for diagnostics and bus monitoring - Wake-up on CAN message Motor Control Peripherals Motor Control PWM (up to 8 channels): - 4 duty cycle generators - Independent or Complementary mode - Programmable dead time and output polarity - Edge or center-aligned - Manual output override control - Up to 2 Fault inputs - Trigger for A/D conversions - PWM frequency for 16-bit resolution (@ 40 MIPS) = 1220 Hz for Edge-Aligned mode, 610 Hz for Center-Aligned mode - PWM frequency for 11-bit resolution (@ 40 MIPS) = 39.1 khz for Edge-Aligned mode, khz for Center-Aligned mode Quadrature Encoder Interface module: - Phase A, Phase B and index pulse input - 16-bit up/down position counter - Count direction status - Position Measurement (x2 and x4) mode - Programmable digital noise filters on inputs - Alternate 16-bit Timer/Counter mode - Interrupt on position counter rollover/underflow Analog-to-Digital Converters Up to two A/D modules in a device 10-bit, 2.2 Msps or 12-bit, 1 Msps conversion: - 2, 4 or 8 simultaneous samples - Up to 32 input channels with auto-scanning - Conversion start can be manual or synchronized with 1 of 4 trigger sources - Conversion possible in Sleep mode - ±1 LSB max integral nonlinearity - ±1 LSB max differential nonlinearity CMOS Flash Technology Low-power, high-speed Flash technology Fully static design 3.3V (±10%) operating voltage Industrial temperature Low-power consumption Packaging: 100-pin TQFP (14x14x1 mm and 12x12x1 mm): - Only 14x14x1 mm for devices marked PS 80-pin TQFP (12x12x1 mm) 64-pin TQFP (10x10x1 mm) Note: See the device variant tables for exact peripheral features per device. DS70165A-page 2 Advance Information 2005 Microchip Technology Inc.

5 dspic33f PRODUCT FAMILIES Note: Prototype samples are intended for dspic33f early adopters and are based on early revision silicon. Devices are marked with a PS suffix. Major differences are noted in this data sheet. For additional information, please contact your Microchip salesperson. There are two device subfamilies within the dspic33f family of devices. They are the General Purpose Family and the Motor Control Family. The General Purpose Family is ideal for a wide variety of 16-bit MCU embedded applications. The variants with codec interfaces are well-suited for speech and audio processing applications. The Motor Control Family supports a variety of motor control applications, such as brushless DC motors, single and 3-phase induction motors and switched reluctance motors. These products are also well-suited for Uninterrupted Power Supply (UPS), inverters, Switched mode power supplies, power factor correction and also for controlling the power management module in servers, telecommunication equipment and other industrial equipment. The device names, pin counts, memory sizes and peripheral availability of each family are listed below, followed by their pinout diagrams. dspic33f General Purpose Family Variants Device Pins Program Flash Memory (Kbyte) RAM (Kbyte) (1) 16-bit Timer Input Capture Output Compare Std. PWM Codec Interface A/D Converter UART SPI I 2 C Enhanced CAN I/O Pins (Max) (2) Packages 33FJ64GP A/D, 18 ch PT 33FJ64GP A/D, 18 ch PT 33FJ64GP A/D, 32 ch PF, PT 33FJ64GP A/D, 18 ch PT 33FJ64GP A/D, 24 ch PT 33FJ64GP A/D, 32 ch PF, PT 33FJ128GP A/D, 18 ch PT 33FJ128GP A/D, 18 ch PT 33FJ128GP A/D, 32 ch PF, PT 33FJ128GP A/D, 18 ch PT 33FJ128GP A/D, 24 ch PT 33FJ128GP A/D, 32 ch PF, PT 33FJ256GP A/D, 18 ch PT 33FJ256GP A/D, 32 ch PF, PT 33FJ256GP A/D, 32 ch PF, PT Note 1: RAM size is inclusive of 2 Kbytes DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions Microchip Technology Inc. Advance Information DS70165A-page 3

6 DS70165A-page 4 Advance Information 2005 Microchip Technology Inc. Pin Diagrams 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/INT2/RD9 IC1/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 COFS/RG15 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/CN16/RD7 CSDO/RG13 CSDI/RG12 CSCK/RG14 VDDCORE RG1 RF1 RG0 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/CN18/RF5 U2RX/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 AN4/IC7/CN6/RB4 IC3/INT3/RD10 VDD RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj64gp206 dspic33fj128gp206

7 2005 Microchip Technology Inc. Advance Information DS70165A-page 5 dspic33f Pin Diagrams (Continued) 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/INT2/RD9 IC1/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 COFS/RG15 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/CN16/RD7 CSDO/RG13 CSDI/RG12 CSCK/RG14 VDDCORE RG1 RF1 RG0 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/SCL2/CN18/RF5 U2RX/SDA2/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 AN4/IC7/CN6/RB4 IC3/INT3/RD10 VDD RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj64gp306 dspic33fj128gp306

8 DS70165A-page 6 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/INT2/RD9 IC1/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 COFS/RG15 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/CN16/RD7 CSDO/RG13 CSDI/RG12 CSCK/RG14 VDDCORE RG1 C1TX/RF1 RG0 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/SCL2/CN18/RF5 U2RX/SDA2/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 AN4/IC7/CN6/RB4 IC3/INT3/RD10 VDD C1RX/RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj256gp506

9 2005 Microchip Technology Inc. Advance Information DS70165A-page 7 dspic33f Pin Diagrams (Continued) 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/INT2/RD9 IC1/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 COFS/RG15 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/CN16/RD7 CSDO/RG13 CSDI/RG12 CSCK/RG14 VDDCORE C2TX/RG1 C1TX/RF1 C2RX/RG0 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/SCL2/CN18/RF5 U2RX/SDA2/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/IC8/CN7/RB5 AN4/IC7/CN6/RB4 IC3/INT3/RD10 VDD C1RX/RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj64gp706 dspic33fj128gp706

10 DS70165A-page 8 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) 80-Pin TQFP dspic33fj64gp IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 CSCK/RG14 AN23/CN23/RA7 AN22/CN22/RA6 C2RX/RG0 C2TX/RG1 C1TX/RF1 C1RX/RF0 CSDO/RG13 CSDI/RG12 OC8/CN16/RD7 OC6/CN14/RD5 OC1/RD0 IC4/RD11 IC2/RD9 IC1/RD8 IC3/RD10 VSS OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RX/RF2 U1TX/RF3 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/CN1/RC13 VREF+/RA10 VREF-/RA9 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2RX/CN17/RF4 IC8/U1RTS/CN21/RD15 U2TX/CN18/RF5 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/CN11/RG9 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 VSS VDD COFS/RG15 AN16/T2CK/T7CK/RC1 TDO/AN21/INT2/RE9 TMS/AN20/INT1/RE8 TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 VDD VDDCORE OC5/CN13/RD4 IC6/CN19/RD13 SDA1/RG3 SDI1/RF7 SDO1/RF8 AN5/CN7/RB5 VSS OSC2/CLKO/RC15 OC7/CN15/RD6 SCK1/INT0/RF6 IC7/U1CTS/CN20/RD14 SDA2/INT4/RA15 SCL2/INT3/RA14 dspic33fj128gp708

11 2005 Microchip Technology Inc. Advance Information DS70165A-page 9 dspic33f Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 AN26/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 AN25/RE1 AN24/RE0 RG0 AN28/RE4 AN27/RE3 RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 AN29/RE5 AN30/RE6 AN31/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/INT1/RE8 AN21/INT2/RE9 AN5/CN7/RB5 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 RG1 RF1 OC8/CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj64gp310 dspic33fj128gp

12 DS70165A-page 10 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 AN26/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 AN25/RE1 AN24/RE0 RG0 AN28/RE4 AN27/RE3 C1RX/RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 AN29/RE5 AN30/RE6 AN31/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/INT1/RE8 AN21/INT2/RE9 AN5/CN7/RB5 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 RG1 C1TX/RF1 OC8/CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj256gp

13 2005 Microchip Technology Inc. Advance Information DS70165A-page 11 dspic33f Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 AN26/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 AN25/RE1 AN24/RE0 C2RX/RG0 AN28/RE4 AN27/RE3 C1RX/RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 AN29/RE5 AN30/RE6 AN31/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/INT1/RE8 AN21/INT2/RE9 AN5/CN7/RB5 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 C2TX/RG1 C1TX/RF1 OC8/CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj128gp dspic33fj256gp710 dspic33fj64gp710

14 dspic33f General Purpose Family Variants (Devices Marked PS ) Device Pins Program Flash Memory (Kbyte) RAM (Kbyte) (1) Timer 16-bit Input Capture Output Compare Std. PWM Codec Interface A/D Converter UART SPI I 2 C CAN I/O Pins (Max) (2) Packages 33FJ128GP706PS A/D, 18 ch 33FJ128GP708PS A/D, 24 ch 33FJ256GP710PS A/D, 32 ch Note 1: RAM size is inclusive of 1 Kbyte DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions PT PT PF Pin Diagrams 64-Pin TQFP dspic33fj128gp706ps COFS/RG15 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/T5CK/CN11/RG9 VSS VDD AN5/IC8/CN7/RB5 AN4/IC7/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 AN1/VREF-/CN3/RB1 AN0/VREF+/CN2/RB EMUC1/SOSCO/T1CK/CN0/RC14 EMUD1/SOSCI/T4CK/CN1/RC13 EMUC2/OC1/RD0 IC4/INT4/RD11 IC3/INT3/RD10 IC2/INT2/RD9 IC1/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SDA1/RG3 EMUC3/SCK1/INT0/RF6 U1RX/SDI1/RF2 EMUD3/U1TX/SDO1/RF3 PGC/EMUC/AN6/OCFA/RB6 PGD/EMUD/AN7/RB7 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VSS VDD AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 U2RX/SDA2/CN17/RF4 U2TX/SCL2/CN18/RF CSDO/RG13 CSDI/RG12 CSCK/RG14 C2RX/RG0 C2TX/RG1 C1TX/RF1 C1RX/RF0 VDD VDDCORE OC8/CN16/RD7 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 OC4/RD3 OC3/RD2 EMUD2/OC2/RD1 DS70165A-page 12 Advance Information 2005 Microchip Technology Inc.

15 2005 Microchip Technology Inc. Advance Information DS70165A-page 13 dspic33f Pin Diagrams (Continued) 80-Pin TQFP IC5/RD12 OC4/RD3 OC3/RD2 EMUD2/OC2/RD1 CSCK/RG14 AN23/CN23/RA7 AN22/CN22/RA6 C2RX/RG0 C2TX/RG1 C1TX/RF1 C1RX/RF0 CSDO/RG13 CSDI/RG12 OC8/CN16/RD7 OC6/CN14/RD5 EMUC2/OC1/RD0 IC4/RD11 IC2/RD9 IC1/RD8 IC3/RD10 VSS OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RX/RF2 EMUD3/U1TX/RF3 EMUC1/SOSCO/T1CK/CN0/RC14 EMUD1/SOSCI/CN1/RC13 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2RX/CN17/RF4 IC8/CN21/RD15 U2TX/CN18/RF5 AN6/OCFA/RB6 AN7/RB7 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/CN11/RG9 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC/EMUC/AN1/CN3/RB1 PGD/EMUD/AN0/CN2/RB0 VSS VDD COFS/RG15 AN16/T2CK/T7CK/RC1 AN21/INT2/RA13 AN20/INT1/RA12 AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 VDD VDDCORE OC5/CN13/RD4 IC6/CN19/RD13 SDA1/RG3 SDI1/RF7 SDO1/RF8 AN5/CN7/RB5 VSS OSC2/CLKO/RC15 OC7/CN15/RD6 EMUC3/SCK1/INT0/RF6 IC7/CN20/RD14 SDA2/INT4/RA15 SCL2/INT3/RA14 dspic33fj128gp708ps

16 DS70165A-page 14 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 EMUD2/OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 AN26/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 AN25/RE1 AN24/RE0 C2RX/RG0 AN28/RE4 AN27/RE3 C1RX/RF0 VDDCORE EMUD1/SOSCI/CN1/RC13 EMUC2/OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 EMUC3/SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 EMUD3/U1TX/RF3 VSS EMUC1/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/CN20/RD14 IC8/CN21/RD15 VDD VSS AN6/OCFA/RB6 AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 AN29/RE5 AN30/RE6 AN31/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD RA0 AN20/INT1/RA12 AN21/INT2/RA13 AN5/CN7/RB5 AN4/CN6/RB4 AN3/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC/EMUC/AN1/CN3/RB1 PGD/EMUD/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 C2TX/RG1 C1TX/RF1 OC8/CN16/RD7 OC7/CN15/RD6 RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD RA4 RA1 100-Pin TQFP dspic33fj256gp710ps 100

17 dspic33f Motor Control Family Variants Device Pins Program Flash Memory (Kbyte) RAM (Kbyte) (1) Timer 16-bit Input Capture Output Compare Std. PWM Motor Control PWM Quadrature Encoder Interface Codec Interface A/D Converter UART SPI I 2 C Enhanced CAN I/O Pins (Max) (2) Packages 33FJ64MC ch A/D, 16 ch 33FJ64MC ch A/D, 18 ch 33FJ64MC ch A/D, 24 ch 33FJ64MC ch A/D, 16 ch 33FJ64MC ch A/D, 24 ch 33FJ128MC ch A/D, 16 ch 33FJ128MC ch A/D, 24 ch 33FJ128MC ch A/D, 16 ch 33FJ128MC ch A/D, 18 ch 33FJ128MC ch A/D, 24 ch 33FJ256MC ch A/D, 24 ch 33FJ256MC ch A/D, 24 ch Note 1: RAM size is inclusive of 2 Kbytes DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions PT PT PF, PT PT PF, PT PT PF, PT PT PT PF, PT PF, PT PF, PT 2005 Microchip Technology Inc. Advance Information DS70165A-page 15

18 DS70165A-page 16 Advance Information 2005 Microchip Technology Inc. Pin Diagrams 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/FLTB/INT2/RD9 IC1/FLTA/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/UPDN/CN16/RD7 PWM3L/RE4 PWM2H/RE3 PWM2L/RE2 VDDCORE PWM1L/RE0 C1TX/RF1 PWM1H/RE1 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/CN18/RF5 U2RX/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/QEB/IC8/CN7/RB5 AN4/QEA/IC7/CN6/RB4 IC3/INT3/RD10 VDD C1RX/RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj64mc506

19 2005 Microchip Technology Inc. Advance Information DS70165A-page 17 dspic33f Pin Diagrams (Continued) 64-Pin TQFP PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/T4CK/CN1/RC13 OC1/RD0 IC4/INT4/RD11 IC2/U1CTS/FLTB/INT2/RD9 IC1/FLTA/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RTS/SCK1/INT0/RF6 U1RX/SDI1/RF2 U1TX/SDO1/RF3 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/VREF-/CN3/RB1 PGD3/EMUD3/AN0/VREF+/CN2/RB0 OC8/UPDN/CN16/RD7 PWM3L/RE4 PWM2H/RE3 PWM2L/RE2 VDDCORE PWM1L/RE0 C1TX/RF1 PWM1H/RE1 OC2/RD1 OC3/RD2 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 TMS/AN10/RB10 TDO/AN11/RB11 VSS VDD TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/SCL2/CN18/RF5 U2RX/SDA2/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/QEB/IC8/CN7/RB5 AN4/QEA/IC7/CN6/RB4 IC3/INT3/RD10 VDD C1RX/RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj128mc506 dspic33fj64mc506 dspic33fj128mc706

20 DS70165A-page 18 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) 80-Pin TQFP IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 PWM2L/RE2 PWM1H/RE1 PWM1L/RE0 RG0 RG1 C1TX/RF1 C1RX/RF0 PWM3L/RE4 PWM2H/RE3 OC8/CN16/UPDN/RD7 OC6/CN14/RD5 OC1/RD0 IC4/RD11 IC2/RD9 IC1/RD8 IC3/RD10 VSS OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RX/RF2 U1TX/RF3 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/CN1/RC13 VREF+/RA10 VREF-/RA9 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2RX/CN17/RF4 IC8/U1RTS/CN21/RD15 U2TX/CN18/RF5 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/CN11/RG9 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 VSS VDD PWM3H/RE5 PWM4L/RE6 TDO/FLTB/INT2/RE9 TMS/FLTA/INT1/RE8 TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 VDD VDDCORE OC5/CN13/RD4 IC6/CN19/RD13 SDA1/RG3 SDI1/RF7 SDO1/RF8 AN5/QEB/CN7/RB5 VSS OSC2/CLKO/RC15 OC7/CN15/RD6 SCK1/INT0/RF6 IC7/U1CTS/CN20/RD14 SDA2/INT4/RA15 SCL2/INT3/RA14 dspic33fj64mc508

21 2005 Microchip Technology Inc. Advance Information DS70165A-page 19 dspic33f Pin Diagrams (Continued) 80-Pin TQFP IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 PWM2L/RE2 PWM1H/RE1 PWM1L/RE0 CRX2/RG0 C2TX/RG1 C1TX/RF1 C1RX/RF0 PWM3L/RE4 PWM2H/RE3 OC8/CN16/UPDN/RD7 OC6/CN14/RD5 OC1/RD0 IC4/RD11 IC2/RD9 IC1/RD8 IC3/RD10 VSS OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RX/RF2 U1TX/RF3 PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 PGD2/EMUD2/SOSCI/CN1/RC13 VREF+/RA10 VREF-/RA9 AVDD AVSS U2CTS/AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2RX/CN17/RF4 IC8/U1RTS/CN21/RD15 U2TX/CN18/RF5 PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/CN11/RG9 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 VSS VDD PWM3H/RE5 PWM4L/RE6 TDO/FLTB/INT2/RE9 TMS/FLTA/INT1/RE8 TCK/AN12/RB12 TDI/AN13/RB13 U2RTS/AN14/RB14 AN15/OCFB/CN12/RB15 VDD VDDCORE OC5/CN13/RD4 IC6/CN19/RD13 SDA1/RG3 SDI1/RF7 SDO1/RF8 AN5/QEB/CN7/RB5 VSS OSC2/CLKO/RC15 OC7/CN15/RD6 SCK1/INT0/RF6 IC7/U1CTS/CN20/RD14 SDA2/INT4/RA15 SCL2/INT3/RA14 dspic33fj128mc708

22 DS70165A-page 20 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 PWM2L/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 PWM1H/RE1 PWM1L/RE0 RG0 PWM3L/RE4 PWM2H/RE3 C1RX/RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 RA3 RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/FLTA/INT1/RE8 AN21/FLTB/INT2/RE9 AN5/QEB/CN7/RB5 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 RG1 C1TX/RF1 OC8/UPDN//CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj64mc510

23 2005 Microchip Technology Inc. Advance Information DS70165A-page 21 dspic33f Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 PWM2L/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 PWM1H/RE1 PWM1L/RE0 RG0 PWM3L/RE4 PWM2H/RE3 C1RX/RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/FLTA/INT1/RE8 AN21/FLTB/INT2/RE9 AN5/QEB/CN7/RB5 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 RG1 C1TX/RF1 OC8/UPDN//CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj128mc510 dspic33fj256mc510

24 DS70165A-page 22 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 PWM2L/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 PWM1H/RE1 PWM1L/RE0 C2RX/RG0 PWM3L/RE4 PWM2H/RE3 C1RX/RF0 VDDCORE PGD2/EMUD2/SOSCI/CN1/RC13 OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 U1TX/RF3 VSS PGC2/EMUC2/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/U1CTS/CN20/RD14 IC8/U1RTS/CN21/RD15 VDD VSS PGC1/EMUC1/AN6/OCFA/RB6 PGD1/EMUD1/AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD TMS/RA0 AN20/FLTA/INT1/RE8 AN21/FLTB/INT2/RE9 AN5/QEB/CN7/RB5 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC3/EMUC3/AN1/CN3/RB1 PGD3/EMUD3/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 C2TX/RG1 C1TX/RF1 OC8/UPDN//CN16/RD7 OC7/CN15/RD6 TDO/RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD TDI/RA4 TCK/RA1 100-Pin TQFP dspic33fj64mc710 dspic33fj128mc710 dspic33fj256mc710

25 dspic33f Motor Control Family Variants (Devices Marked PS ) Device Pins Program Flash Memory (Kbyte) RAM (Kbyte) (1) Timer 16-bit Input Capture Output Compare Std. PWM Motor Control PWM Quadrature Encoder Interface Codec Interface A/D Converter UART SPI I 2 C CAN I/O Pins (Max) (2) Packages 33FJ128MC706PS ch A/D, 16 ch 33FJ128MC708PS ch A/D, 18 ch 33FJ256MC710PS ch A/D, 24 ch Note 1: RAM size is inclusive of 1 Kbyte DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions PT PT PF 2005 Microchip Technology Inc. Advance Information DS70165A-page 23

26 DS70165A-page 24 Advance Information 2005 Microchip Technology Inc. Pin Diagrams 64-Pin TQFP EMUC1/SOSCO/T1CK/CN0/RC14 EMUD1/SOSCI/T4CK/CN1/RC13 EMUC2/OC1/RD0 IC4/INT4/RD11 IC2/FLTB/INT2/RD9 IC1/FLTA/INT1/RD8 VSS OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 EMUC3/SCK1/INT0/RF6 U1RX/SDI1/RF2 EMUD3/U1TX/SDO1/RF3 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR VSS VDD AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 AN1/VREF-/CN3/RB1 AN0/VREF+/CN2/RB0 OC8/UPDN/CN16/RD7 PWM3L/RE4 PWM2H/RE3 PWM2L/RE2 VDDCORE PWM1L/RE0 C1TX/RF1 PWM1H/RE1 EMUD2/OC2/RD1 OC3/RD2 PGC/EMUC/AN6/OCFA/RB6 PGD/EMUD/AN7/RB7 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VSS VDD AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 U2TX/SCL2/CN18/RF5 U2RX/SDA2/CN17/RF4 SDA1/RG SS2/T5CK/CN11/RG9 AN5/QEB/IC8/CN7/RB5 AN4/QEA/IC7/CN6/RB4 IC3/INT3/RD10 VDD C1RX/RF0 OC4/RD3 OC7/CN15/RD6 OC6/IC6/CN14/RD5 OC5/IC5/CN13/RD4 dspic33fj128mc706ps

27 2005 Microchip Technology Inc. Advance Information DS70165A-page 25 dspic33f Pin Diagrams (Continued) 80-Pin TQFP IC5/RD12 OC4/RD3 OC3/RD2 EMUD2/OC2/RD1 PWM2L/RE2 PWM1H/RE1 PWM1L/RE0 CRX2/RG0 C2TX/RG1 C1TX/RF1 C1RX/RF0 PWM3L/RE4 PWM2H/RE3 OC8/CN16/UPDN/RD7 OC6/CN14/RD5 EMUC2/OC1/RD0 IC4/RD11 IC2/RD9 IC1/RD8 IC3/RD10 VSS OSC1/CLKIN/RC12 VDD SCL1/RG2 U1RX/RF2 EMUD3/U1TX/RF3 EMUC1/SOSCO/T1CK/CN0/RC14 EMUD1/SOSCI/CN1/RC13 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2RX/CN17/RF4 IC8/CN21/RD15 U2TX/CN18/RF5 AN6/OCFA/RB6 AN7/RB7 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 SCK2/CN8/RG6 SDI2/CN9/RG7 SDO2/CN10/RG8 MCLR SS2/CN11/RG9 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 PGC/EMUC/AN1/CN3/RB1 PGD/EMUD/AN0/CN2/RB0 VSS VDD PWM3H/RE5 PWM4L/RE6 FLTB/INT2/RE9 FLTA/INT1/RE8 AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 VDD VDDCORE OC5/CN13/RD4 IC6/CN19/RD13 SDA1/RG3 SDI1/RF7 SDO1/RF8 AN5/QEB/CN7/RB5 VSS OSC2/CLKO/RC15 OC7/CN15/RD6 EMUC3/SCK1/INT0/RF6 IC7/CN20/RD14 SDA2/INT4/RA15 SCL2/INT3/RA14 dspic33fj128mc708ps

28 DS70165A-page 26 Advance Information 2005 Microchip Technology Inc. Pin Diagrams (Continued) OC6/CN14/RD5 OC5/CN13/RD4 IC6/CN19/RD13 IC5/RD12 OC4/RD3 OC3/RD2 EMUD2/OC2/RD1 AN23/CN23/RA7 AN22/CN22/RA6 PWM2L/RE2 CSDO/RG13 CSDI/RG12 CSCK/RG14 PWM1H/RE1 PWM1L/RE0 C2RX/RG0 PWM3L/RE4 PWM2H/RE3 C1RX/RF0 VDDCORE EMUD1/SOSCI/CN1/RC13 EMUC2/OC1/RD0 IC3/RD10 IC2/RD9 IC1/RD8 IC4/RD11 SDA2/RA3 SCL2/RA2 OSC2/CLKO/RC15 OSC1/CLKIN/RC12 VDD SCL1/RG2 EMUC3/SCK1/INT0/RF6 SDI1/RF7 SDO1/RF8 SDA1/RG3 U1RX/RF2 EMUD3/U1TX/RF3 VSS EMUC1/SOSCO/T1CK/CN0/RC14 VREF+/RA10 VREF-/RA9 AVDD AVSS AN8/RB8 AN9/RB9 AN10/RB10 AN11/RB11 VDD U2CTS/RF12 U2RTS/RF13 IC7/CN20/RD14 IC8/CN21/RD15 VDD VSS AN6/OCFA/RB6 AN7/RB7 U2TX/CN18/RF5 U2RX/CN17/RF4 PWM3H/RE5 PWM4L/RE6 PWM4H/RE7 AN16/T2CK/T7CK/RC1 AN17/T3CK/T6CK/RC2 AN18/T4CK/T9CK/RC3 AN19/T5CK/T8CK/RC4 SCK2/CN8/RG6 VDD RA0 AN20/FLTA/INT1/RA12 AN21/FLTB/INT2/RA13 AN5/QEB/CN7/RB5 AN4/QEA/CN6/RB4 AN3/INDX/CN5/RB3 AN2/SS1/LVDIN/CN4/RB2 SDI2/CN9/RG7 SDO2/CN10/RG8 PGC/EMUC/AN1/CN3/RB1 PGD/EMUD/AN0/CN2/RB0 COFS/RG15 VDD SS2/CN11/RG9 MCLR AN12/RB12 AN13/RB13 AN14/RB14 AN15/OCFB/CN12/RB15 C2TX/RG1 C1TX/RF1 OC8/UPDN//CN16/RD7 OC7/CN15/RD6 RA5 INT4/RA15 INT3/RA14 VSS VSS VSS VDD RA4 RA1 100-Pin TQFP dspic33fj256mc710ps

29 Table of Contents 1.0 Device Overview CPU Memory Organization Flash Program Memory Resets Interrupt Controller Direct Memory Access (DMA) Oscillator Configuration Power-Saving Features I/O Ports Timer Timer2/3, Timer4/5, Timer6/7 and Timer8/ Input Capture Output Compare Motor Control PWM Module Quadrature Encoder Interface (QEI) Module Serial Peripheral Interface (SPI) Inter-Integrated Circuit (I 2 C) Universal Asynchronous Receiver Transmitter (UART) Enhanced CAN Module CAN Module Data Converter Interface (DCI) Module bit/12-bit A/D Converter Special Features Instruction Set Summary Development Support Electrical Characteristics Packaging Information Appendix A: Differences Between PS (Prototype Sample) Devices and Final Production Devices Index The Microchip Web Site Customer Change Notification Service Customer Support Reader Response Product Identification System Microchip Technology Inc. Advance Information DS70165A-page 27

30 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via at or fax the Reader Response Form in the back of this data sheet to (480) We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: Microchip s Worldwide Web site; Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at to receive the most current information on all of our products. DS70165A-page 28 Advance Information 2005 Microchip Technology Inc.

31 1.0 DEVICE OVERVIEW Note: This data sheet summarizes the features of this group of dspic33f devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the dspic30f Family Reference Manual (DS70046). This document contains device specific information for the following devices: dspic33fj64gp206 dspic33fj64gp306 dspic33fj64gp310 dspic33fj64gp706 dspic33fj64gp708 dspic33fj64gp710 dspic33fj128gp206 dspic33fj128gp306 dspic33fj128gp310 dspic33fj128gp706 dspic33fj128gp708 dspic33fj128gp710 dspic33fj256gp506 dspic33fj256gp510 dspic33fj256gp710 dspic33fj128gp706ps dspic33fj128gp708ps dspic33fj256gp710ps dspic33fj64mc506 dspic33fj64mc508 dspic33fj64mc510 dspic33fj64mc706 dspic33fj64mc710 dspic33fj128mc506 dspic33fj128mc510 dspic33fj128mc706 dspic33fj128mc708 dspic33fj128mc710 dspic33fj256mc510 dspic33fj256mc710 dspic33fj128mc706ps dspic33fj128mc708ps dspic33fj256mc710ps The dspic33f General Purpose and Motor Control Families of devices include devices with a wide range of pin counts (64, 80 and 100), different program memory sizes (64 Kbytes, 128 Kbytes and 256 Kbytes) and different RAM sizes (8 Kbytes, 16 Kbytes and 30 Kbytes). Note: Devices marked PS contain 9 Kbytes, 17 Kbytes and 33 Kbytes of RAM. This makes these families suitable for a wide variety of high-performance digital signal control application. The devices are pin compatible with the PIC24 family of devices, and also share a very high degree of compatibility with the dspic30f family devices. This allows easy migration between device families as may be necessitated by the specific functionality, computational resource and system cost requirements of the application. The dspic33f device family employs a powerful 16-bit architecture that seamlessly integrates the control features of a Microcontroller (MCU) with the computational capabilities of a Digital Signal Processor (DSP). The resulting functionality is ideal for applications that rely on high-speed, repetitive computations, as well as control. The DSP engine, dual 40-bit accumulators, hardware support for division operations, barrel shifter, 17 x 17 multiplier, a large array of 16-bit working registers and a wide variety of data addressing modes, together provide the dspic33f Central Processing Unit (CPU) with extensive mathematical processing capability. Flexible and deterministic interrupt handling, coupled with a powerful array of peripherals, renders the dspic33f devices suitable for control applications. Further, Direct Memory Access (DMA) enables overhead-free transfer of data between several peripherals and a dedicated DMA RAM. Reliable, field programmable Flash program memory ensures scalability of applications that use dspic33f devices. Figure 1-1 shows a general block diagram of the various core and peripheral modules in the dspic33f family of devices, while Table 1-1 lists the functions of the various pins shown in the pinout diagrams Microchip Technology Inc. Advance Information DS70165A-page 29

32 FIGURE 1-1: PSV & Table Data Access Control Block dspic33f GENERAL BLOCK DIAGRAM Y Data Bus Interrupt Controller X Data Bus PORTA PCU PCH PCL Program Counter Stack Loop Control Control Logic Logic Data Latch X RAM Address Latch Data Latch Y RAM Address Latch 16 DMA RAM DMA Controller 16 PORTB Address Latch Address Generator Units PORTC Program Memory Data Latch Address Bus 24 ROM Latch EA MUX PORTD Instruction Decode & Control Instruction Reg Literal Data 16 PORTE Control Signals to Various Blocks DSP Engine OSC2/CLKO OSC1/CLKI Timing Generation FRC/LPRC Oscillators Precision Band Gap Reference Voltage Regulator Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset Divide Support 16 x 16 W Register Array 16-bit ALU PORTF PORTG VDDCORE/VCAP VDD, VSS MCLR Timers 1-9 PWM QEI DCI ADC1,2 CAN1,2 IC1-8 OC/ PWM1-8 CN1-23 SPI1,2 I2C1,2 UART1,2 Note: Not all pins or features are implemented on all device pinout configurations. See pinout diagrams for the specific pins and features present on each device. DS70165A-page 30 Advance Information 2005 Microchip Technology Inc.