NCT3941S/S-A Nuvoton 4 Times Linear Fan Driver NCT3941S/S-A



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Nuvoton 4 Times Linear Fan Driver NCT3941S/S-A -I- Revision A4

Table of Content- 1. GENERAL DESCRIPTION...1 2. FEATURES...1 3. APPLICATION...1 4. BLOCK DIAGRAM...2 5. PIN CONFIGURATION AND TYPICAL APPLICATION CIRCUIT...2 6. PIN DESCRIPTION...4 7. FUNCTIONAL DESCRIPTION...4 8. ELECTRICAL CHARACTERISTIC...7 9. OPERATING CHARACTERISTICS...9 1. PACKAGE DIMENSION...15 11. ORDERING INFORMATION...16 12. TOP MARKING SPECIFICATION...16 13. REVISION HISTORY...17 -II- Revision A4

1. GENERAL DESCRIPTION The NCT3941S/S-A is a simply linear fan driver. It is designed for noise-sensitive or powersensitive applications that require system cooling. The NCT3941S/S-A is a low quiescent current, low dropout linear regulator which is designed with a P-channel MOSFET to power a DC fan and delivers output current up to 5mA. The output voltage follows the 4 times on the voltage of VSET pin to dynamic adjust the DC fan speed. NCT3941S supports enable pin to control the output voltage. NCT3941S-A supports fully turn-on function. NCT3941S/S-A is available in SOP8-EP package. 2. FEATURES VOUT Follows 4 Times of VSET.5V Dropout @.5A Output Current Continues current up to 5mA, current limit trip threshold 1.6A Enable Function (NCT3941S) Full Turn On Function (NCT3941S-A) Short Circuit and Over Temperature Protections Low External Component Count Low Cost and Easy to Use SOP8 15mil with Exposed Pad Package Green Package (Lead Free and Halogen Free) 3. APPLICATION Projectors Peripheral Add-in Cards Motherboards Battery Powered Systems -1- Revision A4

4. BLOCK DIAGRAM Internal Regulator 2 VIN ENABLE (FON#) 3 3uA Enable/FON# Logic Current Limit Thermal Shutdown VSET 4 GND 6 R1=3R2 R1 R2 1 VOUT (FON#) ARE FOR NCT3941S-A 5. PIN CONFIGURATION AND TYPICAL APPLICATION CIRCUIT VOUT 1 8 VIN 2 7 ENABLE (FON#) 3 Thermal Pad 6 VSET 4 5 NC NC GND NC NCT3941S/ S-A (Top View) (FON#) ARE FOR NCT3941S-A -2- Revision A4

VCC C IN VIN ENABLE (FON#) Input Signal 2.2uF VOUT C OUT DC Voltage VSET GND 1uF FAN Typical Application Circuits FAN_12V ATX_12VCC VEN Cin 2.2U SIO_FANOUT(VOLTAGE MODE) Cout 1U Vout N.C Vin N.C EN(FON#) GND Vset N.C NCT3941S/S-A VOLTAGE MODE (FON#) ARE FOR NCT3941S-A FAN_12V ATX_12VCC Cin 2.2U Cout 1U VEN +3.3VC.C R1 Vout N.C Vin N.C EN(FON#) GND Vset N.C NCT3941S/S-A 1k SIO_FANOUT(PWM MODE) R2 1k C1 1U PWM MODE (FON#) ARE FOR NCT3941S-A -3- Revision A4

6. PIN DESCRIPTION PIN NAME NCT3941S NO NCT3941S-A PIN TYPE VOUT 1 1 AO VIN 2 2 POWER DESCRIPTION Voltage output pin. Connect a low ESR ceramic capacitor (1uF, typically) to ground to assure stability. DC power supply input. Connect a bypass capacitor (2.2uF, typically) is recommended. ENABLE 3 I Enable pin. Output voltage follows 4 times of VSET pin voltage when ENABLE pin at high level. Internal pull high is implemented. Full On mode selection pin. Output voltage follows 4 times of VSET pin voltage when FON# FON# 3 I pin at high level. The internal power MOSFET full turns on when FON# pin at low level. Internal pull high is implemented. VSET 4 4 AIN Output voltage setting pin. The inputs could be DC voltage. The input voltage must be larger that 1V. GND 6 6 GROUND Power supply ground. NC 5, 7, 8 5, 7, 8 No internal connection. PIN TYPE AO AIN I POWER GROUND PIN Attribute Output pin (Analog) Input pin (Analog) Input pin (Digital) Positive power supply input Power supply ground 7. FUNCTIONAL DESCRIPTION 7.1 VSET Setting The output voltage is 4 times of VSET pin voltage. When the VSET voltage exceeds 1V, the output voltage will follow 4 times of VSET voltage. -4- Revision A4

7.2 Enable Function This function is for NCT3941S only. The input voltage level of ENABLE pin can control the internal regulator turn on or turn off. When pulling this pin below.3v, the regulator will be turned off. When pulling this pin above 1V, the regulator will be turned on. 7.3 Full On Function This function is for NCT3941S-A only. The input voltage level of FON# can control the internal regulator fully turn on or following 4 times of VSET voltage. When pulling this pin below.3v, the regulator will be fully turned on. When pulling this pin above 1.6V, the output voltage will follow 4 times of VSET voltage. 7.4 Short Circuit Current Limit The NCT3941S/S-A provides a current limit circuitry for short circuit protection, which monitors the output current and controls PMOS gate voltage to limit the output current at 2mA. 7.5 Thermal Consideration The NCT3941S/S-A has a thermal shutdown circuitry to limit the junction temperature. When the junction temperature exceeds 15 C, the thermal shutdown circuit disables the output, allowing the device to cool down. The output circuitry is enabled again after the junction temperature cools down by 3 C, resulting in a pulsed output during continuous thermal overload conditions. The thermal protection is designed to protect the IC in the event of over temperature conditions. For reliabile operation, the junction temperature cannot exceed 125 C. The definition of power dissipation in chip is as following equation: P D = (V IN - V OUT ) x I OUT + V IN x I Q P D represents the power dissipation. The power dissipation depends on the thermal resistance of chip package, PCB layout, the airflow and temperature difference between junction and ambient. Refers to JEDEC51-1, The power dissipation can be calculated by following equation: P D(MAX) = (T J(MAX) - T A ) / θ JA Where T J(MAX) is the maximum operation junction temperature 125, TA is the ambient temperature and theθ JA is the junction to ambient thermal resistance. θ JA for ESOP-8 package is 75 /W on JEDEC51-7 (4 layers, 2S2P) thermal test board with minimum copper area. The maximum power dissipation at T A = 25 can be calculated as: P D(MAX) = (125-25 ) / 75 /W = 1.33W -5- Revision A4

θ JA highly depends on IC package, PCB layout, the aireflow. Thermal resistance θ JA can be improved by adding copper under the exposed pad of ESOP-8 while the IC package is fixed. The copper under the exposed pad of ESOP-8 is an effective heatsink and is useful for improving thermal conductivity. Figure show the relationship between thermal resistance θ JA vs. copper area on a standard JEDEC 51-7 (4 layers, 2S2P) thermal test board at TA = 25, PCB copper thickness = 2oz. The 7mm 2 copper plane reduceθ JA from 75 /W to 45 /W and increases maximum power disspation from 1.33W to 2.22W. 7mm 2 copper area 3mm 2 copper area Minimum copper area Figure1. Thermal Resistance θ JA vs. Copper Area of ESOP Packages Figure2. Power dissipation vs. ambient temperature 7.6 VIN Decoupling To achieve the best results when using the NCT3941S/S-A, decouple the power supply with a 2.2uF capacitor. Use a high quality ceramic surface mount capacitor if possible. Surface mount components minimize lead inductance, which improves performance, and ceramic capacitors tend to have adequate high frequency response for decoupling applications. 7.7 VOUT Stability To maintain circuit stability and improve transient response over temperature and current, the NCT3941S/S-A needs a suitable output capacitor. In order to insure the circuit stability, the suitable output capacitor should be larger than 1uF. 7.8 Layout Consideration Consider the following points before starting the NCT3941S/S-A layout design. -6- Revision A4

GND Thermal pad COU T VOUT CIN VSET VIN VEN The input bypass capacitor for VIN should be placed as close as possible to the pin with short and wide connections. The output capacitor for VOUT should be placed close to the pin with short and wide connection in order to avoid ESR and/or ESL trace inductance. In order to effectively remove heat from the package, properly prepare the thermal land. Apply solder directly to the package s thermal pad. The wide traces of component and the side copper connected to the thermal land pad help to dissipate heat. The thermal land connected to the ground plane could also be used to help dissipation. 8. ELECTRICAL CHARACTERISTIC 8.1 Absolute Maximum Ratings PARAMETER RATING UNIT Power Supply Voltage -.3 to 19V V Voltage on Other Pins -.3 to 7V V Storage Temperature -5 to 15 C Soldering Temperature Refer to IPC/JEDEC J-STD-2 Specification ESD Protection Human Body Mode 2 kv Machine Mode 2 V Latch-up 1 ma -7- Revision A4

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. 8.2 Thermal Information ITEM RATING UNIT Power Dissipation, P D @ T A =25 Internal Limited W Package Thermal Resistance, SOP8-EP, θ JA 75 /W 8.3 Recommended Operating Conditions PARAMETER RATING UNIT Operating Temperature -2 to 85 C Junction Temperature -2 to 125 C Supply Voltage, VCC 8 to 17.6 V 8.4 Electrical Characteristics VIN=13V, VSET=2V, ENABLE=5V, C IN = 2.2uF, C OUT =1uF, Ta= -2~85 C (Typical value are at Ta=25 C) PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS Supply Input Voltage Supply Input Voltage V IN 8 17.6 V ENABLE / FON# Pin ENABLE / FON# Voltage High 1 V ENABLE / FON# Voltage Low.3 V ENABLE / FON# Pin Bias ua ENABLE / FON# = V 3 Current Supply Input Current Quiescent Current I Q 3 ma ENABLE = 5V, VOUT 12V, No Load Shutdown Current I SD 1 ua ENABLE = V Output Voltage VOUT Voltage / VSET Voltage 3.88 4 4.12 V/V VIN = 12V VSET = 1 ~ 3V Load Regulation(NOTE1).5 2 % VSET = 3V 1mA I OUT 5mA Line Regulation(NOTE1).1.5 % Vin = 9V to 14V -8- Revision A4

Output Resistance.7 Ω I OUT = 5mA VSET = 4V Output Leakage(NOTE2) 1 ua ENABLE = V VSET Pin VSET Voltage V SET 1 5.5 V VSET pin Current 1 na Short Circuit Current Limit Protection Output Current Limit I LIM.7 A Current Limit Trigger Point I TR 1.6 A Short circuit protection I SH.2 A Over Temperature Protection Thermal Shutdown Temperature 15 C Thermal Shutdown Hysteresis 3 C NOTE1 : Slew rate will effect transient response, use T R< 1us, T F <1us measurement load regulation and line regulation NOTE2:.NCT3941S-A is full-on when enable=, measurement output leakage current using VSET<.3V to disable output voltage 9. OPERATING CHARACTERISTICS (C IN =2.2uf,C out =1uf,V IN =13V,V SET =2V,V EN =5V,Ta=25 C) LOAD REGULAION LINE REGULATION VOUT VIN VIN IOUT VOUT -9- Revision A4

LOAD TRANSIENT CURRENT LIMIT BEHAVIOR VOUT VIN VOUT IOUT IOUT VSET V.S. VOUT SHORT CIRCUIT BEHAVIOR VIN VOUT VOUT VSET IOUT -1- Revision A4

VSET V.S. QUIESCENT CURRENT VIN V.S. QUIESCENT CURRENT 1 1 9 9 8 8 Quiescent Current (ua) 7 6 5 4 3 Quiescent Current (ua) 7 6 5 4 3 2 2 1 1 1 1.5 2 2.5 3 3 4 5 6 7 8 9 1 11 12 VSET(V) VIN(V) LOAD CURRENT V.S. QUIESCENT CURRENT LOAD CURRENT V.S. DROP VOLTAGE 1 4 9 35 Quiescent Current (ua) 8 7 6 5 4 3 2 1 VSET=3V, VIN=13V VOUT 12V 1 2 3 4 5 Load Current(mA) DROP VOLTAGE (mv) 3 25 2 15 1 5 VSET=2V VOUT=8V 1 2 3 4 5 Load Current (ma) -11- Revision A4

VIN V.S. VEN VIN V.S. VEN PIN BIAS CURRENT 5 1.6 VEN(V) 4.5 4 3.5 3 2.5 2 1.5 1.5 VSET=1V VOUT=4V VEN Bias Current (ua) 1.4 1.2 1.8.6.4.2 VSET=1V VOUT=4V 4 5 6 7 8 9 1 11 12 4 5 6 7 8 9 1 11 12 VIN(V) VIN(V) QUIESCENT CURRENT V.S TEMPERATURE DROP VOLTAGE V.S TEMPERATURE 2 6 18 16 5 Quiescent Current (ua) 14 12 1 8 6 4 2 VSET=3V VOUT=12V Drop Voltage (mv) 4 3 2 1 VSET=2V VOUT=8V IOUT=.5A -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) -12- Revision A4

LOAD REGULATION V.S TEMPERATURE LINE REGULATION V.S TEMPERATURE Load Regulation (%) 1.9.8.7.6.5.4.3.2.1 VSET=3V VOUT=12V -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) VOUT (mv) 3 28 26 24 22 2 18 16 14 12 1 8 6 4 2-2 -1 1 2 3 4 5 6 7 8 9 Temperature( ) VSET=2V VOUT=8V VOUT V.S TEMPERATURE OVER CURRENT LIMIT V.S. TEMPERATURE 12.5 1 12.4 VSET=3V VOUT=12V 9 8 7 VOUT (V) 12.3 12.2 IOUT (ma) 6 5 4 12.1 3 2 1 VSET=3V VOUT=12V 12-2 -1 1 2 3 4 5 6 7 8 9 Temperature( ) -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) -13- Revision A4

SHORT CIRCUIT LIMIT V.S. TEMPERATURE OVER CURRENT TRIGGER POINT V.S. TEMPERATURE 5 2 1.8 4 1.6 1.4 IOUT (ma) 3 2 IOUT (A) 1.2 1.8 1 VSET=3V VOUT=12V.6.4.2 VSET=3V VOUT=12V -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) -2-1 1 2 3 4 5 6 7 8 9 Temperature( ) -14- Revision A4

1. PACKAGE DIMENSION SOP8-EP (15mil) Dimensions In Millimeters Dimensions In Inched SYMBOLS Min Max Min Max A 1.35 1.75.5.7 A1.5.25..1 b.31.51.1.2 c.1.25..1 D 4.7 5.1.19.2 E 3.8 4..15.16 e 1.27 BASIC.5 BASIC He 5.8 6.2.23.24 Y -.1 -. L.4 1.27.2.5 θ 1 1 D1 3.1 3.5.12.14 E1 2.2 2.6.9.1-15- Revision A4

1.1 Taping Specification SOP8-EP Package 11. ORDERING INFORMATION Part Number Package Type Supplied as Production Flow NCT3941S NCT3941S-A SOP8-EP (Green Package) T Shape: 2,5 units/t&r Commercial, -2 C to + 85 C 12. TOP MARKING SPECIFICATION 3941S 846AX 3941S-A 846AX Pin 1 index Pin 1 index 1 st Line: Nuvoton logo 2 nd Line: 3941S (NCT3941S), 3941S-A (NCT3941S-A) 3 rd line: Tracking code 846: packages assembled in Year 28, week 46 A: assembly house ID. X: IC version. (A means A; B means B and C means C etc. -16- Revision A4

13. REVISION HISTORY VERSION DATE PAGE DESCRIPTION A1 4/1/21 All New Create A2 5/5/21 P.5 Adding thermal consideration A3 5/6/21 P.7 Revised Maximum supply voltage. A4 25/8/21 P.1, P.12 Modify description of feature and waveform Important Notice Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, Insecure Usage. Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life. All Insecure Usage shall be made at customer s risk, and in the event that third parties lay claims to Nuvoton as a result of customer s Insecure Usage, customer shall indemnify the damages and liabilities thus incurred by Nuvoton. -17- Revision A4