DEMO MANUAL DC50A LTC466-/LT46-8V MIL-STD-75D Surge Stopper DESCRIPTION Demonstration circuit 50A uses the LTC 466- and LT46- surge stoppers to satisfy MIL-STD-75D. This specification, created by the United States Department of Defense, sets down requirements of electrical systems powered from a military vehicle s 8V power supply. DC50A s output voltage is limited to 44V when faced with MIL-STD-75D s onerous surge, spike, and ripple conditions. In most circumstances, satisfying MIL-STD- 75D is as simple as placing this circuit in front of a 44V tolerant device. The default version, DC50A-C, provides a minimum of 4A to the output in all conditions except the ±7V ripple condition (4Vpeak-to-peak). During the ripple condition, DC50A-C provides a minimum of.8a to the load. Exceeding.8A during the input ripple condition may cause DC50A-C to timeout and shutoff in less than MIL-STD-75D s one minute ripple ride-through requirement. DC50A s MOSFETs are protected against output overloads by current limiting. Sustained overvoltage or overcurrent conditions cause the circuit to turn off after a timer delay. It automatically retries after a cooldown cycle. DANGER! HIGH VOLTAGE TESTING SHOULD BE PERFORMED BY QUALIFIED PERSONNEL ONLY. AS A SAFETY PRECAUTION AT LEAST TWO PEOPLE SHOULD BE PRESENT DURING HIGH VOLTAGE TESTING. Design files for this circuit board are available at http://www.linear.com/demo/dc50a L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. PERFORMANCE SUMMARY Specifications for DC50A-C are at T A = 5 C PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supply Operating 8 8 40 V 500ms Surge 00 V Survival (with Optional TVS Removed) 50 50 V Output Regulation Voltage 4 4.6 46 V Current Limit 4.4 5 5.6 A dc50af
DEMO MANUAL DC50A QUICK START PROCEDURE Connect a 8V supply to the input and connect a load at the output. A good output load choice is a 0Ω power resistor rated at more than 00W. If the banana jacks are used, no connections are necessary at the turrets. The green LED turns on to indicate that the output is powered. If the load at the output sinks less than 8mA, place jumper JP in the kω position to preload the output (be aware that preload resistors R4 and R5 may become hot as they dissipate nearly W when the input is at 44V). With less than 8mA of load current, MIL-STD-75D s repeated 00V/50ms input surge test causes capacitors C-C to remain charged at 67V for an extended period of time while the output voltage is regulated to 44V. This is not harmful, but it may cause the LT46 to timeout and shutoff Q4. Now, lower the input voltage to 8V. The output remains powered. In fact, the output remains powered to even lower voltages, but component tolerances, especially the MOSFET threshold voltages, prevent guaranteed operation below 8V. Next, raise the input voltage above 50V. The output shuts off as the circuit detects a high input voltage. Once the input is brought back to 8V, the output power is automatically reapplied after a cooldown timer cycle. Be patient, it can take 0 seconds for power to be reapplied. MIL-STD-75D Requirements Refer to Linear Technology Journal article, High Voltage Surge Stoppers Ease MIL-STD-75D Compliance by Replacing Bulky Passive Components, and the MIL-STD- 75D, Characteristics of 8 Volt DC Electrical Systems in Military Vehicles, United States Department of Defense Interface Standard for a thorough description of requirements. ASSEMBLY OPTIONS DC50A is available from Linear Technology as DC50A-C. This C version provides 4A to the load during all conditions except the ripple condition, where.8a is available to the load for up to one minute. Exceeding.8A during the ripple condition may cause the circuit to timeout in less than one minute. DC50A-C provides uninterrupted power to the load during both the 00V/500ms worst-case surge envelope of MIL-STD-75D and the repeated 00V/50ms recommended test. (Figure shows DC50A-C riding through the 00V/500ms surge. Figure shows it riding through the repeated 00V/50ms surges. Figure 5 shows DC50A-C providing uninterrupted power during a ±7V input ripple event.) Schematics and a bill of materials are provided for three additional assembly options. Versions DC50A-A and DC50A-B provide a minimum of A of current to the load and ride through the 00V/50ms repeated surges specified in the MIL-STD-75D recommended tests. These versions are not guaranteed to ride through the worst-case 500ms envelope in the MIL-STD-75D specifications. No damage will occur, but these versions may shut off when faced with the full 00V/500ms worst-case envelope. Versions DC50A-C and DC50A-D provide at least 4A of current to the load and ride through the 00V/50ms repeated surges and the full worst-case 00V/500ms surge. (Refer to the MIL-STD-75D standard and Linear Technology Journal article, High Voltage Surge Stoppers Ease MIL-STD-75D Compliance by Replacing Bulky Passive Components, for a more thorough description of these requirements.) Versions DC50A-A and DC50A-C provide A and.8a during the ripple condition, respectively. Versions DC50A-B and DC50A-D shutoff immediately when ripple occurs on the input, but they have a reduced bill of materials cost. Table. DC50A Assembly Options STUFFING OPTION MAX LOAD MAX LOAD DURING RIPPLE 00V/50ms SURGE (FIVE REPEATS) 00V/500ms SURGE DC50A-A A A Yes No DC50A-B A N/A Yes No DC50A-C 4A.8A Yes Yes DC50A-D 4A N/A Yes Yes dc50af
DEMO MANUAL DC50A CIRCUIT OPERATION Unless otherwise specified, the description of circuit operation that follows applies to the default assembly option DC50A-C. 00V/500ms Surge In MIL-STD-75D, the worst-case MOSFET power dissipation condition occurs during the 00V input surge. The circuit shown in the schematic diagram regulates the output voltage to 44V. As a result, the circuit must drop 56V from the 00V input to the 44V output. In this MIL- STD-75D solution, to increase power available at the output, two series MOSFETs are used. The first MOSFET s (Q s) source is regulated to 66V by the LTC466, while the second MOSFET s (Q4 s) source is regulated to 44V by the LT46. This reduces the power that must be dissipated in either single MOSFET. Figures and show the results measured during surge testing. The oscilloscope waveform in Figure shows this circuit operating through the full 00V/500ms MIL-STD- 75D surge requirement. Figure shows this circuit operating through the less stringent 00V/50ms pulses described in MIL-STD-75D s recommended tests. ±50V Spike and Reverse Input Protection The 50V spike condition is handled by MOSFET Q. It is rated to withstand over 00V from drain to source, blocking the 50V spike condition seen at the input. MIL- STD-75D specifies that the input energy is limited to 5mJ which is easily handled by this MOSFET. Figure shows the results of the 50V spike measured during MIL-STD-75D testing. Similarly, the 50V spike test result is shown in Figure 4. In this condition, diode D4 is reverse biased during the 50V spike, blocking the spike from Q4 and the output. 00V R LOAD = 0Ω 50V SPIKE V IN 0V/DIV V OUT 0V/DIV I OUT A/DIV 8V 7V.7A 4V 4.A R LOAD = 0Ω V IN 50V/DIV V OUT 50V/DIV I OUT 5A/DIV 8V 7V.7A 00ms/DIV µs/div Figure. MIL-STD-75D 00V/500ms Surge Test Figure. Positive Input Spike 00V I OUT 5A/DIV V OUT 50V/DIV V IN 50V/DIV.7A 7V 8V V IN 0V/DIV V OUT 0V/DIV I OUT A/DIV 8V 7V.7A 4V 4.A 50V SPIKE R LOAD = 0Ω R LOAD = 0Ω 500ms/DIV µs/div Figure. MIL-STD-75D 00V/50ms Surge Repeated Five Times Figure 4. Negative Input Spike dc50af
DEMO MANUAL DC50A CIRCUIT OPERATION D4 additionally provides reverse polarity protection, preventing negative input voltages from showing up at the output. (The LTC466 surge stopper in front of D4 is capable of withstanding reverse voltages and the 50V spike without additional protection.) An optional bidirectional TVS (Transient Voltage Suppressor) is present at the input to provide extra protection. Its 50V breakdown voltage does not affect circuit operation below 00V. For applications where a TVS is not desirable at the input, this optional component can be removed. Note that the output voltage trace (V OUT ) during the MIL- STD-75D spike tests in Figures and 4 shows high frequency ringing which is a measurement artifact of the large currents that flow in supply and ground traces when the 0.µF test circuit capacitor is discharged directly at the circuit input with all resistances and inductances minimized. ±7V Ripple Satisfying the ripple specification of MIL-STD-75D requires several more components. Diode D4 in combination with capacitors C-C form an AC rectifier. This rectified signal appears at the RIPCAP node. The LT46 in combination with sense resistor R limits the maximum current to 5A (typical). If the rising edge of the input ripple waveform attempts to pull up the output capacitor with more than 5A, the LT46 momentarily limits the current by pulling down on Q4 s gate. To quickly restore the gate voltage, the small charge pump formed by components D5, D6, C4, C5, and C6 supplements the LT46 s internal charge pump to quickly pull up MOSFET Q4 s gate. Even still, the available load current must be reduced to.8a during this ripple condition. Figure 5 shows that the output remains powered during ripple testing. V IN 5V/DIV V OUT 5V/DIV I OUT A/DIV 8V 7.5V.75A R LOAD = 0Ω V 0.V 0ms/DIV Figure 5. 4V P-P Input Ripple Condition Finally, thermal protection is implemented by components R5, R6, R7, Q6-, Q6-,Q5- and thermistor R9. If the temperature at Q4 s heat sink exceeds 05 C, the LT46 s UV pin is pulled down by Q5- to force off MOSFET Q4 and limit its maximum temperature. Starting Mode Initial Engagement Surge It should also be noted that with the specified components, this circuit is only guaranteed to work down to a minimum of 8V during the starting mode initial engagement surge rather than the minimum 6V specified in MIL-STD-75D. DC50A Assembly Options Assembly options DC50A-B and DC50A-D eliminate capacitors C-C to reduce total solution cost. In those assembly options, C5, C7, R, R, D7-, and D7- inject a small current into the LT46 s TIMER on each rising edge of the input ripple (which appears at the SOURCE node). In the face of ripple, those components will force the LT46 to timeout quickly and turn off Q4. 5V 4V 4 dc50af
DEMO MANUAL DC50A PCB LAYOUT DC50A is designed to withstand input voltages from 50V to 50V when the optional 50V bidirectional TVS DP is removed. The maximum positive input voltage is limited by the 00V BVDSS rating of the input MOSFET (Q on DC50A-A/DC50A-B, and Q on DC50A-C/ DC50A-D). The negative input voltage is limited by the series diode (D on DC50A-A/DC50A-B, and D4 on DC50A-C/DC50A-D). Upstream of the RIPCAP node, spacings and component package sizes have been chosen to support the high voltages that may be present. Traces and components downstream of the RIPCAP node are limited to less than 67V by Q/Q and the LTC466. Negative voltages are blocked from traces and components downstream of the RIPCAP node by D/D4. Top Silkscreen dc50af 5
DEMO MANUAL DC50A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components C CAP., X7R, 0.µF, 00V 0% 0 KEMET, C0C04KRAC705 C4 CAP., X7R, 0.µF, 500V 0% 0 KEMET, C0C04KCRACTU 0 C5, C8 CAP., OPT, 0 OPTION 4 C7 CAP., X7R, 0.047µF, 00V 0% 0805 TDK, C0X7RA47K5AA 5 C8 CAP., ALUM., 68µF 50V 0% SMT SUN ELECT., 50CE68LX 6 C9 CAP., X7R, 0.µF, 00V 0% 0805 TDK, C0X7RA04K5AA 7 C0 CAP., X7R, 0.47µF, 00V 0% 0805 AVX, 0805C474KAZA 8 C CAP., X7R, µf, 6V 0% 0805 TDK, C0X7RC05K085AC 9 C5 CAP., X7R, µf, 50V 0% 0 TDK, C5750X7RE05K0KA 0 DP DIODE, TVS, OPT., SMB VISHAY, P65MB50CA-E/5 0 DP DIODE, TVS, OPT., SMC OPTION D DIODE, SWITCHING, SOT- DIODES INC., BASW-7-F D DIODE, SCHOTTKY, 0V 00mA, SOT- DIODES INC., BAT54-7-F 4 D9 LED, GREEN, DIFFUSED, 0805 AVAGO, HSMG-C70 5 4 E, E, E6, E7 BANANA JACK, NON-INSULATED KEYSTONE, 575-4 6 E, E5, E TEST POINT, TURRET, 0.06, PBF MILL-MAX, 08--00-80-00-00-07-0 7 4 E4, E8, E9, E0 TEST POINT, TURRET, 0.094, PBF MILL-MAX, 50--00-80-00-00-07-0 8 JP HEADER, X PIN, 0.079CC SULLINS, NRPN0PAEN-RC 9 4 MP, MP, MP, MP4 STANDOFF, NYLON 0.5" KEYSTONE, 88 (SNAP ON) 0 Q5, Q6 TRANSISTOR, DUAL NPN, SOT-6 DIODES INC., MMDT555-7-F R, R RES., CHIP, HIGH POWER, 00Ω, /4W, 5% 0 VISHAY, CRCW000RJNEAHP R4 RES., CHIP, 7k, /4W, % 06 VISHAY, CRCW067KFKEA R5 RES., CHIP, 00Ω, /8W, % 0805 YAGEO, RC0805FR-0700RL 4 R6 RES., CHIP, 0Ω, /8W, 5% 0805 VISHAY, CRCW08050R0JNEA 5 R7 RES., CHIP, 0k, /4W, 5% 06 PANASONIC, ERJ-8GEYJ0V 6 R8 RES., CHIP, 0.Ω, /8W, % 0805 VISHAY, CRCW08050RFKEA 7 R9 RES., CHIP,.k, /8W, % 0805 VISHAY, CRCW0805KFKEA 8 R0 RES., CHIP, k, /W, % 0 VISHAY, CRCW0KOOFKEA 9 R, R RES., CHIP, k, /8W, % 0805 VISHAY, CRCW0805KFKEA 0 R RES., CHIP, 649k, /4W, % 06 VISHAY, CRCW06649KFKEA R4, R6, R7 RES., CHIP, 0k, /8W, % 0805 VISHAY, CRCW08050KFKEA R5, R9 RES., CHIP, 0k, /8W, % 0805 VISHAY, CRCW08050K0FKEA R6, R7, R8 RES., CHIP, 8.k, /W, % 0 VISHAY, CRCW08KFKEA 4 R0 RES., CHIP, 00k, /8W, % 0805 VISHAY, CRCW080500KFKEA 5 0 R RES., CHIP, OPT, 0805 OPTION 6 R8 RES., CHIP, k, /8W, 5% 0805 NIC, NRC0J0TRF 7 R RES., CHIP, 9.k, /W, % 0 PANASONIC, ERJ-4NF9U 6 dc50af
DEMO MANUAL DC50A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 8 R4, R5 RES., CHIP, k, W, % 00 VISHAY, CRCW00K00FKEFHP 9 0 R6 RES., CHIP, 0M, /4W, 5% 06, OPTION PANASONIC, ERJ-8GEYJ06V (OPTION) 40 U IC, HIGH VOLTAGE SURGE STOPPER, TS8 LINEAR TECH., LTC466HTS8-#TRMPBF 4 U IC, HIGH VOLTAGE SURGE STOPPER WITH CURRENT LIMIT, SOIC LINEAR TECH., LT46HS-#PBF 4 XJP SHUNT, mm SAMTEC, 5N-BK-G DC50A-A Required Circuit Components DC50A DC50A GENERAL BOM C-C CAP., X7S, 0µF, 00V 0% 0 TDK, C5750X7SA06M0KB C6 CAP., X7R, 0.0µF, 00V 0% 06 KEMET, C06CKRACTU 4 C CAP., X7R, 0.µF, 5V 0% 0805 KEMET, C0805C4KRACTU 5 0 C, C7 NOT USED 6 C4, C6 CAP., X7R, µf, 50V 0% 0 TDK, C5750X7RE05K0KA 7 D DIODE ARRAY, TO-6 VISHAY, UHB0FCT-E/4W 8 0 D4, D7, D8 NOT USED 9 D5, D6, D0 DIODE ARRAY, SOT DIODES INC., MMBD004S-7-F 0 0 HS, HS, HS NOT USED Q TRANS., MOSFET N-CH., 00V, TO-6 IXYS, IXTA6N0P Q TRANS., MOSFET N-CH., 75V, TO-6 FAIRCHILD, FDB045AN08A0 0 Q, Q4 NOT USED 4 R RES., CHIP, CURRENT SENSE, 0.00Ω, /W, % 06 IRC, LRC-LRF-06LF-0-R00F 5 R RES., CHIP, 5.6M, /8W, 5% 0805 PANASONIC, ERJ-6GEYJ565V 6 R RES., CHIP, 0Ω, /8W, 0805 YAGEO, RC0805JR-070RL 7 R4 RES., CHIP, 0k, /8W, 5% 0805 VISHAY, CRCW08050K0JNEA 8 R5 RES., CHIP, 4.75k, /8W, % 0805 VISHAY, CRCW08054K75FKEA 9 R0 THERMISTOR, PTC, 470Ω, 060 EPCOS, B5960A005A06 0 0 R9, R, R NOT USED dc50af 7
DEMO MANUAL DC50A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC50A-B Required Circuit Components DC50A DC50A GENERAL BOM 0 C-C NOT USED C6 CAP., X7R, 0.0µF, 00V 0% 06 KEMET, C06CKRACTU 4 C CAP., X7R, 0.µF, 5V 0% 0805 KEMET, C0805C4KRACTU 5 0 C, C4, C6 NOT USED 6 C7 CAP., X7R, 0.0µF, 6V 0% 0805 KEMET, C0805CK4RACTU 7 D DIODE ARRAY, TO-6 VISHAY, UHB0FCT-E/4W 8 0 D4, D5, D6, D0 NOT USED 9 D7 DIODE ARRAY, SOT CENTRAL SEMI., CMPSH-SE 0 D8 DIODE, ZENER.V 500mW SOD- DIODES INC., MMSZ56B-7-F 0 HS, HS, HS NOT USED Q TRANS., MOSFET N-CH., 00V, TO-6 IXYS, IXTA6N0P Q TRANS., MOSFET N-CH., 75V, TO-6 FAIRCHILD, FDB045AN08A0 4 0 Q, Q4 NOT USED 5 R RES., CHIP, CURRENT SENSE, 0.00Ω, /W, % 06 IRC, LRC-LRF-06LF-0-R00F 6 0 R, R, R4, R9 NOT USED 7 R5 RES., CHIP, 4.75k, /8W, % 0805 VISHAY, CRCW08054K75FKEA 8 R0 THERMISTOR, PTC, 470Ω, 060 EPCOS, B5960A005A06 9 R RES., CHIP, 0k, /W, 5% 0 PANASONIC, ERJ-4YJ0U 0 R RES., CHIP, 00k, /8W, 5% 0805 YAGEO, RC0805JR-0700KL 8 dc50af
DEMO MANUAL DC50A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC50A-C Required Circuit Components DC50A DC50A GENERAL BOM C-C CAP., X7S, µf, 00V 0% 0 TDK, CKG57NX7SA6M500JH C6 CAP., X7R, 0.05µF, 00V 0% 06 KEMET, C06C5KRACTU 4 C CAP., X7R,.µF, 5V 0% 0805 TDK, CGA4JX7RE5K5AB 5 C CAP., X7R, 0µF, 6V 0% 0805 SAMSUNG, CLB06KOQNNNE 6 C4, C6 CAP., X7R, µf, 50V 0% 0 TDK, C5750X7RE05K0KA 7 0 C7 NOT USED 8 0 D, D7, D8 NOT USED 9 D4 DIODE ARRAY, TO-47 VISHAY, FEP0GP-E/45 0 D5, D6, D0 DIODE ARRAY, SOT DIODES INC., MMBD004S-7-F HS, HS, HS HEATSINK, VERTICAL MOUNT ASSMANN WSW COMPONENTS, V88X 0 Q, Q NOT USED Q TRANS., MOSFET N-CH., 00V, TO-P IXYS, IXTQ88N0P 4 Q4 TRANS., MOSFET N-CH., 00V, TO-P IXYS, IXTQ70N0P 5 R RES., CHIP, CURRENT SENSE, 0.00Ω, /W, % 06 IRC, LRC-LRF-06LF-0-R00F 6 R RES., CHIP, 5.6M, /8W, 5% 0805 PANASONIC, ERJ-6GEYJ565V 7 R RES., CHIP, 6.9k, /8W, % 0805 VISHAY, CRCW08056K9FKEA 8 R4 RES., CHIP, 0k, /8W, 5% 0805 VISHAY, CRCW08050K0JNEA 9 R5 RES., CHIP, k, /8W, % 0805 VISHAY, CRCW0805K00FKEA 0 R9 THERMISTOR, PTC, 00Ω, RADIAL LEAD EPCOS, B5990D00A40 0 R0, R, R NOT USED dc50af 9
DEMO MANUAL DC50A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC50A-D Required Circuit Components DC50A DC50A GENERAL BOM 0 C-C, C4, C6 NOT USED C6 CAP., X7R, 0.05µF, 00V 0% 06 KEMET, C06C5KRACTU 4 C CAP., X7R,.µF, 5V 0% 0805 TDK, CGA4JX7RE5K5AB 5 C CAP., X7R, 0µF, 6V 0% 0805 SAMSUNG, CLB06KOQNNNE 6 C7 CAP., X7R, 0.0µF, 6V 0% 0805 KEMET, C0805CK4RACTU 7 0 D, D5, D6, D0 NOT USED 8 D4 DIODE ARRAY, TO-47 VISHAY, FEP0GP-E/45 9 D7 DIODE ARRAY, SOT CENTRAL SEMI., CMPSH-SE 0 D8 DIODE, ZENER.V 500mW SOD- DIODES INC., MMSZ56B-7-F HS, HS, HS HEATSINK, VERTICAL MOUNT ASSMANN WSW COMPONENTS, V88X 0 Q, Q NOT USED Q TRANS., MOSFET N-CH., 00V, TO-P IXYS, IXTQ88N0P 4 Q4 TRANS., MOSFET N-CH., 00V, TO-P IXYS, IXTQ70N0P 5 R RES., CHIP, CURRENT SENSE, 0.00Ω, /W, % 06 IRC, LRC-LRF-06LF-0-R00F 6 R RES., CHIP, 6.9k, /8W, % 0805 VISHAY, CRCW08056K9FKEA 7 R5 RES., CHIP, k, /8W, % 0805 VISHAY, CRCW0805K00FKEA 8 R9 THERMISTOR, PTC, 00Ω, RADIAL LEAD EPCOS, B5990D00A40 9 R RES., CHIP, 0k, /W, 5% 0 PANASONIC, ERJ-4YJ0U 0 R RES., CHIP, 00k, /8W, 5% 0805 YAGEO, RC0805JR-0700KL 0 R, R4, R0 NOT USED 0 dc50af
5 5 4 4 DEMO MANUAL DC50A SCHEMATIC DIAGRAM ECO REV REVISION HISTORY DESCRIPTION APPROVED DATE PRODUCTION DAN EDDLEMAN 04/5/04 R4 * D 4 NONE D JP PRELOAD K INPUT INPUT E6 HIGH VOLTAGE THIS SIDE INPUT HS * R 00 0 Q* SOURCE E5 C4* C5.0uF D7* D* DP DP 06 C5 TVS OPT OPT 0 + GND R6 C8 68uF C E7 0M C8 C 06 OPT (OPTION) 0 R6 C* C* C* 0 OHM R C7 0.047uF K R R5 D OPT GND GND 00 BASW E0 R4 E4 E 7K R6 R7 GND 06 R7 0K 0K 0K C6* C4* C5* C6* 06 R8 0. R5 R0 0K K 0 RIPCAP D9 GREEN OUTPUT E8 R4 K 00 OUTPUT E C8* LTC466HTS8- TP 0 UV ENOUT R T T LT46HS- 649K E R0* OV FLT FLT 06 R9* THRU-HOLE 060 R8 B B D C0 K R0 R9 C* BAT54 0.47uF R9 AFFIXED TO HS 00K 0K NOTES:. FOR COMPONENTS DESIGNATED WITH *, REFER TO BOM FOR APPROPRIATE PART NUMBER ASSEMBLY TYPES FOR EACH ASSEMBLY TYPE. 60 McCarthy Blvd. STUFFING MAX LOAD 5X. ALL RESISTORS ARE 0805 PACKAGE U.O.N. CUSTOMER NOTICE DURING 00V/50ms 00V/500ms APPROVALS Milpitas, CA 9505 OPTION I L RIPPLE SURGE SURGE LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A Phone: (408)4-900 www.linear.com A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; A -A A A TECHNOLOGY Fax: (408)44-0507 HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. M.HAWKINS LTC Confidential-For Customer Use Only -B A N/A MP MP MP MP4 VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL DAN APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APP ENG. TITLE: SCHEMATIC Q5- EDDLEMAN CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT -C 4A.8A PERFORMANCE OR RELIABILITY. CONTACT LINEAR MIL-STD-75D -D 4A N/A STANDOFFS, 4 PLCS TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. SIZE IC NO. LTC466HTS8- REV. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE N/A DEMO CIRCUIT 50A DATE: 04/5/04 SHEET OF - C9* U 5 5 4 7 TIMER NC NC NC NC VCC 6 GATE 4 SNS R* 9 OUT R K SHDN FB 6 8 GND R * D8 * D4* HS* C6* Q4 * C0 * R5 * C9 0.uF R6 8.K 0 C.0uF Q* D5 * R* 0 E D0 * HS* C* R7 8.K 0 TIMER U 4 5 VSS BASE VDD GATE 8 OUT 7 SHDN FB 6 C * R9.K C7* D6 * Q * C 0.uF R * R 9.K 0 R5 K 00 R8 8.K 0 TP Q6-5 4 Q5- R4 0K 5 4 E9 C4 0.uF R 00 0 6 C7* Q6- R * C * 6 TP TP4 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dc50af
DEMO MANUAL DC50A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 0 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 60 McCarthy Blvd. Milpitas, CA 9505 Copyright 004, Linear Technology Corporation LT 074 PRINTED IN USA Linear Technology Corporation 60 McCarthy Blvd., Milpitas, CA 9505-747 (408) 4-900 FAX: (408) 44-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 04 dc50af