Improve PCB Layout with Skill Utility Programs



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Improve PC Layout with Skill Utility Programs rbel Nissan, COO, Nistec Design Published at PCD&F Magazine, May 2008 Faster time to market is crucial in the development and manufacturing of every new product. Many studies indicate that there is a relationship between project profitability and success and the time it takes from the original idea until the product is on sale on the free market. ll groups involved in the development of a product are responsible for assessing how they can contribute and reduce, regardless of how much, their own process to shorten the entire product s time to market. This article offers an original solution that is applied during PC design that significantly contributes to the reduction of work times and leads to faster time to market. Today s competitive market poses not only technical challenges but also business challenges to engineers and product developers alike. On the technical side, new technologies are constantly emerging and product complexity increases, challenging R&D engineers who are required to obtain better performance from their products. On the business side, when tomorrow s product may become irrelevant compared with the product of the day after tomorrow, it is essential to shorten project times until the prototype is released to achieve the main goal minimum time to market (TTM). PC design sometimes constitutes the bottleneck of a development project. The output of the process is used by both the PC manufacturer and the subcontractor. In fact, this stage finalizes the development of hardware in the project and is the first step in PC manufacturing and assembly. The electrical design process sometimes lasts longer than planned and shifts the pressure to the design bureau. Effective, fast processes at this stage in the process will reduce design time, thus contributing to improved overall TTM and lower NRE costs. PCs are designed using generic Electronic Design utomation (ED) software. On the one hand, this software is built uniformly and consists of a set of elementary commands for executing a job. t the same time, however, ED tools are equipped with powerful customization tools that enable users to develop dedicated customized applications using advanced programming languages that shorten both processing time and overall project time. Despite the fact that each electrical board is substantially different from another, there are actions throughout the design process that are an integral part of each project. The content of the action may be different from project to project, but the work methodology is identical. For example, towards the end of the design process, it is necessary to prepare the legend for the PC s silk 1

print. Whereas the content of the printing is different in all electrical boards, the method for executing the work is the same. In this case, it would be worthwhile to develop an auxiliary software that would be used by PC designers for executing this action. Today, ED tools generic functionality can effectively cover 90% of the design of a PC. The remaining 10% are the key to success; and these can be achieved by the massive operation of customized tools. The following are some examples of service programs developed using the Skill language, which are applied in the Cadence llegro PC work environment. ll programs run using the editor s original toolbar, which has been expanded for this purpose. utotext Orient facilitates the automatic global or local orientation of text on the PC based on the decision of the designer about the relative angle and area that needs to be altered. The program significantly improves the definition and assembly of silk printing on the board. Instead of manually defining the printout on each component, the application analyzes the state of the existing text in terms of orientation and turns it automatically, at the click of a button, based on the user s request. In PCs with multiple pins, for example, over 10,000, savings using the program translates into few working days. Producing Gerber files at the end of the PC s design process for transferring the PC to production requires time and high accuracy on the part of the designer. uto Gerber is a service program that produces Gerber files at the click of a button based on the layers order defined by the designers. The latter have at their disposal a dynamic graphic interface that displays the internal and external layers of the board, enabling them to select relevant layers for creating the Gerber files. This application saves 98% of the time required to create Gerber files at the end of the design phase and prevents potential errors in the manufacturing of the PC. Check Padstacks is a service application that verifies the accuracy of the values of each pin in the PC compared with values in accordance with IPC-7351 and IPC-2221/2. Recommended golden values in these standards constitute the database for the service application. Values checked include pad size, paste mask, solder mask, thermal relief and more. The application was written in Skill, with data processing in Perl. It prevents potential errors in the definition of footprints and ensures that the PC will be produced and assembled quickly and smoothly, with zero faults in the determination of the components library. Copy lock is used to place identical parts (blocks) on the PC and to correctly place components on each block. This obviates the need for components swap for each component of each block. block is defined as a group of components that repeat themselves. fter placing the first block, the 2

program scans the netlist and schematic PDF to identify matches between components and blocks. Since very frequently the configuration of the PCs consists of functionally identical parts, Copy lock saves time during PC design. The program is written in Skill and is based on data deriving from the netlist and schematic PDF files. Data is processed in Excel V. nother example of a customized application is G uto Grid, which automatically defines the grid of G components based on the pitch between pins. The program enables to accurately and rapidly place small components like 0402 and 0201 packages, which must be placed at the shortest possible distance from the G s legs to obtain better filtering, clock resistance, etc. G uto Grid saves substantial time in components placement as it is no longer necessary to manually measure the distance between these small components and the vias, and prevents placing them too near without paying attention. It further makes sure that the components are assembled accurately between the vias. Requirements for these applications come not only from PC designers but also from customers, the development engineers, who sometimes are required to prepare dedicated designs. The programs are adapted to the nature of their work and are aimed at making development and design processes effective. For example, the footprints library of a customers had different symbol components with identical names. This was the result of the non-uniform definition of components in the drawing tools. request was made to write a program in Skill for comparing components with identical names and find the difference between them in terms of critical parameters for PC design, such as height or the padstacks that were used to prepare them. This is how Compare Two DRs was born. The program produces a report about the changes in the definition of symbols (height, distance between pads, etc.). nother advantage of the use of customized programs is a reduction in functional malfunctions during the design process. Instead of the designer executing actions manually, they are automated by the service programs, thus minimizing human errors involved in manual labor. The following are two examples of projects managed at the bureau that demonstrate the savings obtained using these customized applications. PC was manufactured in March 2006 without these auxiliary programs (which were under development at the company). PC, on the other hand, was designed using many of the 22 applications developed. FIGURE 1 shows the work hours invested in the design of both cards. In each one of the design phases, the number of invested hours was measured. In two stages of the design process silk and assembly (S) and MFG (preparation of the manufacturing file), use of the programs was most significant and significantly reduced working time. For example, S activities in PC took 32 hours, 3

whereas in PC they took only 6.6 hours. For a reliable, accurate measurement, the hours invested in these two phases were normalized for each of the projects. summary of the results demonstrates that the accumulated savings obtained with these programs reaches 290%! In a project with 10,000 pins, time savings reach 34 hours (at least 3 work days!). In a project with 20,000 pads, the savings reach 66 hours (over one work week!). FIGURE 2 graphically depicts the number of hours invested in S and MFG for a project with 10,000 pads. To sum up, time to market is crucial to the success of an electronic product. n evaluation of all stages of the lifecycle of a prototype until it is released to the market, and locating the areas in which it is possible to save time making processes more efficient can significantly improve TTM. This article presented a proven method for shortening PC design time using dedicated customized software applications implemented in the ED tool. PC efore Customization PC fter Customization Project Date March 2006 pril 2007 #Pins 9,438 10,728 Silk&ssembly #Hours 32 6.6 Silk&ssembly 3.4 0.61 #Hours for 1K pins Manufacturing #Hours 17 12.75 Manufacturing 1.8 1.18 #Hours for 1K pins Total (S+Mfg) 5.2 #Hours for 1K pins (3.4+1.8) Total (S+Mfg) #Hours for 10K pins Total enefit 290% 1.79 (0.61+1.18) 52 17.9 FIGURE 1. Comparison table of work hours invested in the layout design of both PCs 4

60 50 PC Layout Hours for 10K pins project 40 30 20 10 Total enefit 290% 0 S Mfg Total PC - efore Customization PC - fter Customization FIGURE 2. Customization can dramatically increase users' productivity. Number of hours invested in S and MFG phases for a layout project with 10,000 pins. 5