Chapter 10: Virtual Memory. Lesson 03: Page tables and address translation process using page tables



Similar documents
Lecture 17: Virtual Memory II. Goals of virtual memory

How To Write A Page Table

The Quest for Speed - Memory. Cache Memory. A Solution: Memory Hierarchy. Memory Hierarchy

CS5460: Operating Systems

Board Notes on Virtual Memory

Virtual vs Physical Addresses

Storage in Database Systems. CMPSCI 445 Fall 2010

CS 61C: Great Ideas in Computer Architecture Virtual Memory Cont.

Memory Systems. Static Random Access Memory (SRAM) Cell

Chapter 11: Input/Output Organisation. Lesson 06: Programmed IO

Paging: Introduction A Simple Example And Overview

Storing Data: Disks and Files. Disks and Files. Why Not Store Everything in Main Memory? Chapter 7

ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-17: Memory organisation, and types of memory

Memory Management Outline. Background Swapping Contiguous Memory Allocation Paging Segmentation Segmented Paging

Virtual Memory. How is it possible for each process to have contiguous addresses and so many of them? A System Using Virtual Addressing

Chapter 10: Virtual Memory. Lesson 08: Demand Paging and Page Swapping

W4118: segmentation and paging. Instructor: Junfeng Yang

Intel P6 Systemprogrammering 2007 Föreläsning 5 P6/Linux Memory System

COS 318: Operating Systems. Virtual Memory and Address Translation

& Data Processing 2. Exercise 3: Memory Management. Dipl.-Ing. Bogdan Marin. Universität Duisburg-Essen

Physical Data Organization

18-548/ Associativity 9/16/98. 7 Associativity / Memory System Architecture Philip Koopman September 16, 1998

OPERATING SYSTEM - MEMORY MANAGEMENT

Chapter 8: Structures for Files. Truong Quynh Chi Spring- 2013

The Big Picture. Cache Memory CSE Memory Hierarchy (1/3) Disk

Unit Storage Structures 1. Storage Structures. Unit 4.3

Storing Data: Disks and Files

COS 318: Operating Systems. File Layout and Directories. Topics. File System Components. Steps to Open A File

Prof. Dr. Ing. Axel Hunger Dipl.-Ing. Bogdan Marin. Operation Systems and Computer Networks Betriebssysteme und Computer Netzwerke

Operating Systems. Virtual Memory

Memory ICS 233. Computer Architecture and Assembly Language Prof. Muhamed Mudawar

Memory Hierarchy. Arquitectura de Computadoras. Centro de Investigación n y de Estudios Avanzados del IPN. adiaz@cinvestav.mx. MemoryHierarchy- 1

Copyright 2007 Ramez Elmasri and Shamkant B. Navathe. Slide 13-1

Memory management. Chapter 4: Memory Management. Memory hierarchy. In an ideal world. Basic memory management. Fixed partitions: multiple programs

Data Reduction Methodologies: Comparing ExaGrid s Byte-Level-Delta Data Reduction to Data De-duplication. February 2007

Chapter 13 Disk Storage, Basic File Structures, and Hashing.

Data De-duplication Methodologies: Comparing ExaGrid s Byte-level Data De-duplication To Block Level Data De-duplication

Chapter 13. Disk Storage, Basic File Structures, and Hashing

TELE 301 Lecture 7: Linux/Unix file

Chapter 11: File System Implementation. Chapter 11: File System Implementation. Objectives. File-System Structure

ClockWork Enterprise 5

Exploiting Address Space Contiguity to Accelerate TLB Miss Handling

CSCA0102 IT & Business Applications. Foundation in Business Information Technology School of Engineering & Computing Sciences FTMS College Global

OPERATING SYSTEM - VIRTUAL MEMORY

Chapter 02: Computer Organization. Lesson 04: Functional units and components in a computer organization Part 3 Bus Structures

REAL TIME OPERATING SYSTEM PROGRAMMING-II: II: Windows CE, OSEK and Real time Linux. Lesson-3: Windows and Memory Management

Original-page small file oriented EXT3 file storage system

WHITE PAPER Optimizing Virtual Platform Disk Performance

File-System Implementation

Database Systems. Session 8 Main Theme. Physical Database Design, Query Execution Concepts and Database Programming Techniques

Big Data Technology Map-Reduce Motivation: Indexing in Search Engines

Enterprise Flash Drive

Operating Systems CSE 410, Spring File Management. Stephen Wagner Michigan State University

This Unit: Virtual Memory. CIS 501 Computer Architecture. Readings. A Computer System: Hardware

Chapter 13 File and Database Systems

Chapter 13 File and Database Systems

High-Performance Processing of Large Data Sets via Memory Mapping A Case Study in R and C++

We r e going to play Final (exam) Jeopardy! "Answers:" "Questions:" - 1 -

Chapter 12. Paging an Virtual Memory Systems

The Classical Architecture. Storage 1 / 36

Lesson-16: Real time clock DEVICES AND COMMUNICATION BUSES FOR DEVICES NETWORK

1 File Management. 1.1 Naming. COMP 242 Class Notes Section 6: File Management

How To Write To A Linux Memory Map On A Microsoft Zseries (Amd64) On A Linux (Amd32) (

Computer Organization and Architecture. Characteristics of Memory Systems. Chapter 4 Cache Memory. Location CPU Registers and control unit memory

High-Performance SSD-Based RAID Storage. Madhukar Gunjan Chakhaiyar Product Test Architect

Candidates should be able to: (i) describe the purpose of RAM in a computer system

361 Computer Architecture Lecture 14: Cache Memory

Main Memory & Backing Store. Main memory backing storage devices

Memory Management Simulation Interactive Lab

This Unit: Main Memory. CIS 501 Introduction to Computer Architecture. Memory Hierarchy Review. Readings

Storage Management for Files of Dynamic Records

Chapter 13. Chapter Outline. Disk Storage, Basic File Structures, and Hashing

Implementation of Buffer Cache Simulator for Hybrid Main Memory and Flash Memory Storages

Windows NT File System. Outline. Hardware Basics. Ausgewählte Betriebssysteme Institut Betriebssysteme Fakultät Informatik

OPERATING SYSTEMS MEMORY MANAGEMENT

Outline. Windows NT File System. Hardware Basics. Win2K File System Formats. NTFS Cluster Sizes NTFS

Two Parts. Filesystem Interface. Filesystem design. Interface the user sees. Implementing the interface

Chapter 12 File Management. Roadmap

Chapter 12 File Management

Lab 7. Answer. Figure 1

Motorola 8- and 16-bit Embedded Application Binary Interface (M8/16EABI)

Delphi 2015 SP1-AP1 System Requirements

The assignment of chunk size according to the target data characteristics in deduplication backup system

6.033 Computer System Engineering

Databases and Information Systems 1 Part 3: Storage Structures and Indices

1 Storage Devices Summary

ION EEM 3.8 Server Preparation

4.1 PAGING MODES AND CONTROL BITS

Computer Architecture

COSC 6374 Parallel Computation. Parallel I/O (I) I/O basics. Concept of a clusters

Facebook: Cassandra. Smruti R. Sarangi. Department of Computer Science Indian Institute of Technology New Delhi, India. Overview Design Evaluation

PARCA Certified PACS Associate (CPAS) Requirements

Filing Systems. Filing Systems

File Management. Chapter 12

Distributed File System. MCSN N. Tonellotto Complements of Distributed Enabling Platforms

Transcription:

Chapter 10: Virtual Memory Lesson 03: Page tables and address translation process using page tables

Objective Understand page tables Learn the offset fields in the virtual and physical addresses Understand page table entries format Learn the use of virtual page number, page frame page number, presence bit, changed indication bit, and access rights bits 2

Objective Understand address translation process using page table Learn feasibility of inverted page table 3

Page table 4

Page table A data structure in memory that holds the mapping of virtual to physical addresses Enable determination of whether or not the virtual page (in secondary memory) containing the address referenced by the operation is currently mapped onto a physical page frame and present (in physical memory) 5

Page table The page table section does not need to keep track of the full virtual or physical address of a page that is mapped in the main memory Both virtual and physical page frames are always aligned on a multiple of their size 6

Virtual page number 7

Virtual addresses division into the virtual page identifier and offset Virtual page number (VPN) defined by a set of bits identify the virtual page Along with VPN, a set of bits describes the offset from the start of the virtual page to the virtual address Offset displacement defining the relative address with respect to page frame base address 8

Physical page number 9

Physical addresses division into the page frame identifier and offset Physical page number (PPN) defined by a set of bits identify the physical page frame The virtual and physical pages in a given system are generally the same size, so the number of bits (log 2 of the page size) required to hold the offset field of the virtual and physical addresses are the same 10

Example of address mapping, 32-bit long virtual and physical addresses and 4-kB pages 11

VPN and PPN lengths May or may not be identical Many systems, particularly 64-bit systems, have longer virtual addresses than physical addresses Reason Current impracticality of building a system with 2 64 bytes of DRAM memory 12

Virtual and physical addresses 13

Address translation 14

Address translation When a virtual address is translated, the operating system looks up the entry corresponding to the VPN in the page table and returns the corresponding PPN The offset bits of the virtual address then concatenated onto the PPN to generate the physical address 15

Example A virtual page with 32-bit addresses between 0xffff e800 to 0xffff efff Virtual Page size = (0xffff efff 0xffff e800 + 1) = 2 1024 B = 2 kb Number of offset bits = log 2 (2 1024) = log 2 (2 11 ) Number of VPN bits = 32 11 = 21 16

VPN and PPN VPN 1 = 0b1111 1111 1111 1111 1110 1 (21 bits) Assume that a page frame set of addresses at 0x007000 (24-bits), where the page is loaded (fitted) PPN 1 = 0b0000 0000 0111 0 (of 24 11 = 13 bits) 17

Page of VPN1 translation to PPN1 When the page loads into the page frame from the virtual memory with one virtual page size same as one page frame size 18

Example 2 The address of a memory word = 0xffff e90a Memory word offset (also called displacement) on the page = 0xffff e90a 0xffff e800 = 0x10a = 266 d When this page loads into main memory on address translation, the offset remains the same In the main memory, the address will be 0b0000 0000 0111 0 000 0000 0000 + 0b001 0000 1010 = 0x00710a 19

64-bit virtual addresses and 43-bit physical addresses in a system Find how many bits are required for the VPN and PPN if the pages are 8 kb log 2 (8 kb) = 13, so 13 bits are required for the offset field of both the virtual and physical address assume page size same as page frame size 20

64-bit virtual addresses and 43-bit physical addresses in a system 51 bits (64 13) are required for the virtual page number 30 bits (43 13) required for the physical page frame number 21

Separate page tables for separate programs 22

Separate page tables are required for each program on the system Because each program has its own virtualphysical address mapping The simplest page table implementation is just an array of page table entries, one entry per virtual page, and is known as a single-level page table to distinguish it from the multilevel page tables 23

Address translation To perform an address translation, the operating system uses the virtual page number of the address as an index into the array of page table entries to locate the physical page frame number corresponding to the virtual page 24

A page table for a system whose virtual address space six pages long 25

Page table entries Generally contain a physical page frame number, a valid bit, P (can also be called presence bit), change bit, C (can also be called dirty bit), and access rights, AR bits (read or write or readwrite permission) 26

Use of a page table to translate a virtual address Systems with single-level page tables generally require that the entire page table be kept in physical memory at all times, so that the operating system can access the tab1e for address translations 27

Address translation using a page table 28

Enormous storage needs in page tables concept 29

Enormous storage requirement to hold page tables Even with multilevel page tables To map the entire address space of a modern processor requirement is enormous Amount of storage required for the page table grows with the size of the virtual address space, not the amount of storage on the system 30

Example Assume on a system with 64-bit addresses and 4-kB pages, 2 52 page table entries are required If each entry requires 7 bytes of storage to hold a 52-bit PPN, the valid bit, and the change (dirty) bit, 7 2 52 B of storage (about 30,000,000 GB) required to hold the page table for a single program 31

Example Given that hard disks only hold about 75 GB of data, it is clearly impractical to implement such a page table, even if its organization allows much of it not to be mapped onto the main memory at a given time 32

Inverted page tables concept 33

Inverted page tables A technique that greatly reduces the amount of storage required for page tables in systems with large address spaces Consists of a set of entries, one for each physical page frame in the system Each entry in the inverted page table contains the VPN of the virtual page mapped into that page frame Thus, the amount of storage required for the page table depends on the amount of main memory in the system, not the size of the virtual address space. 34

Inverted page table Entries Each entry in the inverted page table contains the VPN of the virtual page mapped into that page frame Thus, the amount of storage required for the page table depends on the amount of main memory in the system, not the size of the virtual address space 35

Inverted page table entries Organized by physical address, not virtual address, they are harder to search than conventional page tables, since the virtual address cannot be used to determine the appropriate entry in the page table Typically, data structures such as hash tables are used to reduce the time to search the inverted page table 36

Mapping of a subset of the virtual address space instead of the entire address space The page table contains an additional field that indicates the range of addresses mapped by the page table This approach requires page table entries for the entire range of virtual addresses between the lowest and highest addresses used by the program, so its efficiency depends on whether a program allocates data densely or sparsely 37

Summary 38

We learnt Page tables, offset fields in the virtual and physical addresses, virtual page number, page frame page number, presence bit, changed indication bit, and access rights bits Page table entries format Address translation process using the page table Inverted page table organisation also feasible 39

End of Lesson 03 on Page tables and address translation process using page tables 40