(12) United States Patent Miyagoe et a1.

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1 US B2 (12) United States Patent Miyagoe et a1. (10) Patent N0.: (45) Date of Patent: US 8,432,775 B2 Apr. 30, 2013 (54) MOTOR DRIVING CIRCUIT (75) Inventors: Yasuhiro Miyagoe, Kyoto (JP); Yoshito Otaguro, Kyoto (JP) (73) Assignee: Rohm Co., Ltd. (JP) ( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 322 days. (21) Appl. No.: 12/997,685 (22) PCT Filed: Jun. 2, 2009 (86) PCT No.: PCT/JP2009/ (0X1) (2), (4) Date: Dec. 13, 2010 (87) PCT Pub. No.: WO2009/ PCT Pub. Date: Dec. 17, 2009 (65) Prior Publication Data US 2011/ A1 Apr. 21, 2011 (30) Foreign Application Priority Data Jun. 13, 2008 (JP) (51) Int. Cl. G11B 7/00 ( ) (52) US. Cl. USPC /4738; 369/4432; 360/69; 360/75 (58) Field of Classi?cation Search..... None See application?le for complete search history. (56) References Cited U.S. PATENT DOCUMENTS 6,362,929 B1 3/2002 Arai et al. 6,594,102 B1 7/2003 Kanda et a1. 6,614,614 B1 9/2003 Murayama et a1. 6,639,373 B2 * 10/2003 Knight et a / / A1 9/2001 Yaegashi FOREIGN PATENT DOCUMENTS JP A 9/1991 JP A 9/1998 JP A 3/1999 JP A 6/1999 (Continued) OTHER PUBLICATIONS International Search Report for International Application No. PCT/ JP2009/ with English translation mailed on Sep. 15, Noti?cation Concerning Transmittal of International Preliminary Report on Patentability (Chapter I of the Patent Cooperation Treaty) mailed on Dec. 23, (Continued) Primary Examiner * Muhammad N Edun (74) Attorney, Agent, or Firm * Cantor Colburn LLP (57) ABSTRACT An SPM driver drives a spindle motor. A VCM driver drives a VCM. A DC/DC converter (switching regulator) receives a power supply voltage from an external circuit, and generates a stabilized voltage. Linear regulators each receive a power supply voltage from an external circuit, and each generates a stabilized voltage. A shock detection circuit detects vibration of a device mounting the driving circuit. A power monitoring circuit monitors the power supply voltage, and generates a power-on reset signal which is switched to a predetermined level whenever the power supply voltage is cut off. An ADC converts the back electromotive voltage that occurs at the VCM into a digital signal. A serial interface receives data from an external host processor, which is used to control the driving circuit. Cutoff circuits are arranged between the capacitors, which are to be charged using the induced current that occurs at the SPM, and the power supply terminal. When the power supply voltage is cut off, each cutoff circuit dis connects the corresponding capacitor from the power supply terminal. 4 Claims, 36 Drawing Sheets

2 US 8,432,775 B2 Page 2 FOREIGN PATENT DOCUMENTS OTHER PUBLICATIONS JP A 1/ 2000 Noti?cation of Transmittal of Translation of the International Pre JP A 8/2001 liminary Report on Patentability (Chapter I or Chapter II of the Patent JP A 11/2007 C t. T ).1 d J JP A 11/ pm on my ma e an ' WO 99/53493 A1 10/1999 * cited by examiner

3 US. Patent Apr. 30, 2013 Sheet 1 0f 36 US 8,432,775 B2 VNEG INEGO IVCMREF DQGO cs0 ERRI \ERRO T,~10 VdacMT Vis2 T WM INVER'IING VCM VCM DC/DC CONVERTER ' 4m DAG ERROR AMP _ 130 PET VRETPWR H; 12 L142 p La 02 4, I120 Ach VCM \ REGULATOR VCM DRIVER L1 REFERENCE kn - I RS Bch 44 VCM REGULATOR 10bit ADC CQESEET DCITH 4s + 48 sol H OEIESYET VCM N RRET d 2 VIL STEP DOWN ~16 CANCEL BEMF DETECT RETSEN 136 = DC/DC, ADGIN1 l ' CONVERTER 3/ '2 ADCINZ 1W MUXO 56 8PM SVM 03 H13 24 ANALOG MUX IS0_FET SREFEPF; POWER MONITOR Cdelay REGISTER INDEEEMI'IVE up 04 PORDLY ~20 SENSE BOOSTER PRESCALER 6'6 l $05 22 SPM COMMUTATION ii BEMF 4 BSTFI-T SP DETECT SERIAL {6 L BB k- 64 TSD BG 6 MATRIX 7 + PWM 8PM SHOCK 7 PWM DRIVER 1 1" REFERENCE 30 5 GENERATOR 72 SINE J ' /\ TABLE 5 RNF CL 76 SPM U 74 LIMIT CURRENT I"! -\ scfi SIAMPO SCGND SCF2 SW00 AVLBC N'END DéND GND +,I, SZAMPO T T é 1;, Jr J,

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5 US. Patent Apr. 30, 2013 Sheet 3 0f 36 US 8,432,775 B2 74 POR \A Sine Look-up N92 Table 94 ET Ma ISOFET SINONT 5 a SIN ( J r ) J5 KVAL Torque TRQ _ I _ DRV Serial l/f ff Control 5 Sine/8pm up PYVM i; Pre-driver. Loglo I Generator Loglc I 28 CL TRQS > \SM MSK 6 68 BEMF 64 Commutation 3 Mask & Delay Control Logic BEM: Comp 66 'I 3 V _ RNF Current L m t Comp Inductive Same Comp 82 OLDACESIJ] Current Sense An'p. IOFB , 8bit ADO _ AS '\FN v.51 _ a Peak Detector 08cm] 0] /77

6 US. Patent Apr. 30, 2013 Sheet 4 0f 36 US 8,432,775 B2 V116 (4bi't DAC Output) Vis1 (08 Amp output) PWM Drive PWM Toff : muses

7 US. Patent Apr. 30, 2013 Sheet 5 0f 36 US 8,432,775 B2 FIG.5 CLDAC [3] CLDAC [2] CLDAC [1] CLDAC [o] SPM output current [ma]

8 US. Patent Apr. 30, 2013 Sheet 6 0f 36 US 8,432,775 B2 Sine-U BEMF(edge) Hun CDT Setting ON OFF Hun ON Hun ON off VHG off ON ON ON OFF off OFF ON OFF ON OFF ON OFF ON off ON OFF ON OFF ON off ON off ON

9 US. Patent Apr. 30, 2013 Sheet 7 0f 36 US 8,432,775 B2 Sine-PWM Window U BEMF Comp output Latch timing T BEMFU

10 US. Patent Apr. 30, 2013 Sheet 8 0f 36 US 8,432,775 B2

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12 US. Patent Apr. 30, 2013 Sheet 10 0f 36 US 8,432,775 B2 owoe

13 I US. Patent Apr. 30, 2013 Sheet 11 0f 36 US 8,432,775 B2 I \ I DCVCC ' 1 voltage 1 OOrnV Vdc2 I k, I SOFT START time Smsec

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15 US. Patent Apr. 30, 2013 Sheet 13 0f 36 US 8,432,775 B2 FIG.13 33k; VREG1 :1v. Tim/00 2/31 vss1 / GAR Soft Start M40 Aoh OUT [- LDAR 8 > r Ach EnabQe 2a 14% VREG1 :w l "I _O/1_.7V GBR Soft Start BC OUT '7 DBR b "'- '= 2b Bah Enable 5v

16 US. Patent Apr. 30, 2013 Sheet 14 0f 36 US 8,432,775 B2 OwO 8F FUN ; + All $0.:?ow imam 1.6K

17 US. Patent Apr. 30, 2013 Sheet 15 0f 36 US 8,432,775 B2 FIG. 1 5 LSAT I II II! I [I llllllliilll r. I l I I I l l l I I I I I l I I I l l l l l

18 US. Patent Apr. 30, 2013 Sheet 16 0f 36 US 8,432,775 B2 Hum 22 DOEOQ / >EmNw~E> u / i no _ on: 80>

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20 US. Patent Apr. 30, 2013 Sheet 18 0f 36 US 8,432,775 B2 FIG snoumqou?s uoneomzpaa mayo 9129

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(12) United States Patent Okazaki et al.

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