PIC32 CONFIGURATION SETTINGS. Table of Contents. Configuration Settings... 1
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- Magdalen Reed
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1 PIC32 CONFIGURATION SETTINGS Table of Contents Configuration Settings M4KCORE... 1 PIC32MX110F016B... 1 PIC32MX110F016C... 4 PIC32MX110F016D... 8 PIC32MX120F032B PIC32MX120F032C PIC32MX120F032D PIC32MX130F064B PIC32MX130F064C PIC32MX130F064D PIC32MX150F128B PIC32MX150F128C PIC32MX150F128D PIC32MX210F016B PIC32MX210F016C PIC32MX210F016D PIC32MX220F032B PIC32MX220F032C PIC32MX220F032D PIC32MX230F064B PIC32MX230F064C PIC32MX230F064D PIC32MX250F128B PIC32MX250F128C PIC32MX250F128D PIC32MX320F032H PIC32MX320F064H PIC32MX320F128H PIC32MX320F128L PIC32MX330F064H PIC32MX330F064L PIC32MX340F128H
2 PIC32 Configuration Settings PIC32MX340F128L PIC32MX340F256H PIC32MX340F512H PIC32MX350F128H PIC32MX350F128L PIC32MX350F256H PIC32MX350F256L PIC32MX360F256L PIC32MX360F512L PIC32MX370F512H PIC32MX370F512L PIC32MX420F032H PIC32MX430F064H PIC32MX430F064L PIC32MX440F128H PIC32MX440F128L PIC32MX440F256H PIC32MX440F512H PIC32MX450F128H PIC32MX450F128L PIC32MX450F256H PIC32MX450F256L PIC32MX460F256L PIC32MX460F512L PIC32MX470F512H PIC32MX470F512L PIC32MX534F064H PIC32MX534F064L PIC32MX564F064H PIC32MX564F064L PIC32MX564F128H PIC32MX564F128L PIC32MX575F256H PIC32MX575F256L PIC32MX575F512H PIC32MX575F512L PIC32MX664F064H PIC32MX664F064L PIC32MX664F128H
3 PIC32MX664F128L PIC32MX675F256H PIC32MX675F256L PIC32MX675F512H PIC32MX675F512L PIC32MX695F512H PIC32MX695F512L PIC32MX764F128H PIC32MX764F128L PIC32MX775F256H PIC32MX775F256L PIC32MX775F512H PIC32MX775F512L PIC32MX795F512H PIC32MX795F512L PIC32MXGENERIC
4 PIC32 Configuration Settings
5 PIC32 CONFIGURATION SETTINGS Configuration Settings This document lists the configuration settings available for each of the PIC32 MCU devices for use with MPLAB XC32's #pragma config directive. 32M4KCORE PIC32MX110F016B Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier 4/3/13 Page 1
6 System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 4/3/13 Page 2
7 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 4/3/13 Page 3
8 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K PWP = PWP8K First 8K PWP = PWP7K First 7K PWP = PWP6K First 6K PWP = PWP5K First 5K PWP = PWP4K First 4K PWP = PWP3K First 3K PWP = PWP2K First 2K PWP = PWP1K First 1K PWP = OFF Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX110F016C Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration 4/3/13 Page 4
9 Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) 4/3/13 Page 5
10 FNOSC = FRCDIV Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : /3/13 Page 6
11 WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K 4/3/13 Page 7
12 PWP = PWP15K PWP = PWP14K PWP = PWP13K PWP = PWP12K PWP = PWP11K PWP = PWP10K PWP = PWP9K PWP = PWP8K PWP = PWP7K PWP = PWP6K PWP = PWP5K PWP = PWP4K PWP = PWP3K PWP = PWP2K PWP = PWP1K PWP = OFF First 15K First 14K First 13K First 12K First 11K First 10K First 9K First 8K First 7K First 6K First 5K First 4K First 3K First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX110F016D Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 4/3/13 Page 8
13 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF 4/3/13 Page 9
14 Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is 4/3/13 Page 10
15 DEBUG = OFF JTAG Enable: JTAGEN = OFF JTAGEN = ON Debugger is JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K PWP = PWP8K First 8K PWP = PWP7K First 7K PWP = PWP6K First 6K PWP = PWP5K First 5K PWP = PWP4K First 4K PWP = PWP3K First 3K PWP = PWP2K First 2K PWP = PWP1K First 1K PWP = OFF Disable Boot Flash Write Protect bit: BWP = ON Protection 4/3/13 Page 11
16 BWP = OFF Code Protect: CP = ON CP = OFF Protection Protection Protection PIC32MX120F032B Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 4/3/13 Page 12
17 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 4/3/13 Page 13
18 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K 4/3/13 Page 14
19 PWP = PWP25K PWP = PWP24K PWP = PWP23K PWP = PWP22K PWP = PWP21K PWP = PWP20K PWP = PWP19K PWP = PWP18K PWP = PWP17K PWP = PWP16K PWP = PWP15K PWP = PWP14K PWP = PWP13K PWP = PWP12K PWP = PWP11K PWP = PWP10K PWP = PWP9K PWP = PWP8K PWP = PWP7K PWP = PWP6K PWP = PWP5K PWP = PWP4K PWP = PWP3K PWP = PWP2K PWP = PWP1K PWP = OFF First 25K First 24K First 23K First 22K First 21K First 20K First 19K First 18K First 17K First 16K First 15K First 14K First 13K First 12K First 11K First 10K First 9K First 8K First 7K First 6K First 5K First 4K First 3K First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX120F032C Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON Controlled by Port Function Controlled by the USB Module 4/3/13 Page 15
20 USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF 4/3/13 Page 16
21 IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode 4/3/13 Page 17
22 Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K 4/3/13 Page 18
23 PWP = PWP8K PWP = PWP7K PWP = PWP6K PWP = PWP5K PWP = PWP4K PWP = PWP3K PWP = PWP2K PWP = PWP1K PWP = OFF First 8K First 7K First 6K First 5K First 4K First 3K First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX120F032D Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 4/3/13 Page 19
24 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM 4/3/13 Page 20
25 FCKSM = CSECMD FCKSM = CSDCMD Clock Switch Enable, FSCM Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved 4/3/13 Page 21
26 ICESEL = ICS_PGx3 ICESEL = ICS_PGx2 ICESEL = ICS_PGx1 Communicate on PGEC3/PGED3 Communicate on PGEC2/PGED2 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K PWP = PWP8K First 8K PWP = PWP7K First 7K PWP = PWP6K First 6K PWP = PWP5K First 5K PWP = PWP4K First 4K PWP = PWP3K First 3K PWP = PWP2K First 2K PWP = PWP1K First 1K PWP = OFF Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection 4/3/13 Page 22
27 PIC32MX130F064B Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL Fast RC Osc (FRC) Fast RC Osc with PLL 4/3/13 Page 23
28 FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 4/3/13 Page 24
29 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K 4/3/13 Page 25
30 PWP = PWP20K PWP = PWP19K PWP = PWP18K PWP = PWP17K PWP = PWP16K PWP = PWP15K PWP = PWP14K PWP = PWP13K PWP = PWP12K PWP = PWP11K PWP = PWP10K PWP = PWP9K PWP = PWP8K PWP = PWP7K PWP = PWP6K PWP = PWP5K PWP = PWP4K PWP = PWP3K PWP = PWP2K PWP = PWP1K PWP = OFF First 20K First 19K First 18K First 17K First 16K First 15K First 14K First 13K First 12K First 11K First 10K First 9K First 8K First 7K First 6K First 5K First 4K First 3K First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX130F064C Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 4/3/13 Page 26
31 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode 4/3/13 Page 27
32 POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% 4/3/13 Page 28
33 FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = ICS_PGx4 Communicate on PGEC4/PGED4 ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K PWP = PWP8K First 8K PWP = PWP7K First 7K PWP = PWP6K First 6K PWP = PWP5K First 5K PWP = PWP4K First 4K PWP = PWP3K First 3K 4/3/13 Page 29
34 PWP = PWP2K PWP = PWP1K PWP = OFF First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX130F064D Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier 4/3/13 Page 30
35 System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 4/3/13 Page 31
36 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = ICS_PGx4 Communicate on PGEC4/PGED4 ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 4/3/13 Page 32
37 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K PWP = PWP15K First 15K PWP = PWP14K First 14K PWP = PWP13K First 13K PWP = PWP12K First 12K PWP = PWP11K First 11K PWP = PWP10K First 10K PWP = PWP9K First 9K PWP = PWP8K First 8K PWP = PWP7K First 7K PWP = PWP6K First 6K PWP = PWP5K First 5K PWP = PWP4K First 4K PWP = PWP3K First 3K PWP = PWP2K First 2K PWP = PWP1K First 1K PWP = OFF Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX150F128B Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration 4/3/13 Page 33
38 Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) 4/3/13 Page 34
39 FNOSC = FRCDIV Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : /3/13 Page 35
40 WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is DEBUG = OFF Debugger is JTAG Enable: JTAGEN = OFF JTAGEN = ON JTAG JTAG Port ICE/ICD Comm Channel Select: ICESEL = RESERVED Reserved ICESEL = ICS_PGx3 Communicate on PGEC3/PGED3 ICESEL = ICS_PGx2 Communicate on PGEC2/PGED2 ICESEL = ICS_PGx1 Communicate on PGEC1/PGED1 Program Flash Write Protect: PWP = PWP32K First 32K PWP = PWP31K First 31K PWP = PWP30K First 30K PWP = PWP29K First 29K PWP = PWP28K First 28K PWP = PWP27K First 27K PWP = PWP26K First 26K PWP = PWP25K First 25K PWP = PWP24K First 24K PWP = PWP23K First 23K PWP = PWP22K First 22K PWP = PWP21K First 21K PWP = PWP20K First 20K PWP = PWP19K First 19K PWP = PWP18K First 18K PWP = PWP17K First 17K PWP = PWP16K First 16K 4/3/13 Page 36
41 PWP = PWP15K PWP = PWP14K PWP = PWP13K PWP = PWP12K PWP = PWP11K PWP = PWP10K PWP = PWP9K PWP = PWP8K PWP = PWP7K PWP = PWP6K PWP = PWP5K PWP = PWP4K PWP = PWP3K PWP = PWP2K PWP = PWP1K PWP = OFF First 15K First 14K First 13K First 12K First 11K First 10K First 9K First 8K First 7K First 6K First 5K First 4K First 3K First 2K First 1K Disable Boot Flash Write Protect bit: BWP = ON Protection BWP = OFF Protection Code Protect: CP = ON CP = OFF Protection Protection PIC32MX150F128C Peripheral Module Disable Configuration: PMDL1WAY = OFF Allow multiple reconfigurations PMDL1WAY = ON Allow only one reconfiguration Peripheral Pin Select Configuration: IOL1WAY = OFF Allow multiple reconfigurations IOL1WAY = ON Allow only one reconfiguration USB USID Selection: FUSBIDIO = OFF FUSBIDIO = ON USB VBUS ON Selection: FVBUSONIO = OFF FVBUSONIO = ON PLL Input Divider: FPLLIDIV = DIV_1 FPLLIDIV = DIV_2 FPLLIDIV = DIV_3 FPLLIDIV = DIV_4 FPLLIDIV = DIV_5 FPLLIDIV = DIV_6 Controlled by Port Function Controlled by the USB Module Controlled by Port Function Controlled by USB Module 1x Divider 2x Divider 3x Divider 4x Divider 5x Divider 6x Divider 4/3/13 Page 37
42 FPLLIDIV = DIV_10 FPLLIDIV = DIV_12 PLL Multiplier: FPLLMUL = MUL_15 FPLLMUL = MUL_16 FPLLMUL = MUL_17 FPLLMUL = MUL_18 FPLLMUL = MUL_19 FPLLMUL = MUL_20 FPLLMUL = MUL_21 FPLLMUL = MUL_24 10x Divider 12x Divider 15x Multiplier 16x Multiplier 17x Multiplier 18x Multiplier 19x Multiplier 20x Multiplier 21x Multiplier 24x Multiplier System PLL Output Clock Divider: FPLLODIV = DIV_1 PLL Divide by 1 FPLLODIV = DIV_2 PLL Divide by 2 FPLLODIV = DIV_4 PLL Divide by 4 FPLLODIV = DIV_8 PLL Divide by 8 FPLLODIV = DIV_16 PLL Divide by 16 FPLLODIV = DIV_32 PLL Divide by 32 FPLLODIV = DIV_64 PLL Divide by 64 FPLLODIV = DIV_256 PLL Divide by 256 Oscillator Selection Bits: FNOSC = FRC FNOSC = FRCPLL FNOSC = PRI FNOSC = PRIPLL FNOSC = SOSC FNOSC = LPRC FNOSC = FRCDIV16 FNOSC = FRCDIV Fast RC Osc (FRC) Fast RC Osc with PLL Primary Osc (XT,HS,EC) Primary Osc w/pll (XT+,HS+,EC+PLL) Low Power Secondary Osc (SOSC) Low Power RC Osc (LPRC) Fast RC Osc w/div-by-16 (FRC/16) Fast RC Osc w/div-by-n (FRCDIV) Secondary Oscillator Enable: FSOSCEN = OFF FSOSCEN = ON Internal/External Switch Over: IESO = OFF IESO = ON Primary Oscillator Configuration: POSCMOD = EC External clock mode POSCMOD = XT XT osc mode POSCMOD = HS HS osc mode POSCMOD = OFF Primary osc disabled CLKO Output Signal Active on the OSCO Pin: OSCIOFNC = ON OSCIOFNC = OFF 4/3/13 Page 38
43 Peripheral Clock Divisor: FPBDIV = DIV_1 FPBDIV = DIV_2 FPBDIV = DIV_4 FPBDIV = DIV_8 Pb_Clk is Sys_Clk/1 Pb_Clk is Sys_Clk/2 Pb_Clk is Sys_Clk/4 Pb_Clk is Sys_Clk/8 Clock Switching and Monitor Selection: FCKSM = CSECME Clock Switch Enable, FSCM FCKSM = CSECMD Clock Switch Enable, FSCM FCKSM = CSDCMD Clock Switch Disable, FSCM Watchdog Timer Postscaler: WDTPS = PS1 1:1 WDTPS = PS2 1:2 WDTPS = PS4 1:4 WDTPS = PS8 1:8 WDTPS = PS16 1:16 WDTPS = PS32 1:32 WDTPS = PS64 1:64 WDTPS = PS128 1:128 WDTPS = PS256 1:256 WDTPS = PS512 1:512 WDTPS = PS1024 1:1024 WDTPS = PS2048 1:2048 WDTPS = PS4096 1:4096 WDTPS = PS8192 1:8192 WDTPS = PS :16384 WDTPS = PS :32768 WDTPS = PS :65536 WDTPS = PS : WDTPS = PS : WDTPS = PS : WDTPS = PS : Watchdog Timer Window Enable: WINDIS = ON Watchdog Timer is in Window Mode WINDIS = OFF Watchdog Timer is in Non-Window Mode Watchdog Timer Enable: FWDTEN = OFF FWDTEN = ON WDT (SWDTEN Bit Controls) WDT Watchdog Timer Window Size: FWDTWINSZ = WINSZ_75 Window Size is 75% FWDTWINSZ = WINSZ_50 Window Size is 50% FWDTWINSZ = WINSZ_37 Window Size is 37.5% FWDTWINSZ = WISZ_25 Window Size is 25% Background Debugger Enable: DEBUG = ON Debugger is 4/3/13 Page 39
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