ZF0A00KITG Z Encore! XP F0A Series Development Kit UM00-009 Copyright 009 by Zilog, Inc. All rights reserved. www.zilog.com
Z Encore! XP F0A Series Development Kit ii Revision History Each instance in Revision History reflects a change to this document from its previous revision. For more details, refer to the corresponding pages and appropriate links in the table below. Date January 009 May 00 March 00 October 00 February 00 Revision Level Description Page Number 0 Updated Hardware section. 0 Updated Introduction section. Changed ZF0A00KIT to ZF0A00KITG. 0 Updated the new Zilog logo, implemented Style Guide, and changed ZiLOG to Zilog. Changed title to Z Encore! XP F0A Series Development Kit. Modified Schematics Table to incorporate changes to R from 0 Ω to 0 Ω. Added Note to the Schematics. 0 F0xA Series development board, Corrected typo in MCU features list: updated schematics for board rev C. 0 Introduction, Corrected Typo in development kit name. All, 9 UM00-009 Revision History
Z Encore! XP F0A Series Development Kit iii Table of Contents Introduction............................................. Kit Contents........................................... Hardware.......................................... Software (on CD-ROM)............................... Documentation...................................... System Requirements................................... Installation......................................... Z Encore! XP F0A Series Development Board.............. Introduction........................................... Features.............................................. MCU................................................. UART with IrDA Endec................................... Power and Communication Interfaces....................... External Interface Headers JP and JP..................... Schematics............................................. 9 Customer Support....................................... UM00-009 Table of Contents
Z Encore! XP F0A Series Development Kit Introduction Kit Contents Hardware Zilog s Z Encore! XP F0A Series microcontroller unit (MCU) is a part of the line of Zilog s MCU products. The Z Encore! XP F0A Series MCU development kit (ZF0A00KITG) enables you to become familiar with the hardware and software tools available with this product. This kit consists of the KB version of the Z Encore! XP development board that supports and presents the features of the Z Encore! XP F0A Series. This kit allows you to begin writing application software and contains all supporting documents. This manual acquaints you with the Z Encore! XP F0A Series MCU development kit, and provides instructions on setting up and using the tools to start building designs and applications. ZF0ASJ00 is the silicon used in the board. For more information, refer to Z Encore! XP F0A Series Product Specification (PS0). The Z Encore! XP F0A Series MCU development kit contains the following: The hardware in Z Encore! XP F0A Series MCU development kit include: Z Encore! XP F0A Series development board USB Smart Cable for PC to Z Encore! XP F0A series development board (previous versions of the development kit used a serial smart cable; for information on using the serial smart cable, refer to your original documentation) V DC power supply UM00-009 Introduction
Z Encore! XP F0A Series Development Kit Packaging CD-ROM Containing Documentation Power Supply Serial Smart Cable Development Board Figure. Z Encore! XP F0A Series Development Kit Contents Software (on CD-ROM) The software in Z Encore! XP F0A Series MCU development kit include: ZDS II Z Encore! IDE with ANSI C-Compiler Sample code Document browser Acrobat Reader UM00-009 Introduction
Z Encore! XP F0A Series Development Kit Documentation The following documents are included in the Z Encore! XP F0A Series development kit: Quick Start Guide Z Encore! XP F0A Series technical documentation (on CD-ROM) Development Kit ZDS II IDE ez CPU Application Notes The sample code is installed with ZDS II and is located in the <installation directory>\samples in the disk drive. The documentation can be installed with the DemoShield interface or viewed on the CD-ROM using the DemoShield menus and a PDF reader. A copy of the Acrobat installer is provided on the CD-ROM and can be installed from the DemoShield install screen. After installing the documentation, Windows Explorer can be used to select any document to be viewed with PDF file viewer. System Requirements An IBM PC (or compatible computer) with the following minimum configurations are required: Microsoft Windows XP Professional SP/Windows 000 SP/Windows NT.0 SP/Windows 9 SE Pentium II/ MHz processor or higher up to Pentium IV,. GHz 9 MB RAM or more MB hard disk space or more Super VGA video adapter UM00-009 Introduction
Z Encore! XP F0A Series Development Kit CD-ROM One or more RS- communication ports Installation For details on installation and setup of the Z Encore! XP F0A Series development kit, refer to Z Encore! XP /Z Encore! Development Kits Quick Start Guide (QS00). UM00-009 Introduction
Z Encore! XP F0A Series Development Kit Z Encore! XP F0A Series Development Board Introduction Zilog s Z Encore! XP F0A Series development board is a development and prototyping board for the Z Encore! XP F0A Series MCU. The board provides you with a tool to evaluate features of Z Encore! XP F0A Series MCU, and to start developing an application before building the hardware. Figure. Z Encore! XP F0A Series Development Board UM00-009 Z Encore! XP F0A Series Development Board
Z Encore! XP F0A Series Development Kit Features The features of Z Encore! XP F0A Series development board include: Z Encore! XP MCU (-pin SOIC) LEDs RS- interface IrDA transceiver Two pushbuttons, RESET and TEST V DC power connector On-Chip Debugger interface 0 MHz Ceramic Oscillator (Y) Header for ADC input Prototyping area External interface connectors JP and JP. V. V operating voltage with V-tolerant inputs MCU The Z Encore! XP F0A Series MCU is a member of the family of Zilog MCU products based on the -bit ez core CPU. The Flash in-circuit programming capability allows for faster development time and program changes in the field. The ez core CPU is upward compatible with existing Z instructions. The rich peripheral set of the Z Encore! XP F0A Series makes it suitable for a variety of applications including motor control, security systems, home appliances, personal electronic devices, and sensors. UM00-009 Z Encore! XP F0A Series Development Board
Z Encore! XP F0A Series Development Kit The development board contains circuitry to support and present all the features of the Z Encore! XP F0A Series. The key features of the Z Encore! XP F0A Series include: ez core CPU KB Flash memory with in-circuit programming capability KB register RAM -channel, 0-bit Analog-to-Digital Converter (ADC) Full-duplex UART Infrared Data Association (IrDA)-compliant infrared encoder/decoder Two -bit timers with capture, compare, and PWM capability Watchdog Timer (WDT) with internal RC oscillator Eleven (0-pin package) or nineteen (-pin package) I/O pins Programmable priority interrupts On-Chip Debugger Voltage Brownout (VBO) Protection Power-On Reset (POR). V. V operating voltage with V-tolerant inputs Operating temperatures: 0 C ±0 C For further information on the Z Encore! family of devices, refer to Z Encore! XP F0A Series Product Specification (PS0), available for download at www.zilog.com. UART with IrDA Endec Z Encore! XP F0A Series (component U) contains a fully-functional, high-performance UART with Infrared Encoder/Decoder (ENDEC). The Infrared Endec is integrated with an on-chip UART allowing easy UM00-009 Z Encore! XP F0A Series Development Board
Z Encore! XP F0A Series Development Kit communication between the Z Encore! XP F0A Series and IrDA transceivers. Infrared communication provides secure, reliable, low-cost, point-to-point communication between PCs, PDAs, cell phones, printers, and other infrared enabled devices. Power and Communication Interfaces Table lists jumper information concerning the shunt status, functions, devices and defaults affected of jumpers JP and JP. Table. Jumpers JP and JP Jumper Status Device Affected Status Default JP* OUT RS- Enabled X interface JP IN RS- Disabled interface JP* OUT IrDA Enabled interface JP IN IrDA Disabled X interface JP OUT U RESET/ PD0 PD0 (GPIO) X JP IN U RESET/ PD0 *These jumpers must not be OUT at the same time. RESET when SW pressed External Interface Headers JP and JP External interface headers JP and JP are displayed in Schematics on page 9. UM00-009 Z Encore! XP F0A Series Development Board
Z Encore! XP F0A Series Development Kit Schematics 9 Figure and Figure on page 0 display the schematics for Z Encore! XP F0A Series development board. D C B A VCC_V PA_nTOUT PA_TOUT PC_COUT TABLE VCC_V PA0_T0IN_JP PA_T0OUT_JP PB_ANA PB_ANA PB_ANA VCC_V PA0_T0IN PA_T0OUT PA PA_CTS0 PA_RXD0 0 pin footprint NOTE VCC_V NOTE : Resistors R0 and R are not populated. See Note. R0 0 R 0 R 0 C9 Y D GREEN D YELL D RED R M 9 0 0 MHz U ZF0xA R 0 Clock Mode R R R C9 C0 Y Internal Only none none none none none none Crystal 0 Ohm 0 Ohm none Yes Yes Yes Ceramic Res 0 Ohm 0 Ohm none none none Yes External CMOS none none none none none none (Use PA0_T0IN pin on JP) R R R0 00 0 PB/ANA PB/ANA PB/CLKIN/ANA VDD PA0/T0IN/T0OUT/XIN/ PA/T0OUT/XOUT PA/DE PA/CTS0 PA/RXD0 C0 00 R9 00K PB0/ANA0 0 PC/COUT/LED 9 PC/ANA/LED PCANA/CINN/LED PC0/ANA/CINP/LED DBG RESET/PD0 PA/TOUT PA/TIN/TOUT PA/TXD0 R 00 PB0_ANA0 PC_COUT PC_ANA PC_ANA PC0_ANA DBG PD0 PA_TOUT PA_nTOUT PA_TXD0 PA VCC_V SW TEST C + 0uF R 0 U IO R PB0_ANA0 0 R RESET/TEST JP PB IO R 0 0 PB_JP HEADER EMI Filter pin footprint U SENSE C 0.0uF C C0 0.0uF 0.00uF NOTE : PB_ANA C 0.00uF PA_CTS0 PA_RXD0 PA_TXD0 R 0 Note : PB and PB are dual function pins (GPIO or Analog supply) R, R, R, and R are zero-ohm resistors used in conjunction with GPIO Control Registers to select function desired. C, C, and C are bypass capacitors that are used for better noise rejection. U is an optional filter that can be used to improve the quality of the Analog Supply. The development board is shipped configured for Analog Supply. Table shows the configurations recommended NOTE : PB_ANA PB_ANA PB PB_ANA VCC_V PA0_T0IN PA_T0OUT PB PB_ANA C 0.00uF PA PA_CTS0 PA_RXD0 PA_TXD0 PB_ANA C 0.00uF PC0_ANA Note : The XP supports internal, external crystal, external ceramic resonator, external R/C and external CMOS drive clock modes. R, R, R, C9, C0 and Y are used to support the clock mode selected. The development board is shipped configured for external 0MHz ceramic resonator or internal clock operation. When using Internal oscilator, pins and could be used as GPIO ports PA0 and PA. To do so install R0 and R. Table shows the recommended clock mode configurations. 9 0 TABLE R R R R R U C...C GPIO OUT IN OUT IN IN OUT OUT Analog IN OUT IN OUT OUT optional IN Supply PB/ANA PB/ANA PB/Vref PB/ANA/CLKIN PB(AVDD) VDD PA0/T0IN/T0OUTXIN PA/T0OUT/XOUT PB(A) PA/DE PA/CTS0 PA/RXD0 PA/TXD0 C 0.00uF ZF0xA_ PC_ANA C 0.00uF PB0_ANA0 PB_ANA PB_ANA PB_ANA PC0_ANA PC_ANA PC_ANA PB_ANA SW PB/ANA PB0/ANA0 PC/COUT/LED PC/ANA/LED PC/ANA/CINN/LED PC0/ANA/CINP/LED DBG RESET/PD0 PC/LED 0 PC/LED 9 PA/TOUT PC/LED PC/LED PA/TIN/TOUT PC_ANA C 0.00uF 9 J PB_ANA PB0_ANA0 PC_COUT PC_ANA PC_ANA PC0_ANA DBG PD0 PC PC PA_TOUT PC PC PA_nTOUT PB_ANA C 0.00uF 0 HEADER X C 0.00uF R9 0K DBG Title If Module is plugged onto the Dev Platform the local RS interface is disabled by pin 0 of JP JP PB_ANA PC_ANA PB_ANA PB_ANA VCC_V PC PC PC_COUT PA_nTOUT PA_TOUT PA_CTS0 PA_RXD0 PB PB -RESET VCC_V VCC_V -TRSTN -F9_WE A A0 A A A A A9 A A A A A A -CS0 -CS D D D D -MREQ -WR -BUSACK 9 9 9 9 9 9 Tuesday, March, 00 Date: Sheet of HEADER 0x/SM connector PC_ANA PC0_ANA PB_ANA PB0_ANA0 PC PC PB_JP PA0_T0IN_JP PA_T0OUT_JP PA PD0 PA_TXD0 -DIS_IrDA connector for reference only JP 9 9 9 9 9 9 VCC_V A0 A VCC_V A A9 A A A A A0 A -DIS_FLASH VCC_V A -CS D0 D D D -IOREQ -RD -INSTRD -BUSREQ XP K MDS Processor Module. Schematic. -DIS_ -DIS_IRDA Size Document Number Rev B 9C09-00 D 0 0 0 0 0 0 0 0 0 0 0 0 HEADER 0x/SM D C B A Figure. Schematic, Z Encore! XP F0A Series MCU Development Board UM00-009 Schematics
Z Encore! XP F0A Series Development Kit 0 VCC_V D J PWR JACK F RXE00 R 0K SENSE R K U VIN OUT -Z_RST SENSE SHDN LT9-./DD V + C C 0.uF 00/0 C 0.uF VCC VCC_V VCC_V R + C 0 00/0 LED. OK PA_TXD0 PA_CTS0 PA_RXD0 C 0.uF C 0.uF PA_TXD0 PA_CTS0 PA_RXD0 C 0.uF TXD0 CTS0 RXD0 C 0.uF USER CONSOLE D VCC_V C R 0K UA LVC0/SO C UB LVC0/SO -DIS_ D 0 0 U C+ C- C+ C- TIN TIN ROUT ROUT EN SHDN VCC 9 V+ V- TOUT TOUT RIN RIN 9 NC NC 9 P DB9 Female MAX JP DIS RS UC LVC0/SO VCC_V R C9 B 0 UE LVC0/SO UF LVC0/SO VCC_V -DIS_IRDA JP DIS IRDA R 0K 9 UD LVC0/SO R R PA_TXD0 IRDA_SD PA_RXD0 0nF U VCC LEDA TXD SD RXD T 0 ZHX0 B R 0K A TP TP VCC_V DBG INTERFACE P Header x -Z_RST DBG DBG Title XP K MDS Processor Module. Schematic. Size Document Number Rev B 9C09-00 D Date: Wednesday, March, 00 Sheet of A Figure. Schematic, Z Encore! XP F0A Series MCU Development Board UM00-009 Schematics
Z Encore! XP F0A Series Development Kit Customer Support For answers to technical questions about the product, documentation, or any other issues with Zilog s offerings, please visit Zilog s Knowledge Base at http://www.zilog.com/kb. For any comments, detail technical questions, or reporting problems, please visit Zilog s Technical Support at http://support.zilog.com. UM00-009 Customer Support
Z Encore! XP F0A Series Development Kit Warning: DO NOT USE IN LIFE SUPPORT LIFE SUPPORT POLICY ZILOG S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION. As used herein Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Document Disclaimer 009 by Zilog, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE.The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. Z, Z Encore!, and Z Encore! XP are registered trademarks of Zilog, Inc. All other product or service names are the property of their respective owners. UM00-009