0 7th Iteratoal ICST Coferece o Commucatos ad Networkg Cha (CHINACOM) Load Balacg Algorthm based Vrtual Mache Dyamc Mgrato Scheme for Dataceter Applcato wth Optcal Networks Xyu Zhag, Yogl Zhao, X Su, Ruyg He, Wewe Wag, Je Zhag () School of Iformato ad Commucatos Egeerg, () State Key Laboratory of Iformato Photocs ad Optcal Commucato, Bejg Uversty of Posts ad Telecommucatos, Bejg, 00876, P.R.Cha, suxyu6@63.com Abstract Ths paper proposes a load balacg algorthm based vrtual mache dyamc mgrato scheme for dataceter applcato wth optcal etworks. The combato of the vrtual mache dyamc mgrato scheme ad the load balacg algorthm ca help the vrtual maches mgrato wth a dyamc adjustmet o the bass of the curret data ceter s stuato real-tme. Ad ths way, t ca reach the mmum average load amog data ceter s occupato of servce resource. Besdes, the expermet results show that the tme of mgrato process s very short, ad users servce level agreemet (SLA) ca be met well. Keywords-optcal etworks; dataceter; vrtual mache; dyamc mgrato; load balacg algorthm I. INTRODUCTION Wth the rapd developmet of cloud computg, the dataceters are wdely deployed varous areas. Coected by optcal etworks, the dataceters are always dstrbuted ubalaced [] accordg to the servce requremet of dfferet regos. For the ucotrollable radomess of the requremets from large amout of clets to the servers, more tasks mght focus o a small amout of dataceters, whch would cause part of the etwork servers paralyss []. Upgradg the hardware s processg power s ot a fudametal soluto. What s more, t ca mprove equpmet cost rapdly. Therefore, t s very useful f the servce whch focuses o some dataceters ca be dspatched to some other dle dataceters through mgratg vrtual maches dyamcally [3]. Through these operatos, t wll develop effcet use of data ceters resources, mprove the qualty of users servce, ad prolog the lfe of each physcal host computer. Ths dyamc schedulg strategy s based o a load balace algorthm [4]. Usg load balace algorthm, dyamc dspatchg of vrtual mache s more reasoable. Nowadays, there are may research works o the vrtual maches dyamc mgrato ad load balacg algorthm. Xe [5] vrtual maches developed by Uversty of Cambrdge ca mgrate amog a umber of physcal host computers stead of shuttg dow the vrtual maches. However, the dyamc mgrato of vrtual maches s tated maually, ad oly betwee the same vrtual mache motors [6]. I addto, dyamc mgrato also requres tesve CPU ad etwork badwdth resources. Vrtual mache s servce level agreemet (SLA), the process of trasformato, must suffer great destructo f the process of moble trasformato s cotrolled usuccessfully. Besdes, the research o the load balacg algorthm has bee exteded to varous areas, such as the data ceter of cloud computg, the algorthm of mage processg optmzato ad so o [7]. However, amog the exstg dyamc algorthms, the best stadard of judgg f the ode reaches the best balacg state s stll ot to reach agreemet. The load balacg algorthm based vrtual mache s dyamc mgrato scheme for dataceter applcato wth optcal etworks, ths paper proposes ca satsfy the servce demad of the frot users ad dspatch the resources of dataceter s vrtual maches. It combes load balacg algorthm to dspatch the vrtual mache s resource. After mgrato of vrtual maches, each dataceter s load s balaced so well that the servce o t ca be ru freely. At the same tme, the users from the frot stage ca oly feel ther servce demads are fulflled very well ad have o dea of the operato at the backstage [8]. I addto, the load balacg algorthm ths paper s based o the aalyss for average varace of each ode s load the cluster. Ad the algorthm s amg at makg every ode s load a balaced way. Sce varace s a way to measure the degree of each varable s balace [9], the odes could reach the best state whe the cluster s varace reaches the mmum. The rest of ths paper s orgazed as follows. Secto II troduces a vrtual mache dyamc mgrato scheme for dataceter applcatos wth optcal etworks. It descrbes a whole scheme s archtecture ad work process of ma modules. Secto III proposes a ovel load balacg algorthm. The expermet demostrato ad results aalyss are gve Secto VI. At last, secto V s gog to coclude the etre paper ad propose drectos for future research. II. VIRTUAL MACHINE DYNAMIC MIGRATION SCHEME FOR DATACENTER APPLICATION WITH OPTICAL NETWORKS A. Vrtual Mache Dyamc Mgrato Framework A good resource maagemet ad mgrato scheme s a scheme whch ca meet the frot users real-tme servce eeds ad dspatch the dataceters resources ratoally ad effectvely. Besdes, the frot users are ot aware of all of these operatos. The vrtual mache dyamc mgrato scheme for dataceter applcato wth optcal etworks s a scheme just lke ths. It makes meetg the user s requremets as ts ma goal ad focuses o dataceter s resources maagemet ad dspatch. At the same tme, t combes load balacg algorthm to make the mgrato more ratoal ad effectve. 7 978--4673-699-5//$3.00 0 IEEE
The whole scheme s archtecture of vrtual maches dyamc mgrato s show as Fg.. Some servers are set up o each dataceter, ad may vrtual maches are cotaed by each server. There are dfferet kds of servces from the same ad dfferet users rug o each vrtual mache. Dfferet dataceters are lked by optcal etworks. The vrtual maches usg stuato ca be leared through collectg ther status costatly. Whe there s a dataceter A rug too may servces to ru aymore, a dataceter B that rus lttle servce s chose by ths scheme. The the servce o t s mgrated through dspatchg a vrtual mache from the dataceter A to dataceter B. Whle all these operatos are based o load balacg algorthm. The combato of the vrtual mache dyamc mgrato scheme ad the load balacg algorthm ca help the vrtual mache s mgrato have a dyamc adjustmet o the bass of the curret data ceter s stuato real-tme. Durg the whole process, the vrtual mache eed t to be closed ad the frot user s servces are ot affected. Fg. shows vrtual mache dyamc mgrato framework, t cotas 5 sub modules: Motor the mgrato, Ru the mgrato, Freeze, ad Target actvato. Motor mgrato module: It decdes who should be resposble for startg the mgrato, especally whe ad where to mgrate. To acheve the goal of load balacg, a motorg sgal at the vrtual mache motor must be set up to motor the operato of all dataceters. If t decdes to mgrate the vrtual mache A, Motor mgrato module s ssued to the vrtual mache A eed to mgrate sgal, ad at the same tme to commucate wth other dataceters o the other modules to determe the mgrato feld goal. Fgure. Vrtual Mache Dyamc Mgrato Archtecture B. Ma Modules Fuctos ) Dataceter ad Optcal Networks Module Dataceter, a specfc devce etwork, has a strog capacty of data servce carryg, hgh desty, flexblty ad relablty. Dataceter has already replaced tradtoal server cluster preset applcato. Ad t provdes a flexble ad relable servce. Dfferet dataceters are coected by optcal etwork. Optcal etwork s a etwork structure of fber trasmsso. Network elemet of optcal etwork selects path automatcally, ad establshes the coecto by cotrollg sgals. I the process of vrtual mache mgrato, optcal etwork s so fast ad effcet that t cotrbutes to mgrate the vrtual maches successfully. The combato of optcal etwork ad dataceter makes vrtual mache resources dspatch rapdly from oe dataceter to aother the process of vrtual mache mgrato. Meawhle, the servce from frot users s served pretty well. ) Vrtule Mache Dyamc Mgrato Module Fgure. Vrtual Mache Dyamc Mgrato Module Ru mgrato module: It s resposble for the specfc mplemetato. The operato of the module s the key to the etre mgrato process. It cludes reservato, teratve precopy, stop - copy submtted, ad actvato process. Freeze module: It s used to guaratee the cosstecy of source host A ad the destato host B, whch solves whe the sources host A s to be froze. It s also used to esure cotuty of the orgal system s servce after freezg. Whe the memory s coped to a certa extet, t s eeded to termate the terato. The freeze module s called to freeze the mgrato source host, eter the shutdow copy stage, ad termate all actvtes of the mgrato source host. After dog these, t ca stop the geerato of drty pages order to mata the cosstecy of the source host A ad the destato host B. Target actvato module: It s used to determe whe to actvate the target host, ad whe to create a ew vrtual mache. It s also used to esure the cosstecy of the target host B ad the source host A servce after the actvato. The above modules ad method esures that at least oe host has a cosstet vrtual mache mages durg the dyamc mgrato process. Utl the dyamc mgrato of the trasacto s commtted the orgal host should rema stable, because oce the mgrato has a error, the dyamc mgrato process wll be termated ad the vrtual mache wll be reactvated the orgal host. 7
III. LOAD BALANCING ALGORITHM A. Assumpto ad Descrpto The algorthm s amg at makg every ode s load a balaced way after requested dstrbuto. Sce varace s a way to measure the degree of each varable s balace, the odes could reach the best state whe the cluster s varace reaches the mmum. The average varace of ths paper s to keep the varace a low umber after a amout of tme of dstrbutg the requests. There s a cluster, whch each dataceter s load s A at t_. If the cluster has o algorthm o t, ad at t_, there s a possblty that oe of the dataceters s workg overload. Therefore, the purpose to use the algorthm s to make each dataceter acheve a more balaced state as much as possble. Ad ths paper, average varace load balacg algorthm, based o the aalyss of CPU usage, strves to balace the load after redstrbuto. Overall flow chart s show as Fg. 3: Fgure 3. Flow Chart of the Algorthm B. Load balacg algorthm Before the algorthm llustrato, some ssues should be explaed at frst. The ode of the algorthm s the usage of CPU. The purpose of ths algorthm s to guaratee the varace of each ode reach a low degree. Now, there are dataceters to form a cluster. At the tme t, the total amout of servce requests s G, ad the usage of CPU each dataceter s k ad the capacty of each CPU s c. To facltate the descrpto of the problem, t ca be assumed that all the c equals to c. Ad G s: G = c k = c k = =. () = = After a perod of tme, at the tme t, the ew servce requests, wth amout G a, are comg. I ths case, the total amout of servce requests s G : G = G + G = c k + G At ths tme, the load of CPU: =. ( ) a a = =. ( 3 ) g k c I theory, f the addtoal overhead of system s ot take to accout, the best way to make the varace reach the mmum s to redstrbute all servce requests o average absolutely to each dataceter, because of the same capacty of each CPU. The average umber g s defed as: g G =. ( 4 ) I fact, oly the ew servce requests wll be dstrbuted to each CPU. Ad each dataceter s load s to crease. As a result, t s almost mpossble to reach the absolute load balacg. At ths pot, to make the varace as small as possble, the am of average varace load balacg algorthm s to make each CPU s load, t s defed as g, approaches g as close as possble after the ew comg task requests bee dstrbuted. At ths tme, f the amout of servce requests dstrbuted to Dataceter I s r, the g s: = +. ( 5 ) g g r After dstrbuto, to make sure that each load approaches to the average umber, oly the ew comg requests ca be dstrbuted to the dataceter, whose g s smaller tha g. Ad ths way, the lght load CPU has more work to do whle the amout of work overload CPU s ot chagg. That s to add the ew comg servce requests as r to the dataceter whch ca make the followg equalty hold: = <. ( 6 ) g k c g Assume the umber of dataceters whch hold the equalty (6) s m ad the r s: Amog the equato (8), the δ s: = δ = m r = Ga δ. ( 7 ) = g c k ( g c k ). ( 8 ) The equato (7) s explaed as follows: at tme t, there are m dataceters, whose load s smaller tha g. Ad amog these dataceters, the dfferece betwee Dataceter I ( m) ad g s g c k.so, the overall dfferece = m s ( g c k ) =. Ad δ s the amout of the proporto of the total servce request that the Dataceter should deal wth. 73
I geeral, all c s ot the same. Whe ew servce requests comes, the average load of each dataceter s dfferet,whch depeds o the CPU capacty. g t s defed as: g = G t c = = So, the equato (8) chages to: δ = = m = c g c k t ( g c k ) t. ( 9 ). ( 0 ) Because of the servces radomess, dfferet dataceters servces have dfferet graulartes. The varetes of the servces graulartes wll cotrbute to the dfferet loads of the dataceters. The load balacg algorthm ths case s more meagful. Through ths algorthm, the varace of each dataceter load matas a small value, whch realzes the load balacg. IV. EXPERIMENTAL RESULTS A. Expermetal evromet I ths part, expermet has bee made to test the load balacg algorthm based vrtual mache dyamc mgrato scheme for dataceter applcato wth optcal etworks. Ths expermet focuses o the followg three factors: mgrato based o load balacg, heterogeeous mgrato tme, ad expermet demostrato of user s SLA. B. Mgrato based o load balacg Whe oe dataceter s load s overloaded ad the other dataceter s s dle correspodgly, the mgrato framework ca dscover ths stuato ad sed out the order of vrtual mache s dyamc mgrato automatcally. At the begg of ths expermet, dataceter A ad B ru separate vrtual mache a ad b.vrtual mache a s dle. Vrtual mache b rus FTP servce ad resposes to FTP request from the outsde. Durg ths stage, t s t ecessary to balace the load although there are some dffereces betwee the loads of these two dataceters. At the secod stage of expermet, aother vrtual mache b dataceter B s started ad t rus FTP servce. Ad that causes two vrtual mache compete badwdth, whch makes dataceter B overloaded. The system fds out ths stuato through collectg vrtual mache s states. The t fulflls a mgrato of vrtual mache b automatcally from dataceter B to dataceter A. After the mgrato, dataceter A rus two vrtual maches a ad b.a s dle ad b rus FTP servce. Dataceter B s vrtual mache b rus FTP servce. The two dataceters load gradually becomes balaced. The mgrato stuato of dataceter A ad dataceter B s show table II ad table III. TABLE II. DATACENTER A Stage Vrtual mache Vrtual mache Stage Idle Null Stage Idle Null Stage 3 Idle FTP servce TABLE III. DATACENTER B Fgure 4. System s Testbed I the expermet, two servers whch belog to two dfferet dataceters are employed altogether. The two dataceters are coected by optcal etworks. Vrtual maches states are motored by VMware vceter Server. The system s testbed s show Fg. 4. Cofguratos of the servers are show as table I. Cofgurato CPU Operatg System Memory NIC TABLE I. CONFIGURATIONS Server Itel(R) Xeo(R) E550 @.7GHz System x3650 M-[7947RDI]- 0466.5 MB 000 Full-duplex Stage Vrtual mache Vrtual mache Stage FTP servce Null Stage FTP servce FTP servce stage 3 FTP servce Null C. Heterogeeous Mgrato Tme The expermet maly studes somerzato vrtual mache dyamc mgrato (Xe-KVM, KVM-Xe) dowtme ad total tme competed wth somorphc mgrato. The expermet employs four dfferet testy types of load to study the tme of the mgrato process, cludg dle, kerel-comple, memtest86 ad apache ab. ) Dowtme 74
Fgure 5. Dowtme Fg. 5 descrbes dfferet types of vrtual mache s dowtme durg the dyamc mgrato uder dfferet load codtos. I the expermet, dowtme s related to sourcesde vrtual mache motor, whle t does t have fluece o destato-sde vrtual mache. For example, dyamc mgrato from KVM to Xe vrtual mache s dowtme ad from KVM to KVM s are roughly equal, whle tme from XEN to XEN has a large dscrepacy. Geerally speakg, heterogeeous mgrato dowtme s loger tha somorphc mgrato tme, both of whch are less tha secod. Fg. 5 also descrbes the fact that dyamc mgrato of Xe vrtual mache motor dowtme s loger tha that from KVM to KVM. Ths s maly because Xe takes hudreds of mllsecods to pause the vrtual mache ad wrte vrtual mache s state to a fle durg the dyamc mgrato process. ) Mgrato Total Tme Mgrato of the total tme cludes the tme of memory pre-copy ad dowtme. For memory pre-copy, the Xe vrtual mache motor employs the bulk trasmsso, whle KVM trasmts oe by oe. Dyamc mgrato of vrtual mache framework s desged ths paper, ad a bulk trasfer s also employed. Fg.6 shows heterogeeous mgrato ad costtutve mgrato s roughly equal mgrato tme. Whe pre-copy s modfed to bulk trasfer, the mgrato tme from the KVM to Xe s eve better tha the KVM to KVM somorphc mgrato. Xe to KVM heterogeeous mgrato tme s better tha somorphsm mgrato from Xe to Xe, because mgrato from Xe to KVM requres less terato. Apart from the test program of memtest86, the tme of mgrato from KVM to KVM mgrato s better tha that from Xe to Xe because memtest86 wrtes memory very fast ad eeds more teratos of memory pre-copy. I ths stuato, Xe bulk pre-copy format shows the advatages. I all cases, the frame s mgrato tme ths paper desgs s equal to Xe. Fgure 6. Mgrato Total Tme D. Expermet demestrato of user s SLA A expermetal demostrato has bee employed to llustrate the user s SLA the process of vrtual mache s dyamc mgrato. Fgure 7. Expermetal Demostrato As what has show Fg. 7, a user has appled two vdeos from backgroud servce. At frst two vdeo servces ru separately o two dataceter s vrtual maches. However, these two vdeo servces have the competto o memory ad etwork resources. The scheme of vrtual maches dyamc mgrato based o load balacg algorthm makes a order of the vrtual mache mgrato. After seres of operatos, a vrtual mache rug vdeo servce mgrates to aother dataceter. Whle durg ths process, the frot user ca ot feel the operato acto, whch esures the user s SLA, ad accomplshes the fal goal of the framework desged. V. SUMMARY I ths paper, the vrtual maches dyamc mgrato scheme s proposed. It s based o load balacg algorthm ad faced wth dataceter applcato optcal etworks, whch to some degree solves the problem of resource mass ad hardess of maagemet. The expermet results show that the appearace of ths scheme guarateed the depedece, 75
moblty ad flexblty of vrtual mache coordato uder the load balacg algorthm. Our ext step s the study of resource maagemet strategy coverg the whole base ad the vrtual mache swtchg techology based o may vrtual maches dyamc mgratos. ACKNOWLEDGEMENTS Ths work was supported part by 973 program (00CB3804), NSFC project (6093004), 863 program (0AA030), RFDP Project (0090005003), ad the Fudametal Research Fuds for the Cetral Uverstes (0RC0406). Research ovato fud for college studets of Bejg Uversty of Posts ad Telecommucatos. REFERENCES [] Nu J, Gu H, Wag C. A ew load balaced routg algorthm for Torus etworks. Proceedgs of the st Iteratoal Symposum o Combatorcs, Algorthms, Probablstc ad Expermetal Methodologes (ESCAPE 07), Apr 7 9, 007, Hagzhou, Cha. LNCS 464. Berl, Germay: Sprger-Verlag, 007: 495 503 [] Melv Ver. Dyamc Load Balacg Based O Lve Mgrato Of Vrtual Maches: Securty Threats ad Effects. Thess report Rochester Isttute of Techology, B. Thomas Golsao College of Computg ad Iformato Sceces (GCCIS), Rochester, NY, U.S.A. [3] Robert Bradford, Evagelos Kotsovos, Aja Feldma, et a., Lve wde-area mgrato of vrtual maches cludg Iocalpersstet state, I Proceedgs of the 3rd teratoal coferece o Vrtual executo evromets, pp. 69-79, Sa Dego, CA, 007. [4] Hug T C, Tah N H, Thag N D, et al. Advaced routg algorthms ad load balacg o MPLS. Proceedgs of IEEE 9th Iteratoal Coferece o Advaced Commucato Techology (ICACT 07): Vol3, Feb 4, 007, Phoex Park, Korea. Pscataway, NJ, USA: IEEE, 007: 886 89 [5] J Heo Xaoyu, Zhu, Pradeep Padala, A Arbor, Zhku Wag, Memory Overbookg ad Dyamc Cotrol of Xe Vrtual Maches Cosoldated Evromets, 009. [6] Jo Oberhede, Eva Cooke, Faram Jahaa. Emprcal Explotato of lve mgrato of vrtual maches. Proc of Black Hat DC, March 4, 008. [7] Mart Radles, EasOdat, Davd Lamb, Osama Abu- Rahmeh ad A. Taleb-Bedab, A Comparatve Expermet Dstrbuted Load Balacg, 009 Secod Iteratoal Coferece o Developmets esystems Egeerg. [8] Jo Oberhede, Eva Cooke, Faram Jahaa. Emprcal Explotato of lve mgrato of vrtual maches. Proc of Black Hat DC, March 4, 008. [9] Al M. Alakeel, A Gude to Dyamc Load Balacg Dstrbuted Computer Systems, IJCSNS Iteratoal Joural of Computer Scece ad Network Securty, VOL.0 No.6, Jue 00. 76