BLF178P. 1. Product profile. Power LDMOS transistor. 1.1 General description. 1.2 Features and benefits. 1.3 Applications

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Rev. 2 16 February 2012 Product data sheet 1. Product profile 1.1 General description A 1200 W LDMOS power transistor for broadcast applications and industrial applications in the HF to 110 MHz band. Table 1. Application information Test signal f V DS P L G p D (MHz) (V) (W) (db) (%) CW 108 50 1000 26 75 pulsed RF 108 50 1200 28.5 75 1.2 Features and benefits Typical pulsed performance at frequency of 108 MHz, a supply voltage of 50 V and an I Dq of 40 ma, a t p of 100 s with of 20 %: Output power = 1200 W Power gain = 28.5 db Efficiency = 75 % Easy power control Integrated ESD protection Excellent ruggedness High efficiency Excellent thermal stability Designed for broadband operation (10 MHz to 110 MHz) Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications Industrial, scientific and medical applications FM transmitter applications

2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol 1 drain1 2 drain2 1 2 1 3 gate1 5 4 gate2 3 4 3 5 5 source 4 2 sym117 Connected to flange. 3. Ordering information 4. Limiting values Table 3. Ordering information Type number Package Name Description Version - flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V DS drain-source voltage - 110 V V GS gate-source voltage 0.5 +11 V I D drain current - 88 A T stg storage temperature 65 +150 C T j junction temperature - 225 C All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 2 of 13

5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit R th(j-c) thermal resistance from junction to case T j = 150 C [2] 0.14 K/W Z th(j-c) transient thermal impedance from junction to case T j = 150 C; t p = 100 s; =20% [3] 0.04 K/W T j is the junction temperature. [2] R th(j-c) is measured under RF conditions. [3] See Figure 1. 0.18 001aak924 Z th(j-c) (K/W) (7) 0.12 (6) 0.06 10 3 (5) (3) (4) (2) (1) 0 10 7 10 6 10 5 10 4 10 2 10 1 1 10 t p (s) (1) = 1 % (2) = 2 % (3) = 5 % (4) = 10 % (5) = 20 % (6) = 50 % (7) = 100 % (DC) Fig 1. Transient thermal impedance from junction to case as a function of pulse duration 6. Characteristics Table 6. DC characteristics T j = 25 C; per section unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V (BR)DSS drain-source breakdown V GS =0V; I D = 2.5 ma 110 - - V voltage V GS(th) gate-source threshold voltage V DS =10 V; I D = 500 ma 1.25 1.7 2.25 V V GSq gate-source quiescent voltage V DS =50 V; I D =20mA 0.8 1.3 1.8 V I DSS drain leakage current V GS =0V; V DS = 50 V - - 2.8 A All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 3 of 13

Table 6. DC characteristics continued T j = 25 C; per section unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit I DSX drain cut-off current V GS =V GS(th) +3.75 V; 58 71 - A V DS =10V I GSS gate leakage current V GS =11V; V DS = 0 V - - 280 na R DS(on) drain-source on-state resistance V GS =V GS(th) + 3.75 V; I D =16.66A C rs feedback capacitance V GS =0V; V DS =50V; f= 1MHz C iss input capacitance V GS =0V; V DS =50V; f=1mhz C oss output capacitance V GS =0V; V DS =50V; f=1mhz - 0.07 - - 3 - pf - 403 - pf - 138 - pf Table 7. RF characteristics Test signal: pulsed RF; t p = 100 s; = 20 %; f = 108 MHz; RF performance at V DS =50V; I Dq =40mA; T case = 25 C; unless otherwise specified; in a class-ab production test circuit. Symbol Parameter Conditions Min Typ Max Unit G p power gain P L = 1200 W 27 28.5 31 db RL in input return loss P L = 1200 W - 16 12 db D drain efficiency P L = 1200 W 71 75 - % 900 C oss (pf) 750 001aaj113 600 450 300 150 0 0 10 20 30 40 50 V DS (V) Fig 2. V GS = 0 V; f = 1 MHz. Output capacitance as a function of drain-source voltage; typical values per section 6.1 Ruggedness in class-ab operation The is capable of withstanding a load mismatch corresponding to VSWR = 13 : 1 through all phases under the following conditions: V DS =50V; I Dq =40mA; P L = 1200 W pulsed; f = 108 MHz. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 4 of 13

7. Test information 7.1 Impedance information Table 8. Typical impedance Simulated Z S and Z L test circuit impedances. f Z S Z L MHz 108 3.91 j3.56 3.59 j1.73 drain gate Z L Z S 001aaf059 Fig 3. Definition of transistor impedance 7.2 RF performance The following figures are measured in a class-ab production test circuit. 7.2.1 1-Tone CW pulsed 31 aaa-002242 80 66 aaa-002243 G p (db) 29 G p 60 η D (%) P L (dbm) 64 Ideal P L (2) 27 η D 40 62 (1) P L 25 20 60 23 0 100 300 500 700 900 1100 1300 1500 P L (W) 58 29 31 33 35 P i (dbm) Fig 4. V DS = 50 V; I Dq = 40 ma; f = 108 MHz; t p = 100 s; =20%. Power gain and drain efficiency as function of output power; typical values Fig 5. V DS = 50 V; I Dq = 40 ma; f = 108 MHz; t p = 100 s; =20%. (1) P L(1dB) = 60.8 dbm (1214 W) (2) P L(3dB) = 61.2 dbm (1319 W) Output power as a function of input power; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 5 of 13

32 aaa-002244 80 aaa-002245 G p (db) η D (%) 30 60 (5) (4) 28 26 (5) (4) (3) (2) (1) 40 20 (3) (2) (1) Fig 6. 24 100 300 500 700 900 1100 1300 1500 P L (W) V DS = 50 V; f = 108 MHz; t p = 100 s; =20%. (1) I Dq =0mA (2) I Dq =20mA (3) I Dq =40mA (4) I Dq =80mA (5) I Dq = 160 ma Power gain as a function of output power; typical values Fig 7. 0 100 300 500 700 900 1100 1300 1500 P L (W) V DS = 50 V; f = 108 MHz; t p = 100 s; =20%. (1) I Dq =0mA (2) I Dq =20mA (3) I Dq =40mA (4) I Dq =80mA (5) I Dq = 160 ma Drain efficiency as a function of output power; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 6 of 13

32 G p (db) 30 aaa-002246 η D (%) 90 aaa-002247 (3) (4) (5) (6) (7) (2) (8) (1) 70 28 26 24 (3) (4) (5) (6) (7) (8) 50 30 22 (2) Fig 8. (1) 20 0 200 400 600 800 1000 1200 1400 P L (W) I Dq = 40 ma; f = 108 MHz; t p = 100 s; =20%. (1) V DS =15V (2) V DS =20V (3) V DS =25V (4) V DS =30V (5) V DS =35V (6) V DS =40V (7) V DS =45V (8) V DS =50V Power gain as a function of output power; typical values Fig 9. 10 0 200 400 600 800 1000 1200 1400 P L (W) I Dq = 40 ma; f = 108 MHz; t p = 100 s; =20%. (1) V DS =15V (2) V DS =20V (3) V DS =25V (4) V DS =30V (5) V DS =35V (6) V DS =40V (7) V DS =45V (8) V DS =50V Drain efficiency as a function of output power; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 7 of 13

7.3 Test circuit C5 C10 +Vds T2 R1 +Vgs C7 R3 C12 L5 C14 C20 C1 C2 L1 C3 L2 L3 L4 C4 C16 C18 C17 C19 L7 L8 C21 C22 INTPUT REV1 T1 R2 R4 +Vgs C8 C6 L6 C13 C11 C15 +Vds OUTPUT REV1 23 mm aaa-002248 Fig 10. Printed-Circuit Board (PCB): RF 35; r = 3.5; thickness = 0.76 mm; thickness copper plating = 35 m. See Table 9 for a list of components. Component layout for class-ab production test circuit Table 9. List of components For test circuit see Figure 10. Component Description Value Remarks C1, C2, C5, C6, C14, multilayer ceramic chip capacitor 1 nf C15, C21, C22 C3 multilayer ceramic chip capacitor 82 pf C4 multilayer ceramic chip capacitor 240 pf C7, C8 multilayer ceramic chip capacitor 4.7 F; 50 V C10, C11 electrolytic capacitor 1000 F; 63 V C12, C13 multilayer ceramic chip capacitor 4.7 F; 100 V C16, C17 multilayer ceramic chip capacitor 120 pf C18 multilayer ceramic chip capacitor 82 pf C19 multilayer ceramic chip capacitor 110 pf C20 multilayer ceramic chip capacitor 56 pf L1, L2, L3, L4 1.5 turn 0.8 mm copper wire D = 3 mm; length=2mm L5, L6 5 turn 0.8 mm copper wire D = 3 mm; length = 4.5 mm L7, L8 2.5 turn 0.8 mm copper wire D = 3 mm; length=3mm R1, R2 SMD resistor 100 Philips 1206 R3, R4 SMD resistor 9.1 Philips 1206 T1 semi rigid coax 25 ; 160 mm UT-090C-25 T2 semi rigid coax 25 ; 160 mm UT-141C-25 American Technical Ceramics type 800B or capacitor of same quality. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 8 of 13

8. Package outline Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A D A F D 1 U 1 B q C H 1 w 2 M C M c 1 2 H U 2 p E 1 E 5 w 1 M A M B M A L 3 4 e b w 3 M Q 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c D D 1 e E E 1 F H H 1 L p Q q U 1 U 2 w 1 w 2 w 3 mm inches 4.7 4.2 0.185 0.165 OUTLINE VERSION SOT539A 11.81 11.56 0.18 0.10 0.465 0.007 0.455 0.004 31.55 30.94 1.242 1.218 31.52 30.96 13.72 9.50 9.30 9.53 9.27 1.241 1.219 0.540 0.374 0.375 0.366 0.365 1.75 1.50 0.069 0.059 REFERENCES 17.12 16.10 0.674 0.634 IEC JEDEC EIAJ 25.53 25.27 1.005 0.995 Note 1. millimeter dimensions are derived from the original inch dimensions. 2. recommended screw pitch dimension of 1.52 inch (38.6 mm) based on M3 screw. 3.48 2.97 0.137 0.117 3.30 3.05 2.26 2.01 0.130 0.089 0.120 0.079 35.56 1.400 41.28 41.02 1.625 1.615 10.29 10.03 0.405 0.395 EUROPEAN PROJECTION 0.25 0.51 ISSUE DATE 00-03-03 10-02-02 0.25 0.010 0.020 0.010 Fig 11. Package outline SOT539A All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 9 of 13

9. Handling information CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 10. Abbreviations Table 10. Acronym CW DC ESD FM HF LDMOS LDMOST RF SMD VSWR Abbreviations Description Continuous Wave Direct Current ElectroStatic Discharge Frequency Modulation High Frequency Laterally Diffused Metal-Oxide Semiconductor Laterally Diffused Metal-Oxide Semiconductor Transistor Radio Frequency Surface Mounted Device Voltage Standing-Wave Ratio 11. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes v.2 20120216 Product data sheet - v.1 Modifications The status of this document has been changed to Product data sheet. Table 1 on page 1: Mode of operation has been changed to Test signal. Table 1 on page 1: The value for G p has been changed. Section 1.2 on page 1: Some values have been changed Table 6 on page 3: The value for I DSX has been changed Table 7 on page 4: Mode of operation has been changed to Test signal. Table 7 on page 4: Several values have been changed. Section 7 on page 5: Section has been added. Removed section Reliability. Section 9 on page 10: Section has been added. v.1 20110405 Objective data sheet - - All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 10 of 13

12. Legal information 12.1 Data sheet status Document status [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 11 of 13

Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 16 February 2012 12 of 13

14. Contents 1 Product profile.......................... 1 1.1 General description..................... 1 1.2 Features and benefits.................... 1 1.3 Applications........................... 1 2 Pinning information...................... 2 3 Ordering information..................... 2 4 Limiting values.......................... 2 5 Thermal characteristics.................. 3 6 Characteristics.......................... 3 6.1 Ruggedness in class-ab operation......... 4 7 Test information......................... 5 7.1 Impedance information................... 5 7.2 RF performance........................ 5 7.2.1 1-Tone CW pulsed...................... 5 7.3 Test circuit............................. 8 8 Package outline......................... 9 9 Handling information.................... 10 10 Abbreviations.......................... 10 11 Revision history........................ 10 12 Legal information....................... 11 12.1 Data sheet status...................... 11 12.2 Definitions............................ 11 12.3 Disclaimers........................... 11 12.4 Trademarks........................... 12 13 Contact information..................... 12 14 Contents.............................. 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 February 2012 Document identifier: