March 17, 2006 Micron MT9D111 2 Megapixel CMOS Image Sensor Functional Analysis For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks. 3685 Richmond Road, Suite 500, Ottawa, ON K2H 5B7, Canada Tel: 613.829.0414 Fax: 613.829.0515 www.chipworks.com
Functional Analysis Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Company Profile 1.4 Introduction 1.5 Device Summary 1.6 Process Summary 2 Package and Die Analysis 2.1 Package 3 Process Analysis 3.1 Device Structure 3.2 Critical Dimensions 4 Functional Block Analysis 4.1 Major Functional Blocks 4.2 Functional Block Measurements 5 Memory Analysis 5.1 Annotated Die Photograph - Memory 5.2 Memory Measurements 5.3 SEM Topographical Images 6 Analog Reference Block Analysis 6.1 Analog Reference Blocks 6.2 Analog Reference Blocks Measurements 6.3 Optical Topographical Images of Analog Reference Blocks
Functional Analysis 7 Pixel Array Analysis 7.1 Pixel Array Blocks 7.2 Pixel Array Block Measurements 7.3 SEM Topographical Images 8 Standard Cell Analysis 8.1 Standard Cells 9 References Report Evaluation
Overview 1-1 1 Overview 1.1 List of Figures 2 Package and Die Analysis 2.1.1 Micron MIS0C2010 ICSP Test Assembly 2.1.2 Micron MIS0C2010 ICSP Test Assembly Lens Removed 2.1.3 Micron MIS0C2010 ICSP Test Assembly CIS Revealed 2.1.4 Micron MIS0C2010 ICSP Test Assembly CIS Detail 2.1.5 Top Package Photograph 2.1.6 Bottom Package Photograph 2.1.7 Package X-Ray 2.1.8 Die Photograph 2.1.9 Annotated Die Photograph 2.1.10 Die Markings 2.1.11 Die Corner 2.1.12 Bond Pads 2.1.13 Pixel Array Corner 3 Process Analysis 3.1.1 General Structure in Pixel Array 3.1.2 General Structure in Periphery 3.1.3 Minimum Pitch Metal 1 3.1.4 Minimum Gate Length NMOS Transistors 4 Functional Block Analysis 4.1.1 Major Functional Blocks 5 Memory Analysis 5.1.1 Annotated Metal 1 Die Photograph Memory 5.3.1 SRAM Cells Polysilicon 5.3.2 SRAM Cells Metal 1 5.3.3 ROM Cells Polysilicon 5.3.4 ROM Cells Metal 1 5.3.5 FIFO Cells Polysilicon 5.3.6 FIFO Cells Metal 1
Overview 1-2 6 Analog Reference Block Analysis 6.1.1 Analog Reference Blocks 6.3.1 Analog-to-Digital Converter Metal 1 6.3.2 Analog Reference Block 1 Metal 1 6.3.3 Analog Reference Block 2 Metal 1 6.3.4 Analog Reference Block 3 Metal 1 6.3.5 Analog Reference Block 4 Metal 1 6.3.6 Analog Reference Block 5 Metal 1 6.3.7 Analog Reference Block 6 Metal 1 6.3.8 Analog Reference Block 7 Metal 1 7 Pixel Array Analysis 7.1.1 Pixel Array Functional Blocks 7.3.1 Pixel Cells Polysilicon 7.3.2 Pixel Cells Metal 1 8 Standard Cell Analysis 8.1.1 Standard Cell Functional Blocks 8.1.2 NAND Cellerence Block 7 Metal 1
Overview 1-3 1.2 List of Tables 1 Overview 1.3.1 Device Summary 1.4.1 Summary of Process Findings 3 Process Analysis 3.2.1 Observed Critical Dimensions 4 Functional Block Analysis 4.2.1 Functional Block Measurements 5 Memory Analysis 5.2.1 Memory Measurements 6 Analog Reference Block Analysis 6.2.1 Analog Block Measurements 7 Pixel Array Analysis 7.2.1 Pixel Array Block Measurements
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