30 V, single N-channel Trench MOSFET



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SOT883B Rev. 1 11 May 212 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode Field-Effect Transistor (FET) in a leadless ultra small DFN16B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 1.2 Features and benefits Fast switching Trench MOSFET technology Low threshold voltage Ultra thin package profile with.37 mm height 1.3 Applications Relay driver High-speed line driver Low-side loadswitch Switching circuits 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V DS drain-source voltage T j = 25 C - - 3 V V GS gate-source voltage -8-8 V I D drain current V GS =4.5V; T amb =25 C [1] - - 9 ma Static characteristics R DSon drain-source on-state resistance V GS =4.5V; I D = 2 ma; T j = 25 C - 42 49 mω [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm 2.

2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 G gate 2 S source 3 D drain 1 2 Transparent top view SOT883B (DFN16B-3) 3 G D S 17aaa253 3. Ordering information Table 3. Ordering information Type number Package Name Description Version DFN16B-3 Leadless ultra small plastic package; 3 solder lands; body 1. x.6 x.37 mm SOT883B 4. Marking Table 4. Marking codes Type number Marking code 11 PIN 1 INDICATION READING DIRECTION READING EXAMPLE: 111 111 READING DIRECTION MARKING CODE (EXAMPLE) 6aac673 Fig 1. DFN16B-3 (SOT883B) binary marking code description All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 2 of 15

5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 6134). Symbol Parameter Conditions Min Max Unit V DS drain-source voltage T j =25 C - 3 V V GS gate-source voltage -8 8 V I D drain current V GS =4.5V; T amb =25 C [1] - 9 ma V GS =4.5V; T amb =1 C [1] - 57 ma I DM peak drain current T amb = 25 C; single pulse; t p 1 µs - 3.6 A P tot total power dissipation T amb =25 C [2] - 36 mw [1] - 715 mw T sp = 25 C - 27 mw T j junction temperature -55 15 C T amb ambient temperature -55 15 C T stg storage temperature -65 15 C Source-drain diode I S source current T amb =25 C [1] - 67 ma [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm 2. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 12 1aao121 12 1aao122 P der (%) I der (%) 8 8 4 4-75 -25 25 75 125 175 T j ( C) -75-25 25 75 125 175 T j ( C) Fig 2. Normalized total power dissipation as a function of junction temperature Fig 3. Normalized continuous drain current as a function of junction temperature All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 3 of 15

1 aaa-221 I D (A) 1 (1) 1-1 (2) (3) (4) (5) Fig 4. 1-2 1-1 1 1 1 2 V DS (V) I DM is single pulse (1) t p = 1 ms (2) DC; T sp = 25 C (3) t p = 1 ms (4) t p = 1 ms (5) DC; T amb = 25 C; drain mounting pad 1 cm 2 Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source voltage 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-a) thermal resistance in free air [1] - 35 36 K/W from junction to [2] ambient - 15 175 K/W R th(j-sp) thermal resistance from junction to solder point - - 4 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm 2. All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 4 of 15

1 3 17aaa19 Z th(j-a) (K/W) 1 2 duty cycle = 1.75.5.33.25.2.1.5.2.1 1 1 3 1 2 1 1 1 1 1 2 1 3 t p (s) FR4 PCB, standard footprint Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 1 3 17aaa11 Z th(j-a) (K/W) duty cycle = 1 1 2.75.5.33.25.2.1.5.2.1 1 1 3 1 2 1 1 1 1 1 2 1 3 t p (s) FR4 PCB, mounting pad for drain 1 cm 2 Fig 6. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 5 of 15

7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V (BR)DSS drain-source I D =1µA; V GS =V; T j = 25 C 3 - - V breakdown voltage V GSth gate-source threshold I D =25µA; V DS =V GS ; T j = 25 C.45.7.95 V voltage I DSS drain leakage current V DS =3V; V GS =V; T j = 25 C - - 1 µa V DS =3V; V GS =V; T j = 15 C - - 1 µa I GSS gate leakage current V GS =8V; V DS =V; T j = 25 C - -.1 µa V GS =-8V; V DS =V; T j = 25 C - -.1 µa R DSon drain-source on-state V GS =4.5V; I D = 2 ma; T j = 25 C - 42 49 mω resistance V GS =4.5V; I D = 2 ma; T j = 15 C - 714 833 mω V GS =2.5V; I D = 1 ma; T j = 25 C - 49 59 mω V GS =1.8V; I D =75mA; T j = 25 C - 58 76 mω g fs forward V DS =5V; I D = 2 ma; T j =25 C - 2 - S transconductance Dynamic characteristics Q G(tot) total gate charge V DS =15V; I D =.9 A; V GS =4.5V; -.75.98 nc Q GS gate-source charge T j =25 C -.5 - nc Q GD gate-drain charge -.16 - nc C iss input capacitance V DS =25V; f=1mhz; V GS =V; - 43 65 pf C oss output capacitance T j =25 C - 7.7 - pf C rss reverse transfer - 4.8 - pf capacitance t d(on) turn-on delay time V DS =15V; R L =15Ω; V GS =1V; - 4 8 ns t r rise time R G(ext) =6Ω; T j =25 C - 7.5 - ns t d(off) turn-off delay time - 18 36 ns t f fall time - 4.5 - ns Source-drain diode V SD source-drain voltage I S =3mA; V GS =V; T j = 25 C -.76 1.2 V All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 6 of 15

I D (A) 2.5 2. aaa-2122 (1) (2) (3) (4) 1 3 I D (A) 3am43 1.5 (5) 1 4 min typ max 1. (6) 1 5.5 Fig 7..5 1. 1.5 2. V DS (V) T j = 25 C (1) V GS = 4.5 V (2) V GS = 3. V (3) V GS = 2.5 V (4) V GS = 1.8 V (5) V GS = 1.5 V Output characteristics: drain current as a function of drain-source voltage; typical values Fig 8. 1 6.4.8 1.2 V GS (V) Subthreshold drain current as a function of gate-source voltage 1. R DSon (Ω).8 aaa-2123 (1) (2) (3) 3. R DSon (Ω) 2.5 aaa-2124.6 (4) 2. (5) 1.5.4.2 1..5 (1) (2) Fig 9..5 1. 1.5 2. 2.5 I D (A) T j = 25 C (1) V GS = 1.8 V (2) V GS = 2. V (3) V GS = 2.5 V (4) V GS = 3. V (5) V GS = 4.5 V Drain-source on-state resistance as a function of drain current; typical values 1 2 3 4 5 V GS (V) I D = 8 ma (1) T j = 15 C (2) T j = 25 C Fig 1. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 7 of 15

2. aaa-2125 1.8 3al I D (A) 1.5 (1) (2) a 1.2 1..6.5 (2) (1) 1 2 3 4 V GS (V) V DS > I D R DSon (1) T j = 25 C (2) T j = 15 C Fig 11. Transfer characteristics: drain current as a function of gate-source voltage; typical values 6 6 12 18 T j ( C) Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature 1.2 3aj65 1 2 3an98 V GS(th) (V).9 max C (pf) C iss.6 typ 1.3 min C oss C rss 6 6 12 18 T j ( C) 1 1-1 1 1 V DS (V) 1 2 I D =.25 ma; V DS = V GS Fig 13. Gate-source threshold voltage as a function of junction temperature Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 8 of 15

V GS (V) 5 4 aaa-2126 V DS I D 3 V GS(pl) V GS(th) 2 V GS Q GS1 Q GS2 1 Q GS Q G(tot) Q GD.2.4.6.8 1. Q G (nc) I D = 9 ma; V DS = 15 V; T amb = 25 C Fig 15. Gate-source voltage as a function of gate charge; typical values Fig 16. Gate charge waveform definitions 3aaa58 1. aaa-2127 I S (A).8.6 (1) (2).4.2.2.4.6.8 1. V SD (V) V GS = V (1) T j = 15 C (2) T j = 25 C Fig 17. Source current as a function of source-drain voltage; typical values All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 9 of 15

8. Test information P t 1 t 2 duty cycle δ = t 1 t 2 t 6aaa812 Fig 18. Duty cycle definition 9. Package outline 1.65.55.35 2.2.12.4.34.4 max.3.22 1.5.95.65 3.55.47 Dimensions in mm.3.22 11-11-2 Fig 19. Package outline SOT883B (DFN16B-3) All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 1 of 15

1. Soldering Footprint information for reflow soldering SOT883B 1.3.7 R.5 (8x).9.6.7.25 (2x).3 (2x).4 (2x).3.4 solder land solder land plus solder paste solder paste deposit occupied area solder resist Dimensions in mm sot883b_fr Fig 2. Reflow soldering footprint for SOT883B (DFN16B-3) All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 11 of 15

11. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes v.1 212511 Product data sheet - - All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 12 of 15

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Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 6134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. NXP B.V. 212. All rights reserved. Product data sheet Rev. 1 11 May 212 13 of 15

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14. Contents 1 Product profile...........................1 1.1 General description......................1 1.2 Features and benefits.....................1 1.3 Applications............................1 1.4 Quick reference data.....................1 2 Pinning information.......................2 3 Ordering information......................2 4 Marking.................................2 5 Limiting values...........................3 6 Thermal characteristics...................4 7 Characteristics...........................6 8 Test information.........................1 9 Package outline.........................1 1 Soldering.............................. 11 11 Revision history.........................12 12 Legal information........................13 12.1 Data sheet status.......................13 12.2 Definitions.............................13 12.3 Disclaimers............................13 12.4 Trademarks............................14 13 Contact information......................14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 212. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 11 May 212 Document identifier: