WizFi630 Hardware Design Guide

Table of Contents. Overview.... WizFi0-EVB Package Block Diagram.... Signal List.... WizFi0 Pin-out.... WizFi0 Pin Description.... Electrical Specification.... Absolute Maximum Ratings.... Operating Conditions.... DC Electrical Characteristics..... Power Consumption..... DC characteristics for GPIO pins with ma driving capability..... DC charactereistics for GPIO pins with ma driving capability.... AC Electrical Characteristics... 0.. Power On Sequence... 0. RF Specifications... 0. WizFi0-EVB Schematic.... WizFi0 Module Mechanical... Copyright 0 WIZnet Co., Ltd. All rights reserved.

. Overview This document describes hardware specification of WizFi0.. WizFi0-EVB Package Block Diagram The following is a simplified block diagram of the WizFi0-EVB. <Figure > Block-diagram of the WizFi0-EVB Copyright 0 WIZnet Co., Ltd. All rights reserved.

. Signal List. WizFi0 Pin-out The WizFi0 Pin-out is shown in Figure. <Figure > WizFi0 Module Top-Side <Figure > WizFi0 Module Bottom-Side <Figure > WizFi0-EVB Mini-PCIe Connector PCB Footprit Copyright 0 WIZnet Co., Ltd. All rights reserved.

. WizFi0 Pin Description Pin Number. Drive (ma) I/O / IPU / IPD Name Description P Ground P.V.V supply P Ground P.V.V supply I/O, IPD CTS_N UART CTS-N I/O, IPD RTS_N UART RTS-N I/O, IPD RIN UART RIN I/O, IPD DTR_N UART DTR-N I/O, IPD RxD UART RXD 0 I/O, IPD TxD UART TXD I/O, IPD DSR_N UART DSR-N I/O, IPD DCD_N UART DCD-N O WLAN_ Wireless Init On/ Active Data:blinking NC No connection I/O VBUS USB OTG VBUS pin;connect VBUS pin of the USB NC No connection I/O PADP USB OTG data pin Data+ I/O, IPD UART_RX UART RxD Copyright 0 WIZnet Co., Ltd. All rights reserved.

I/O PADM USB OTG data pin Data- 0 I/O, IPD UART_TX UART TxD O TXOP0 0/00 PHY Port #0 TXP I RXIM0 0/00 PHY Port #0 RXN O TXOM0 0/00 PHY Port #0 TXN I RXIP0 0/00 PHY Port #0 RXP I RXIM 0/00 PHY Port # RXN O TXOP 0/00 PHY Port # TXP I RXIP 0/00 PHY Port # RXP O TXOM 0/00 PHY Port # TXN I RXIP 0/00 PHY Port # RXP 0 O TXOM 0/00 PHY Port # TXN I RXIM 0/00 PHY Port # RXN O TXOP 0/00 PHY Port # TXP O LINK 0 LAN port 0 Link O LINK LAN port Link O LINK LAN port Link I/O, IPD GPIO0 WPS Button Push I, IPU CPURST_N Power on reset I/O, IPD EJT_TDO Reset Button Push(GPIO) I/O, IPD EJT_TRSTN UART Tx/Rx Copyright 0 WIZnet Co., Ltd. All rights reserved.

0 I/O, IPD EJT_TMS Serial Command Mode #(GPIO) I/O, IPD EJT_TDI UART Tx/Rx I/O, IPD EJT_TCK WPS (GPIO0) NC No connection NC No connection NC No connection NC No connection I/O, IPD IC_SCLK Serial Command Mode #(GPIO) I/O, IPD IC_SD RUN (GPIO) P Ground 0 P.V.V supply P Ground P.V.V supply Note:. IPD means internal pull-down; IPU means internal pull-up; P means power. Copyright 0 WIZnet Co., Ltd. All rights reserved.

. Electrical Specification. Absolute Maximum Ratings Supply Voltage.V Vcc to Vcc Decouple -0. to +0.V Input, Output or I/O Voltage -0.V to Vcc+0.V. Operating Conditions Operational Ambient Range -0 to 0 Supply Voltage.V +/-0%. DC Electrical Characteristics.. Power Consumption Parameters Conditions Min Type Max Unit.V Current Consumption @WizFi0 ma.. DC characteristics for GPIO pins with ma driving capability Symbol Min Normal Max Unit VIH.0. V VIL -0. 0. V VOH. V VOL 0. V IOH 0.0.. ma IOL. 0.. ma.. DC charactereistics for GPIO pins with ma driving capability Symbol Min Normal Max Unit VIH.0. V VIL -0. 0. V VOH. V VOL 0. V Copyright 0 WIZnet Co., Ltd. All rights reserved.

IOH.0.. ma IOL... ma. AC Electrical Characteristics.. Power On Sequence.V CPURST_N t_io_cpurst_n <Figure > Power On Sequence Symbol Description Min Max Unit Time between.v power on to 0 - ms t_io_cpurst_n CPURST_N de-assertion. RF Specifications Type Description Wireless Standard IEEE0.b/g/n Frequency Range USA:.00 ~.GHz Europe:.00 ~.GHz Japan:.00 ~.GHz China:.00 ~.GHz Operating Channels USA/Canada: ( ~ ) Major Europe Countries: ( ~ ) France: (0 ~ ) Japan: for 0.b( ~ ), for 0.g( ~ ) Copyright 0 WIZnet Co., Ltd. All rights reserved. 0

Output Power(Tolerance +/-dbm) Receive Sensitivity Data Rates Modulation Type Antenna Korea/China: ( ~ ) 0.b: dbm@mbps 0.g: dbm@mbps 0.n: dbm@0mbps/mbps 0.b: -dbm@mbps 0.g: -dbm@mbps 0.n(0MHz): -dbm@0mbps 0.n(0MHz): -0dBm@Mbps 0.b:,,.,Mbps 0.g:,,,,,,,Mbps 0.n(0MHz):,.,.,.,.,.,,Mbps 0.n(0MHz):.,.,,0,,0Mbps g: OFDM(QAM, QAM, QPSK, BPSK) b: DSS(CCK, DQPSK, DBPSK) u.fl (EVB : TR dbi) Copyright 0 WIZnet Co., Ltd. All rights reserved.

. WizFi0-EVB Schematic Date: Tuesday, June, 0 Sheet of Size Document Number Rev A WizFi0-EVB V. EJTAG-TRSTN R 0R UART WizFi0-EVB D Title.nF EJTAG-TDI R 0R UART.nF 0.uF L D0 C C nf / KV WAN/LAN0 GPIO C0 C RB-0BAGA EJTAG-TCK R 0R WPS D R.R C 0pF CH_ CH_ R0.R 0 LINK0 R 0R WAN Port D C 0pF C 0pF LINK R 0R LINK LAN Port LAN Port R.R R.R C 0pF D R 0R D WLAN_ R 0R Wireless ACT D GPIO IC_SD R 0R System(RUN) D L MMZ00D0C TXOP0 TXOM0 TXOP_LAN0 TXOM_LAN0 MMZ00D0C L L RXIP0 RXIM0 MMZ00D0C RXIP_LAN0 RXIM_LAN0 MMZ00D0C L R 0R R0 0R C+ C- TIN ROUT ROUT TIN C+ C- TD+ TD- TCT NC NC RCT RD+ RD- D Power P.nF.nF 0.uF L CTAB C C C nf / KV WAN PART C LAN INDICATOR PART.VD RB-0BAGA 0 CH_ CH_ R.R C0 0pF R.R C 0pF R.R R.R C 0pF C 0pF C 0.uF RXIP RXIM SW TACT-SPST-ST MOUNT-HOLE MOUNT-HOLE MOUNT-HOLE MOUNT-HOLE EJTAG-TDO R 0K C.uF CPURST_N L MMZ00D0C TXOP_LAN TXOM_LAN L0 MMZ00D0C L MMZ00D0C RXIP_LAN RXIM_LAN L MMZ00D0C GPIO /RESET SW TXOP TXOM R.K P CTAB.VD.VD C 0.uF RESET PART SW TACT-SPST-ST MH MH MH MH.nF.nF 0.uF L GPIO0 C C C nf / KV C LAN GPIO 0/WPS SW RB-0BAGA 0 CH_ CH_ C 0pF C 0pF R0.R R.R R.K C 0pF R.R R.R C0 0pF MINI-PCIe-MH.VD PADP UART_RX PADM UART_RX PADP UART_TX TXOP0 UART_TX 0 PADM RXIM0 TXOM0 TXOP0 RXIM0 RXIP0 RXIM TXOM0 RXIP0 TXOP RXIP TXOM MODE SELECT PART RXIM TXOP RXIP RXIP TXOM 0 TXOM RXIM RXIP TXOM TXOP LINK0 RXIM TXOP LINK.VD LINK LINK 0 LINK GPIO0 CPURST_N LINK GPIO_0 EJTAG-TDO EJTAG-TRSTN EJT_TDO CPURST_N 0 EJTAG-TMS EJTAG-TDI EJT_TMS EJTAG-TCK LAN PART EJT_TRSTN.V_AVCC_ETH EJT_TDI EJT_TCK NC R R NC CTAB IC_SCLK NC NC L L IC_SD IC_SD.K.K IC_SCLK 0 MMZ00D0C MPZ0S.V TXOP TXOP_LAN.V TXOM TXOM_LAN TOP BOT GPIO IC_SCLK L J EJTAG-TMS MMZ00D0C GPIO L MMZ00D0C SW RXIP RXIP_LAN KSD0H RXIM RXIM_LAN PI,.MM L MMZ00D0C ON P CONN_x WLAN_ VBUS CTS_N RIN RXD DSR_N WLAN_ VBUS NC NC C pf MAXEAI C0 pf C pf C pf C pf C pf C pf C pf 0 CTS RIN RXD DSR TXD 0 DCD_N RTS DTR TXD DCD 0.V.V RTS_N DTR_N nf / KV /SHUTDOWN /ONLINE /STATUS R 0K R NC(0K) S_DCD S_TD S_RTS S_RI S_RD S_DTR S_DSR S_CTS R M C USB-0 J J J PCIe_MiniCard_Slot.VD 00K.K R RXD CTS DSR DCD RIN R 0R R0 0R R 0R R_IN R_IN R_IN R_IN R_IN 0uF C R AAT0B DCD 0uF 0 T_IN T_IN T_IN /R_OUT R_OUT R_OUT R_OUT R_OUT R_OUT MAIN CONNECTOR PART S_RD S_CTS S_DSR S_DCD S_RI D+ D- +V.VD DSUB (MALE) T_OUT T_OUT T_OUT 0 SET S_TD S_RTS S_DTR C ON# TXD RTS DTR R 0R UD- UD+ C+ C- C+ C- V- OUT IN MPZ0S U VCC V+ Vout = 0. * ( + R/R) R.K U NC R K R L S_DCD S_DSR S_TD S_CTS S_RD S_RTS S_DTR S_RI 0 S V C 0.uF C 0.uF C 0.uF C 0.uF C 0.uF P SW_FB_V 0.uF C uf/v V VBUS AX0 0.uF R.K C R.K R 00K VCC Ocset EN FB D B0A C uf/v C.VD SW SW VSS VSS uh UART FULL FUNCTION PART USB PART R0 NC R NC L U L R NC(M) VDD_IN Vout = V V R 0R PADM PADP R 0R MAX DSUB (MALE) C NC(0.uF) READY /INVALID FORCEON 0 /FORCEOFF R NC(0K) R 0K 0 S C NC(nF / KV) Vout = 0. * ( + R/R) R.K C 0.uF R M UART_TX UART_RX RXD TXD C 0.uF SW_FB_V R 0R R 0R R NC(0R) 0 R0 NC(0R) R 0R SOUT R 0R SIN R NC(0R) S_RD R NC(0R) S_TD C 0.uF.VD SIN SOUT C uf/v 0.uF C0 P C0 nf / KV S AX0 0uF/V 0.uF R.K DC JACK + C C R.K R 00K VCC Ocset EN FB D B0A C uf/v 0uF 0uF UD- UD+ TD+ TD- TCT NC NC RCT RD+ RD- TD+ TD- TCT NC NC RCT RD+ RD- VCC V+ TOUT RIN RIN TOUT V- C C C 0.uF SW SW VSS VSS U CONN_x IN OUT uh C 0.uF C 0.uF 0.VD 0 U L.VD.V_AVCC_ETH J VDD_IN Vout =.V.VD U AME0.V UART PART.VD SOUT SIN POWER PART V DC J <Figure > WizFi0-EVB Schematic Copyright 0 WIZnet Co., Ltd. All rights reserved.