Composants actifs ultra rapides pour les composants et interconnexions optiques intégrées

Composants actifs ultra rapides pour les composants et interconnexions optiques intégrées Jean-Marc Fedeli CEA,LETI, MinatecCampus, 17 rue des Martyrs, F-38054 GRENOBLE cedex 9, France Contact: jean-marc.fedeli@cea.fr

Optical communication everywhere? Source: IBM Optical comunication Electrical comunication Optical technology InP InP VCSEL Si VCSEL Si (Si) (Si) (Si) Globally a cost and an energy/bit issue 2

Whatissiliconphotonicscommunication? Silicon optical waveguides to BOX 8 to RIB STRIPE Losses in db/cm 3

SiliconFOG Transparent in 1.2µm to 1.6µm High index contrast= miniaturisation CMOS compatible Lowcost No photodetectionin 1.2µm to 1.6µm High index contrast= couplingwithfiberdifficult No electro-opticeffect Indirect band gap = No efficient light emission Lowradiative recombinationprobability 4

Photonic -Electronic Integration Telecom: Increase the performance of photonics with embedded electronic InP-on-Si integrated laser Ge-on-Si integrated photodetector Optical waveguide Silicon optical modulator ONoC Optical Network On Chip Input/output coupler HPC: Increase the data transmission speed between cores with photonics 5

Monocristalline rib silicon waveguide on SOI SiO2 Si SiO2 Substrat loss 0.1 db/cm for cladded 900nm x 380nm with 70nm etching Modulators, Photodetectors (efficiency) 6

Monocristalline silicon stripe waveguides SiO2 Si SiO2 Substrat loss 2 db/cm for cladded 500nm x 220nm waveguide AWG, Filters, PCristals, Resonators,slot wg (miniaturization) 7

Passive components with a:si-h waveguides PECVD deposition with Hydrogen on SiO2 withsih4 chemistryatlowtemperatureprocess< 400 C Thermal stability = 350 C N= 3.5 @1.55µm Material Losses < 1 db@ 1.55 µm ((prism coupling technique on full wafer) Drawbacks: No implantation, no epitaxy, no thermal treatment Characterization of basic devices for an optical link Strip Waveguide (200 nm x 450 nm) : 4 db/cm at 1550 nm 90 bend : lower than 0.08 db for r > 5 µm MMI (2 µm x 3.6 µm) : 1.5 db, Dl = 225 nm Extra losses of 1 to 16 points links (15 MMI, 30 bends, 1cm waveguide) a-si:h:30 db versus SOI : 21.5 db 8

Passive silicon circuitry Waveguides Transitions Splitters MMI Resonators AWG onoc Slow wave structure etc. 9

Optical Modulation 10

Physical parameters of Silicon for modulation Refractive index changes via an applied electric field crystal symmetry no Pockels effect very weak Franz-Keldysh and Kerr effects thermo-optic effect ( n 2.10-4 K -1 ) too slow free carrier induced dispersion n 22 18 = 8.8 10 N 8.5 10 P 0.8 (λ = 1.55 µm) Physical mechanism Carrier injection Carrier accumulation Carrier depletion Electrical structure Si pin diode Si MOS structure Si MOS structure Speed Moderate Fast (6GHz) fast Drawbacks power consumption thin charge layers limited by inversion 11

Carrier depletion: from PN to PIPINdiodes Good Modulation efficiency Medium Insertion loss High Speed Medium Modulation efficiency Low Insertion loss High Speed Good Modulation efficiency Low Insertion loss High Speed 12 12

Thick PIPIN Si modulator 0,9 8X10-4 2.0x10-4 1.5-1 -2-3 -4-5 0 V 0,7 0,5 2 Refractive index variation 2,5 x (µm) 3 4 0 n eff 1.0 0.5 0.0 0 1 Effective index variation 2 3 Voltage (V) 4 5 p-doped slit in the rib Large modulation efficiency Low optical loss (the rib is not entirely doped) Reduced capacitance (~ 0.2-0.3 ff/µm) Reduction of RC time constants Reduction of electrical power 13

Thick PIPIN Si experimental results DC/AC experimental results : Insertion loss = 5 db Contrast ratio up to 14 db TE polarization V π L π = 5 V.cm Modulation Bandwidth 15 GHz 10G operation with 8 db ER Electrode design: W (µm) Design 1 5 25 Design 2 40 20 G (µm) 14

Carrier depletion modulators P + 660 nm 100 nm 400 nm N + oxide Lateral PN Lateral PN Vertical PN Gardes &al, GFP2010 15

Modulation results Specifications modulators UNIS+LETI (Thin modulator) IEF+LETI (Thick modulator) Lightwire UNIS+ LETI INTEL UNIS+LETI UCSB Modulation scheme : Carrier Depletion in lateral pn Junction Carrier Depletion in a doped slit in a lateral PIN diode Carrier Accumulation Carrier Depletio n in lateral pn Junction (3,5mm) Carrier Depletion in a vertical pin diode Carrier Depletion in a vertical pin diode III-V Bonded electro absorption (500µm) Structure Insertion loss 3dB bandwidth MZI 7dB 8GHz MZI MZI MZI MZI MZI Waveguide 5dB - 15dB 7dB 7.7dB 1,5dB 15GHz - 30GHz? 25GHz VπL 6V.cm 5V.cm 0.2V.cm 2.7V.cm 4V.cm? 0,24V.cm Extinction Ratio 7dB 8dB 8.9 db 10dB 1 db 6.5dB 19.5dB Tx rate 10Gbit/s 10Gbit/s 10Gbit/s 40Gbit/s 40Gbit/s 40Gbit/s 40Gbit/s 16 16

Photodetector specifications Compatibility with silicon technology Broadband wavelength detection High bandwidth (frequency operation > 10 GHz) High responsivity(> 0.8 A/W) Low dark current Compactness 17

Ge on Si properties Optical absorption Close to bulk values Bandgap shrinkage (50 nm) o Tensile strain Absorption up to 1.6 µm Absorption (cm -1 ) 2 10 4 8 6 4 2 10 3 8 6 4 563 nm Ge on Si 1167 nm Ge on Si 1688 nm Ge on Si Ge bulk 50 nm Photodetectors integrated in waveguide 2 1200 1300 1400 1500 Wavelength (nm) 1600 1700 High bandwidth and high responsivity Optical coupling 18

Ge-on-Si photodetectors Vertical diode Lateral diode 3 µm wide mesa i-ge thickness: ~300 nm Ge length:15 µm i-ge width: from 1 µm to 0.5 µm Ge length: 10 µm Both Ge PIN diodes theoretically lead to low dark current, high responsivity and high bandwidth 19

Vertical pin diode Reference Waveguide Bottom contact Bottom contact Input Waveguide Top contact Top contact Ge 3 µm Top view Side view 20

Lateral Ge diode RF electrodes Metal Input waveguide 10 µm Ge 21

Ge photodetectors: Dark current Vertical diode Lateral diode IV 1,00E-03-1,0-0,9-0,8-0,7-0,6-0,5-0,4-0,3-0,2-0,1 0,0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1,0 1,00E-04 Dark current 1,00E-05 1,00E-06 1,00E-07 Série1 Série2 1,00E-08 1,00E-09 voltage Vertical diode Lateral diode Dark current @ -1V 18 na 2 µa-10µa Dark current @ -1V at 80 C 900 na 95 µa 22

Ge photodetectors: Responsivity Vertical diode Lateral diode Vertical diode Lateral diode Responsivity @ -1V 0.9 A/W 0.8 A/W Maximum responsivity 1 A/W @ -4V 0.8 A/W Quantum efficiency (%) 80% 70% 23

Ge photodetectors: -3dB bandwidth Vertical diode Lateral diode Vertical diode Lateral diode Bandwidth @ 0V 12 GHz 15GHz Bandwidth @ -2V 28GHz 40GHz Bandwidth @ -4V 42GHz ~130 GHz 24

Ge photodetectors: Eye diagram Vertical diode Lateral diode 40Gbit/s @ -4V 10Gbit/s @ 0V No dark currrent 25

MUX 8 channel + GePhotodetectors 26

Characterization of MUX + GePD AWG 400GHz AWG 200GHz -15 1550 1555 1560 1565 1570 1575 1580 1585 1540 1545 1550 1555 1560 1565-15 -20-20 P (dbm) -25-30 -35 Voie 1 Voie 2 Voie 3 Voie 4 Voie 5 Voie 6 Voie 7 Voie 8 P (dbm) -25-30 -35 Voie 1 Voie 2 Voie 3 Voie 4 Voie 5 Voie 6 Voie 7 Voie 8-40 -40-45 Lambda (nm) -45 Lambda (nm) Eye diagram @ 10Gbps Eye diagram @ 40Gbps BW=20GHz (-0.5V) (-2V) 27

Photodiodes results Specifications Photodetection IEF+LETI IEF+LETI UGhent Intel TUE Luxtera Intel Type Ge PIN vertical Ge PIN lateral InGaAs InGaAs InGaAs Ge PIN lateral Ge PIN vertical 3 db bandwidth 42 GHz 130 GHz 35GHz (th) <10GHz >20GHz 20GHz 31GHz Responsivity (A/W) 1 0.8 1 1.2 0.45 0.85 0.9 Dark current 20 na 2 µa 5 na 50 na 2 na 10 µa 170 na Rx rate 40Gbit/s @ -4V 10Gbit/s @ -0V 10Gbit/s 40 Gbit/s @ -5V 28

Optically active components on Si How to integrate InP on CMOS? Direct Epitaxy? Lattice mismatch Wafer Bonding? 200&300mm III-V substrates not available InP Substrate Sacrificial layer InP epilayer SiO 2 layer SiO 2 (~1 µm) Si substrate Monolithic interface for optical coupling Oxide layer over InP InP wafer broke before debonding E B > 0,7 J/m Substrate removing (chemical etching) Transfer of 10 nm thick InP layer IR image High quality bonding 29

Optically active components on CMOS How to integrate InP on CMOS? Direct Epitaxy? Lattice mismatch Wafer Bonding? 200 and 300mm III-V substrates not available Non patterned Die-to-Wafer localized molecular bonding lower cost due to reduced consumed InP area high throughput pick&place equipment needed with coarse alignment (50µm) InGaAs heterostructure on InP 100 mm wafer for photodetection InAsP heterostructure on InP 75 mm wafer for emission CMOS wafer Equivalent to non patterned localized epitaxy of heterostructures 30

InP die to wafer bonding dicing Direct bonding at 300 C Removal of substrate 31

DBR Laser Gain III-V Heterostructure Si-circuit supports all optical functions Top view DBR III-V/Si active region N-contact Si waveguide Surface-grating coupler P-contact Mode transformer Feed-back R>90% InP R~50% Gain region To fiber Si waveguide Side view 32

DBR laser characteristics 1564 1566 1568 1570 1572 1574 1576 5 10 Spectrum @ I=140mA CW operation @ λ = 1.57µm I th : 40-100mA (1-2 ka.cm -2 ) for T: 20 à 50 C P -fiber > 7 mw (>14mW in the WG) SMSR~20dB Good thermal properties: T0 of 80 C Lout-Fiber(mW) 8 0 1 2 3 4 5 6 7 8 9 10 7 6 5 4 3 2 1 L out -Fiber(mW) 4 3 2 1 0 1564 1566 1568 1570 1572 1574 1576 J(kA.cm -2 ) 0 0 0 100 200 300 400 500 600 I (ma) smsr~20db Wavelength(nm) 0 20 C 30 C 40 C 50 C -10-20 -30 L out -Fiber(dBm) 8 7 6 5 4 3 2 1 33

Direct modulation operation Eye diagram-5g Modulation~200mV 34

InPLaser on Si results Major players: INTEL,UCSB, LETI, III-V Lab, UGhent (IMEC) Specifications sources UCSB LETI INTEL UCSB UCSB Type Si DBR Si DBR Si DBR Ring Si DFB Output power (mw) 20 C 11 14 30 29 5.4 Ith (ma) 65 40 45 175 25 SMSR (db) 50 >20 50 T max operation 45 60 90 C 60 50 DML : ER 6 db for data rates 4 GB/s 1550nm DML : data rates 5 GB/s 1300nm 35

PhotonicElectronicIntegration Die to wafer integration Studbumping(lownumberof pins) Flip-chip (high number of pins) Cu pillars Adapted to different maturity chips Adapted to different size chips Full integration Photonics Wafer to Electronics Wafer Combined Photonic and Electronic technology Requirement on same maturity technology Size of the chips compatible 36

Electronic and Photonic integrated circuit Ge-on-Si integrated photodetector InP-on-Si integrated laser Silicon optical modulator MUX & DEMUX InP-on-Si integrated µlaser Silicon-On-Insulator waveguide Grating coupler Inverted taper Optical switch InGaAs-on-Si integrated photodetector 37

Conclusion Silicon Photonics is the way for integration of optical communication Alltechnologyblocks operating up to40g have been demonstrated. Different schemes of integration can be used for merging photonics and electronics. Interchipor intrachipcommunication can be adressed, but work has to continue to tackle major key issues such as temperature and power budget. Thanks for your attention 38