MICROCOMPUTER BASICS

Transcription

1 MICROCOMPUTER BASICS I. Terminology Binary Digit (BIT): basic unit of digital storage, a 0 or 1 Nibble: 4 bits, ½ byte, 1 hex digit Byte: grouping of 8 bits handled as a single unit, has 2 8 = 256 possible values Central Processing Unit (CPU): the brains of a computer Memory (RAM/ROM): digital circuitry used to store programs and data Input/Output (I/O): generic term describing how information enters and exits a computer : multi-bit communication channel used within a computer system Microprocessor (MPU or up): complex logic I.C. that contains registers, counters & decoders and performs arithmetic, logic & control operations, a CPU on a single LSI chip Microcomputer (uc): a fully functional system including a MPU, memory, I/O and a clock Microcontroller (MCU): a microcomputer on a single chip Operations (op codes): the set of basic operations that a computer can be instructed to perform, encoded in binary Operand: the data operated on by a particular operation Instruction: combination of an op code and its operand Program: group of instructions that allows a computer to perform a specific job Programmer: a person who writes programs II. Computer Architecture Basics What is a computer? CPU + Memory + I/O interconnected by buses and driven by a clock system CPU ALU Registers Memory Program I/O Interface(s) Address 1

2 Modern computer architectures feature 3 bus systems: Function HC11 X86 Address Carries address info from CPU to rest of system, typically unidirectional Used to move program code and data values between CPU and rest of system, always 8 32 bidirectional Timing and other control signals for overall system synchronization, direction varies with signal ~7? For the HC11: The address bus has 16 lines (bits) and thus supports addressing any of 2 16 = ( 1024 = 64Ki) uniquely addressable locations. The locations are to FFFF16. These are the memory locations which the CPU accesses for READ or WRITE transfers. The data bus has 8 lines (bits) thus it is byte sized. can be transferred from the CPU to memory (WRITE) or from memory to the CPU (READ). The contents of the data bus may be CPU instructions or data. The control bus includes clock signals, status signals, and special signals to the CPU depending on processor features; we will see more of this later. More modern/advanced microprocessors have larger numbers of bits for address & data buses, they can address much larger memory spaces and have much larger numeric range. ex: x86, AMD-64/EMT64 What is a microprocessor? A [huge] collection of highly-integrated basic digital logic components! Q1: what MPU do you have in your desktop/notebook PC? Q2: how many bit architecture is it? Q3: how many transistors is it built with? 2

3 Simplified MPU diagram: CPU/MPU major subsystems (circuits): 1. Instruction Decoder when a program instruction code is pulled from memory into the data register, this circuit examines the op code and decides which operation it represents (a large look up table). 2. ler-sequencer -- produces various control signals to rest of CPU per decoded instruction to carry out the instruction in sync with the system clock (the traffic cop of the CPU). 3. ALU circuit that performs arithmetic or logic operations according to control line inputs, has 2 inputs (operands): accumulator & data register. When a produced answer is to be stored, it is returned to the accumulator. CPU/MPU major registers (D f/f arrays): 1. Accumulator most useful register, used by most instructions, holds 1 operand before op & result after op. 2. Program Counter (PC) holds address of next byte of program to be taken. 3. Register* -- temporary storage register used by MPU as data bus interface, for example it can hold an opcode fetched from memory while it is decoded. It is also used to hold the 2 nd input to ALU. 4. Address Register* -- temporary register used by MPU as address bus interface, holds the address of which a current data bus transfer is occurring to/from. 3

4 * these registers are not typically programmer-accessible and not shown on actual CPU programming model diagrams. HC11 registers: In addition to two 8-bit accumulators (ACCA, ACCB) and a 16-bit PC, the HC11 also has an 8-bit condition code register, two index registers (X,Y) and a stack pointer (SP). We will study these later. III. Memory Basics (Read/Write) Memory is composed of many flip-flops, each of which stores 1 bit. Organization is X by Y ; Y is usually 8 (byte-wide memory), thus X is capacity in Ki/Mi bytes. A memory device requires log2(x) address and various control inputs, and has Y data I/O bits. Y log2(x) X Contents of memory may be viewed as a linear array of bytes. Each memory location has 2 attributes: an address (where it s at) and a value (its contents). Stored Program Concept idea of storing a program in the computer's memory for subsequent, automatic execution (John Von Neumann, hence Von Neumann architecture). Memory operation given a binary address on the address inputs, a data byte may be stored to or recalled from that location via the data bus based on given control signal inputs. RAM vs. ROM devices; K vs. k, Ki = kilobinary Binary Prefixes (ref: Factor Name Symbol Origin Derivation 2 10 kibi Ki kilobinary (2 10 ) 1 kilo (10 3 ) mebi Mi megabinary (2 10 ) 2 mega (10 3 ) gibi Gi gigabinary (2 10 ) 3 giga (10 3 ) tebi Ti terabinary (2 10 ) 4 tera (10 3 ) pebi Pi petabinary (2 10 ) 5 peta (10 3 ) exbi Ei exabinary (2 10 ) 6 exa (10 3 ) 6 4

5 Usage examples: Binary one kibibit, 1 Kibit = 2 10 bits = 1,024 bits one mebibyte, 1 MiB = 2 20 B = 1,048,576 B one gibibyte, 1 GiB = 2 30 B = 1,073,741,824 B Decimal one kilobit, 1 kbit = 10 3 bits = 1,000 bits one megabyte, 1 MB = 10 6 B= 1,000,000 B one gigabyte, 1 GB = 10 9 B = 1,000,000,000 B HC11 EVB Memory Map ref. CME11E9-EVBU manual, p. 12 IV. I/O Interfaces* I/O interfaces provide connection points between the internal buses and I/O devices such as keyboards, mice, printers, displays, etc. Examples from PC architecture include PS-2, RS-232 (COMx), USB, Ethernet * this is the major focus of the next course, CET335. 5