Designated contracting state (EPC) AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

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1 Title (en) Image sensor using CMOS technology with high video rate Title (de) Bilderfassungsgerät mit CMOS-Technologie mit einer starken Videofrequenz Title (fr) Capteur d'image en technologie CMOS à forte cadence vidéo Publication EP A (FR) Application EP A Priority FR A FR A FR A Abstract (en) The image sensor has matrix of photosensitive pixels (10) which are organized in rows and columns. The analog-to-digital converters are provided for each column and receiving outputs of pixels of column through column bus. A control circuit is configured to organize read of pixels on column busses and write of outputs of converters respectively in memory cell matrices so as to store accumulated brightness levels of rows of pixel matrix portions in row of memory cell matrixes. An adder is connected to sum levels accumulated in row of memory cell matrixes. An independent claim is included for method for managing time-delay-integration image sensor. Abstract (fr) Un capteur d'image à retard temporel et intégration comprend une matrice de pixels photosensibles (Px) organisés en rangées et colonnes ; et une première matrice (16a) de cellules mémoire associée à des moyens de commande et d'addition (18) pour stocker dans une rangée de cellules mémoire des niveaux de luminosité accumulés de plusieurs rangées de pixels. La première matrice (16a) de cellules mémoire est prévue, avec les moyens de commande et d'addition, pour stocker dans ses rangées des niveaux de luminosité accumulés des rangées d'une première moitié de la matrice de pixels. Le capteur comprend une deuxième matrice (16b) de cellules mémoire associée aux moyens de commande et d'addition pour stocker dans une rangée de la deuxième matrice de cellules mémoire des niveaux de luminosité accumulés des rangées de la deuxième moitié de la matrice de pixels. On prévoit des moyens (20) pour additionner les niveaux accumulés dans une rangée de la première matrice de cellules mémoire aux niveaux accumulés dans une rangée correspondante de la deuxième matrice de cellules mémoire. Inventor CAZAUX YVON (FR) GIFFARD BENOIT (FR) Applicant COMMISSARIAT ENERGIE ATOMIQUE (FR) IPC 8 full level (invention and additional information) H04N 5/374 ( ) CPC (invention and additional information) H04N 5/3743 ( ) Citation (applicant) MICHAEL G. FARRIER ET AL.: 'A Large Area TDI Image Sensor for Low Light Level Imaging' IEEE JOURNAL OF SOLID-STATE CIRCUITS vol. SC-15, no. 4, Août 1980, GÉRALD LEPAGE, JAN BOGAERTS, GUY MEYNANTS: 'Time-Delay-Integration Architectures in CMOS Image Sensors' IEEE TRANSACTIONS ON ELECTRON DEVICES vol. 56, no. 11, Novembre 2009, Citation (search report) [I] US A1 [A] US A1 [A] FR A1 [A] US A1 Designated contracting state (EPC) AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL Designated extension state (EPC) BA ME EPO simple patent family EP A ; EP A ; EP B ; JP A INPADOC legal status [PGFP FR] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE - Payment date : [PGFP DE] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE - Payment date :

2 [PGFP GB] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE - Payment date : [REG FR PLFP] FEE PAYMENT - Ref Legal Event Code : PLFP - Year of fee payment : [PG25 IE] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Effective date : [PG25 SI] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : SI [REG IE MM4A] PATENT LAPSED - Ref Legal Event Code : MM4A [PG25 CH] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Effective date : [PG25 LI] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : LI - Effective date : [PG25 LU] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : LU - Effective date : [PG25 MC] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : MC [PG25 IT] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : IT [REG CH PL] PATENT CEASED - Ref Legal Event Code : PL [26N] NO OPPOSITION FILED - Effective date : [PG25 DK] LAPSED IN A CONTRACTING STATE ANNOUNCED VIA POSTGRANT INFORM. FROM NAT. OFFICE - Ref Country Code : DK

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Title (fr) SOURCE IONIQUE INTERNE DOUBLE POUR PRODUCTION DE FAISCEAU DE PARTICULES AVEC UN CYCLOTRON

Title (en) A TWIN INTERNAL ION SOURCE FOR PARTICLE BEAM PRODUCTION WITH A CYCLOTRON Title (de) DOPPELTE INTERNE IONENQUELLE FÜR PARTIKELSTRAHLHERSTELLUNG MIT EINEM ZYKLOTRON Title (fr) SOURCE IONIQUE INTERNE